Nand Nor Implementation PDF
Nand Nor Implementation PDF
By
Assistant Professor
VIT University
Two NOT gates in series are same as a buffer because they cancel each
other as A’’ = A
• First stage - Draw a NAND gate for each product term of the expression that has
at least 2 literals. The inputs to each NAND gate are the literals of the term.
• Second stage – Draw a single NAND gate(or invert OR). The first stage outputs
will be the inputs of the second stage NAND gate.
• Any term in the expression with single literal requires an inverter in the first
stage.
• First stage - Draw a NOR gate for each sum term of the expression that has at least 2
literals. The inputs to each NOR gate are the literals of the term.
• Second stage – Draw a single NOR gate(or invert AND). The first stage outputs will be the
inputs of the second stage NOR gate.
• Any term in the expression with single literal requires an inverter in the first stage.