Introduction to Embedded Systems Design on FPGAs

Embedded system often refers to the non-PC systems which combines hardware and
software design. The development of FPGA technology brings advantages to the
embedded system in size, cost and performance. It is a hot application field which
merges logic design and processor-based hardware development in a single or few
chips solution. The merge of field programmable gate array (FPGA) technology and
embedded system design have great influence on the traditional design methodology.

An FPGA consists of an array of programmable logic blocks interconnected by

programmable routing resources.

FPGA design flow

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Hands-on: FPGA design and run it on a FPGA development board

Implement a simple Boolean Equation X=AB+CD, and illustrate the steps involved to
design, simulate, and program a FPGA using Altera’s Quartus’ II software.

A. Create a new project:

1) Create a new project:

2) Fill a name and top-level entity for the project.

Select path C:\My Documents\workshop, name your project “IntroFPGA”

3) Press Next

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4) Select Cyclone II family, and choose EP2C35F672C6 which is the FPGA used on
Altera’s DE2 board

5) Press Next and click Finish

B. Block Design File (bdf format)

1) Choose New from File menu

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2) Highlight a new Block Diagram File

3) Choose Save As

4) Enter the file name of IntroFPGA and press Save

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5) Right click the mouse in the empty workspace

6) Insert -> Symbol of and2 (2 input AND logic gate)

7) Assign the name “LogicGate1” to and2 gate

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7) Repeat steps of 5) and 6) and insert a symbol and2
Assign the name “LogicGate2” to and2

8) Insert -> Symbol or2 (LogicGate3) and assign the name

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9) Make wire connection and insert input/output pin to implement X=AB + CD. The bdf
workspace now has gates of AND and OR, and 4 input pins and 1 output pin. Then
make circuit connections.

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10) Change input and output terminal name to A, B, C, D, and X, respectively.

C. Compiling the project

1) Choose Processing -> Start Compilation

2) Message indicated no error

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D. Create a Vector Waveform File (vwf) to simulate the design
1) Choose File -> New -> Other Files ->Vector Waveform File -> OK

2) Save the vector waveform file (wvf) as IntroFPGA. Check the box of Add file to
current project

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3) Build the simulation file (vwf) with ending time of 20µs and grid size of 1 µs

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4) View -> Fit in Window

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6) Add inputs and outputs to the waveform (vwf)
Right click and select Insert Node or Bus

7) Click Node Finder

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6) Choose Filter: Design Entry (All Name)

7) Select inputs/outputs names from Node Finder screen to the right side and click OK

8) Highlight the input A, choose Edit =>Value =>Clock. Enter a period of 2µs, press Ok

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9) Highlight the input B, choose Edit =>Value =>Clock. Enter a period of 4µs, press OK
10) Highlight the input C, choose Edit =>Value =>Clock. Enter a period of 8µs, press Ok
11) Highlight the input D, choose Edit =>Value =>Clock. Enter a period of 16µs,
press Ok
12) Choose File => Save as IntroFPGA.vwf file

E. Perform a simulation of the X-output

1) Choose Processing => Start Simulation

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2) Show the results of the simulation for the Boolean equation X = AB+CD

F. Programming the FPGA using the Altera DE2 Programmer Board (hardware
configuration)
1) Connect SW0, SW1, SW2, SW3 and LEDG0 to the associated pin number
Input Switch Output LED Bank 1
Switch Number Pin Number LED Number Pin Number
SW0 (A) PIN_N25 LEDG0 (X) PIN_AE22
SW1 (B) PIN_N26
SW2 (C) PIN_P25
SW3 (D) PIN_AE14

2) Assign specific pin numbers in the IntroFPGA for connecting to the DE2 board
Choose Assignment -> Pins from the assignment Editor screen

3) Choose File -> Save Project.

The bdf file showing the pin assignments

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4) Choose Processing -> Compilation.
After the compilation is successful, press OK

5) JTAP Programing and Configuring the FPGA Device.The FPGA device must be
programmed and configured to implement the designed circuit.
i) Flip the RUN/PROG switch of DE2 development into the RUN position (default)
ii) Choose Tools-> Programmer.

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 iii) Click Hardware Setup -> Select Add Hardware
iv) Choose USB-Blaster (Hardware type) press Close

v) Make sure Program/Configure check box

6) Download the embedded system design to Altera EP2C35F672C6. Press Start for
starting the programming process until progress 100%

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G. Test the download design (X = AB + CD ) to the FPGA chip by combinations of input
levels and observation of the output responds

Truth Table for Testing the FPGA program for X= AB+CD

A (SW0) B (SW1) C (SW2) D (SW3) X(LED)
0 (DOWN) 0 (DOWN) 0 (DOWN) 0 (DOWN) 0 (Led off)
0 (DOWN) 0 (DOWN) 0 (DOWN) 1 (DOWN) 0 (Led off)
0 (DOWN) 0 (DOWN) 1 (UP) 0 (DOWN) 0 (Led off)
0 (DOWN) 0 (DOWN) 1 (UP) 1 (UP) 1 (Led on)
0 (DOWN) 1 (UP) 0 (DOWN) 0 (DOWN) 0 (Led off)
0 (DOWN) 1 (UP) 0 (DOWN) 1 (UP) 0 (Led off)
0 (DOWN) 1 (UP) 1 (UP) 0 (DOWN) 0 (Led off)
0 (DOWN) 1 (UP) 1 (UP) 1 (UP) 1 (led on)
1 (UP) 0 (DOWN) 0 (DOWN) 0 (DOWN) 0 (Led off)
1(UP) 0 (DOWN) 0 (DOWN) 1 (UP) 0 (Led off)
1 (UP) 0 (DOWN) 1 (UP) 0 (DOWN) 0 (Led off)
1 (UP) 0 (DOWN) 1 (UP) 1 (UP) 1 (Led on)
1 (UP) 1 (UP) 0 (DOWN) 0 (DOWN) 1 (Led on)
1 (UP) 1 (UP) 0 (DOWN) 1 (UP) 1 (Led on)
1 (UP) 1 (UP) 1 (UP) 0 (DOWN) 1 (Led on)
1 (UP) 1 (UP) 1 (UP) 1 (UP) 1 (Led on)

H. Your turn – Practice

Follow the steps to update your design by adding four buffers. Design and test the logic
to implement the circuit shown in the figure bellow.

1) Work on the design entry IntroFPGA.bdf and insert buffers to your design

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2) Insert output pins and update the names of outputs: LEDR0, LEDR1, LEDR2, and
LEDR3

3) Save your file and Compile your design and see if any error
4) Update Pin Planner and configuration to make connection between logic pins to
associated FPGA pins.

5) Compile your design with FPGA device hardware

6) Download the design to FPGA IC. Observe the output LEDs and inputs Switches
7) Explore different led lights by your own.

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