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This document outlines a course on software hardware co-design for embedded systems. The course covers topics such as specification of embedded systems, hardware/software partitioning constraints and tradeoffs, co-design concepts, partitioning methodologies, unified representation, co-simulation and co-verification, and co-simulation/co-synthesis tools. The expected outcome is for students to understand and apply co-design steps such as modeling, partitioning, co-synthesis and co-simulation for tightly coupled embedded systems with real-time constraints.

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80 views

Q

This document outlines a course on software hardware co-design for embedded systems. The course covers topics such as specification of embedded systems, hardware/software partitioning constraints and tradeoffs, co-design concepts, partitioning methodologies, unified representation, co-simulation and co-verification, and co-simulation/co-synthesis tools. The expected outcome is for students to understand and apply co-design steps such as modeling, partitioning, co-synthesis and co-simulation for tightly coupled embedded systems with real-time constraints.

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CSE4017 Software Hardware Co-Design L T P J C

3 0 0 4 4
Pre-requisite: None
Version: 1.00
Objectives:
 To understand the issues and methodologies related to design of complex embedded systems
using HW/SW co-design methodologies.
Expected Outcome:
 The students will be able to understand and apply the co-design steps : Modeling , partitioning co-
synthesis and co-simulation for a tightly coupled embedded systems with real time constraints.
Student Learning Outcomes (SLO): 1,2,4, 6
Module:1 SPECIFICATION OF EMBEDDED 10 hours SLO:1,2
SYSTEMS
Motivation for Software Hardware Co-design – System Design and Considerations , Models of
Design representation-Behavioral, structural, physical, performance Modeling , hardware software
development-MoCs: State oriented, Activity oriented, Structure oriented, Data oriented and
Heterogeneous .

Module:2 HW/SW PARTITIONING CONSTRAINTS 6 hours SLO:1,2


& TRADEOFFS
An informal view of Co design, typical codesign process, Co design environments, limitations of
existing approaches.

Module:3 CO-DESIGN CONCEPTS 4 hours SLO:2,4


Hardware Software Partitioning, hardware Software Alternatives, Hardware Software tradeoffs.

Module:4 HW/SW PARTITIONING 6 hours SLO:2,4


METHODOLOGIES
Partitioning granularity - Kernigan-Lin Algorithm - Extended Partitioning - Binary Partitioning:
GCLP Algorithm

Module:5 UNIFIED REPRESENTATION 4 hours SLO:4


Benefits of unified representation, modeling concepts, unified representation,

Module:6 CO-SIMULATION & CO-VERIFICATION 4 hours SLO:4,6


Principles of Co-simulation – Abstract Level; Detailed Level – Co-simulation as Partitioning
support.

Module:7 CO SIMULATION / CO SYNTHESIS 9 hours SLO:4,6


TOOLS
Synthesis – Hardware Synthesis - Interface Synthesis – Co-synthesis Approaches: Vulcan, Cosyma,
Cosmos, Polis and COOL, Simulation tools: Ptolemy, Polis.
Module:8 CONTEMPORARY ISSUES (To be handled 2 hours SLO:2
by experts from industry)
Total Lecture: 45 hours

Text Books:
1. Sanjaya Kumar, James H. Aylor, Barry W. Johnson, Wm. A. Wulf,” The Codesign of
Embedded Systems: A Unified Hardware/Software Representation “, Kluwer Academic
Publishers, 2012, ISBN-13: 978-1-4612-8553-3.
2. Ralf Niemann, “Hardware/Software Co-Design for Data Flow Dominated Embedded
Systems”, Springer, 2010, ISBN: 1441950648.
Reference Books:
1. Achim Rettberg, Mauro C Zanella, Franz J Rammig, “From Specification to Embedded Systems
Application”, Springer, 2005, ISBN:0387275576
2. Peter Marwedel, “Embedded System Design”, Springer, 2010, ISBN: 978-9400702561.
3. Russell John Rickford, Bernd Kleinjohann, “Design and Analysis of Distributed Embedded
Systems”, Springer, 2002, ISBN: 1402071566.

4. Felice Balarin, Massimiliano Chiodo, Paolo Giusto, Harry Hsieh, Attila Jurecska, Luciano
Lavagno, Claudio Passerone, Alberto Sangiovanni-Vincentelli, Ellen Sentovich, Kei Suzuki,
Bassam Tabbara , “Hardware-Software Co-Design of Embedded Systems: The POLIS
Approach”, , Springer 2012 ,1461561272.
5. http://embedded.eecs.berkeley.edu/research/hsc/class.F04/index.html
http://www.tik.ee.ethz.ch/tik/education/lectures/ES/
http://www1.cs.columbia.edu/~sedwards/classes/2004/4840/
http://courses.cs.tamu.edu/rabi/cpsc489/resources.shtml
6. http://ptolemy.eecs.berkeley.edu/ptolemyII/ptII10.0/ptII10.0.1_20141217/ptolemy/domains/c
ontinuous/doc/index.htm
Projects SLO:
6 and 13
Sample Projects:
1. Design of DC motor control using PWM
2. Reading a thermostat value & plot it
3. Implementation of control statements (If..then..else)
4. Design a level detector, integrator, voltage multiplier
5. Design a simple petrinet, FSM.

Date of approval by the Academic Council: 16.3.2017

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