HEF4047B
HEF4047B
Monostable/astable multivibrator
Rev. 6 — 17 March 2017 Product data sheet
1 General description
The HEF4047B is a retriggerable astable multivibrator that can be configured as either
a positive-edge or negative-edge triggered monostable multivibrator. The output pulse
width is programmed by selection of external components (Rt and Ct). Inputs include
clamp diodes. This enables the use of current limiting resistors to interface inputs to
voltages in excess of VCC.
2.1 General
• Monostable (one-shot) or astable (free-running) operation
• True and complemented buffered outputs
• Only one external resistor and capacitor required
3 Ordering information
Table 1. Ordering information
Type number Package
Name Description Version
HEF4047BT SO14 plastic small outline package; 14 leads; body width 3.9 mm SOT108-1
Nexperia
HEF4047B
Monostable/astable multivibrator
4 Functional diagram
Rt
Ct
5
ASTABLE
ASTABLE 12
RETRIGGER
GATE RETRIGGER
4 CONTROL
ASTABLE CONTROL
ASTABLE
MULTI-
VIBRATOR
10
6 O
- TRIGGER FREQUENCY
MONOSTABLE DIVIDER
8 CONTROL (÷ 2)
+ TRIGGER 11
O
9
MR
aaa-013282
ASTABLE RCTC(1)
ASTABLE
+ TRIGGER
- TRIGGER CTC
D O
FF RTC
1
CP OSCILLATOR
OUTPUT
CD CD
SD SD
VSS D O D O D O O
FF FF FF
RETRIGGER 2 3 4
CP CP CP
O O O O
CD CD CD CD
MR
aaa-013284
(1) Special input protection that allows operating input voltages outside the supply voltage lines. Compared to the standard
inputprotection pin 3 (RCTC) is more sensitive to static discharge; extra handling precautions are recommended.
Figure 2. Logic diagram
HEF4047B All information provided in this document is subject to legal disclaimers. © Nexperia B.V. 2017. All rights reserved.
5 Pinning information
5.1 Pinning
CTC 1 14 VDD
OSCILLATOR
RTC 2 13
OUTPUT
RCTC 3 12 RETRIGGER
ASTABLE 4 HEF4047B 11 O
ASTABLE 5 10 O
- TRIGGER 6 9 MR
VSS 7 8 + TRIGGER
aaa-013283
HEF4047B All information provided in this document is subject to legal disclaimers. © Nexperia B.V. 2017. All rights reserved.
6 Functional description
The HEF4047B consists of a gate-able astable multivibrator incorporating logic
techniques to permit positive or negative edge-triggered monostable multivibrator action
with retriggering and external counting options.
Inputs include +TRIGGER, −TRIGGER, ASTABLE, ASTABLE, RETRIGGER and MR
(master reset). Buffered outputs are O, O and OSCILLATOR OUTPUT. In all modes of
operation an external capacitor (Ct) must be connected between CTC and RCTC, and an
external resistor (Rt) must be connected between RTC and RCTC.
A HIGH level on the ASTABLE input enables astable operation. The period of the square
wave at O and O outputs is a function of the external components employed. ‘True’ input
pulses on the ASTABLE or ‘complement’ pulses on the ASTABLE input, allow the circuit
to be used as a gate-able multivibrator. The OSCILLATOR OUTPUT period is half of
the O output in the astable mode. However, a 50% duty factor is not guaranteed at this
output.
In the monostable mode, positive edge-triggering is accomplished by applying a leading-
edge pulse to the +TRIGGER input and a LOW level to the −TRIGGER input. For
negative edge-triggering, a trailing-edge pulse is applied to the −TRIGGER and a HIGH
level to the +TRIGGER. Input pulses may be of any duration relative to the output pulse.
The multivibrator can be retriggered (on the leading-edge only) by applying a common
pulse to both the RETRIGGER and +TRIGGER inputs. In this mode, the output pulse
remains HIGH as long as the input pulse period is shorter than the period determined by
the RC components.
An external count down option implements coupling O to an external ‘N’ counter and
resetting the counter with the trigger pulse. The counter output pulse is fed back to the
ASTABLE input and has a duration equal to N times the period of the multivibrator. A
HIGH level on the MR input assures no output pulse during an ON-power condition. This
input can also be activated to terminate the output pulse at any time. In the monostable
mode, a HIGH level or power-ON reset pulse must be applied to MR, whenever VDD is
applied.
HEF4047B All information provided in this document is subject to legal disclaimers. © Nexperia B.V. 2017. All rights reserved.
7 Limiting values
Table 3. Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol Parameter Conditions Min Max Unit
VDD supply voltage -0.5 +18 V
IIK input clamping current VI < -0.5 V or VI > VDD + 0.5 V - ±10 mA
VI input voltage -0.5 VDD + 0.5 V
IOK output clamping current VO < -0.5 V or VO > VDD + 0.5 V - ±10 mA
II/O input/output current - ±10 mA
IDD supply current - 50 mA
Tstg storage temperature -65 +150 °C
Tamb ambient temperature -40 +85 °C
Ptot total power dissipation Tamb = -40 °C to +85 °C
[1]
SO14 package - 500 mW
P power dissipation per output - 100 mW
[1] For SO14 package: Ptot derates linearly with 8 mW/K above 70 °C.
HEF4047B All information provided in this document is subject to legal disclaimers. © Nexperia B.V. 2017. All rights reserved.
9 Static characteristics
Table 5. Static characteristics
VSS = 0 V; VI = VSS or VDD unless otherwise specified.
Symbol Parameter Conditions VDD Tamb = -40 °C Tamb = 25 °C Tamb = 85 °C Unit
Min Max Min Max Min Max
VIH HIGH-level |IO| < 1 μA 5V 3.5 - 3.5 - 3.5 - V
input voltage
10 V 7.0 - 7.0 - 7.0 - V
15 V 11.0 - 11.0 - 11.0 - V
VIL LOW-level |IO| < 1 μA 5V - 1.5 - 1.5 - 1.5 V
input voltage
10 V - 3.0 - 3.0 - 3.0 V
15 V - 4.0 - 4.0 - 4.0 V
VOH HIGH-level |IO| < 1 μA 5V 4.95 - 4.95 - 4.95 - V
output voltage
10 V 9.95 - 9.95 - 9.95 - V
15 V 14.95 - 14.95 - 14.95 - V
VOL LOW-level |IO| < 1 μA 5V - 0.05 - 0.05 - 0.05 V
output voltage
10 V - 0.05 - 0.05 - 0.05 V
15 V - 0.05 - 0.05 - 0.05 V
IOH HIGH-level VO = 2.5 V 5V - -1.7 - -1.4 - -1.1 mA
output current
VO = 4.6 V 5V - -0.52 - -0.44 - -0.36 mA
VO = 9.5 V 10 V - -1.3 - -1.1 - -0.9 mA
VO = 13.5 V 15 V - -3.6 - -3.0 - -2.4 mA
IOL LOW-level VO = 0.4 V 5V 0.52 - 0.44 - 0.36 - mA
output current
VO = 0.5 V 10 V 1.3 - 1.1 - 0.9 - mA
VO = 1.5 V 15 V 3.6 - 3.0 - 2.4 - mA
II input leakage 15 V - ±0.3 - ±0.3 - ±1.0 μA
current
output transistor OFF; 15 V - ±0.3 - ±0.3 - ±1.0 μA
pin 3 at VDD or VSS
IDD supply current IO = 0 A 5V - 20 - 20 - 150 μA
10 V - 40 - 40 - 300 μA
15 V - 80 - 80 - 600 μA
CI input capacitance - - - - 7.5 - - pF
HEF4047B All information provided in this document is subject to legal disclaimers. © Nexperia B.V. 2017. All rights reserved.
10 Dynamic characteristics
Table 6. Dynamic characteristics
VSS = 0 V; Tamb = 25 °C; unless otherwise specified; for waveform and test circuit, see Figure 4 and Figure 5.
Symbol Parameter Conditions VDD Extrapolation formula Min Typ Max Unit
[1]
tPHL HIGH to LOW ASTABLE, ASTABLE 5V 68 ns + (0.55 ns/pF)CL - 95 190 ns
propagation delay to OSCILLATOR [1]
10 V 43 ns + (0.23 ns/pF)CL - 45 90 ns
OUTPUT
[1]
15 V 22 ns + (0.16 ns/pF)CL - 30 60 ns
[1]
tPLH LOW to HIGH ASTABLE, ASTABLE 5V 58 ns + (0.55 ns/pF)CL - 85 170 ns
propagation delay to OSCILLATOR
10 V 29 ns + (0.23 ns/pF)CL - 40 80 ns
OUTPUT
15 V 22 ns + (0.16 ns/pF)CL - 30 60 ns
[1]
tPHL HIGH to LOW ASTABLE, ASTABLE 5V 123 ns + (0.55 ns/pF)CL - 150 300 ns
propagation delay to O, O
10 V 54 ns + (0.23 ns/pF)CL - 65 130 ns
15 V 42 ns + (0.16 ns/pF)CL - 50 100 ns
[1]
tPLH LOW to HIGH ASTABLE, ASTABLE 5V 103 ns + (0.55 ns/pF)CL - 130 260 ns
propagation delay to O, O
10 V 49 ns + (0.23 ns/pF)CL - 60 120 ns
15 V 37 ns + (0.16 ns/pF)CL - 45 90 ns
[1]
tPHL HIGH to LOW +/-TRIGGER to O, O 5V 133 ns + (0.55 ns/pF)CL - 160 320 ns
propagation delay 10 V 54 ns + (0.23 ns/pF)CL - 65 130 ns
15 V 42 ns + (0.16 ns/pF)CL - 50 100 ns
[1]
tPLH LOW to HIGH +/-TRIGGER to O, O 5V 128 ns + (0.55 ns/pF)CL - 155 310 ns
propagation delay 10 V 54 ns + (0.23 ns/pF)CL - 65 130 ns
15 V 42 ns + (0.16 ns/pF)CL - 50 100 ns
[1]
tPHL HIGH to LOW +TRIGGER, 5V 38 ns + (0.55 ns/pF)CL - 65 130 ns
propagation delay RETRIGGER to O
10 V 19 ns + (0.23 ns/pF)CL - 30 60 ns
15 V 17 ns + (0.16 ns/pF)CL - 25 50 ns
[1]
tPLH LOW to HIGH +TRIGGER, 5V 68 ns + (0.55 ns/pF)CL - 95 190 ns
propagation delay RETRIGGER to O
10 V 29 ns + (0.23 ns/pF)CL - 40 80 ns
15 V 22 ns + (0.16 ns/pF)CL - 30 60 ns
[1]
tPHL HIGH to LOW MR to O 5V 83 ns + (0.55 ns/pF)CL - 100 200 ns
propagation delay 10 V 34 ns + (0.23 ns/pF)CL - 45 90 ns
15 V 27 ns + (0.16 ns/pF)CL - 35 70 ns
[1]
tPLH LOW to HIGH MR to O 5V 83 ns + (0.55 ns/pF)CL - 100 200 ns
propagation delay 10 V 34 ns + (0.23 ns/pF)CL - 45 90 ns
15 V 27 ns + (0.16 ns/pF)CL - 35 70 ns
[1]
tTHL HIGH to LOW 5V 10 ns + (1.0 ns/pF)CL - 60 120 ns
output transition 10 V 9 ns + (0.42 ns/pF)CL - 30 60 ns
time
15 V 6 ns + (0.28 ns/pF)CL - 20 40 ns
HEF4047B All information provided in this document is subject to legal disclaimers. © Nexperia B.V. 2017. All rights reserved.
Symbol Parameter Conditions VDD Extrapolation formula Min Typ Max Unit
[1]
tTLH LOW to HIGH 5V 10 ns + (1.0 ns/pF)CL - 60 120 ns
output transition 10 V 9 ns + (0.42 ns/pF)CL - 30 60 ns
time
15 V 6 ns + (0.28 ns/pF)CL - 20 40 ns
tW pulse width any input except MR 5V - 220 110 - ns
10 V - 100 50 - ns
15 V - 70 35 - ns
MR HIGH 5V - 60 30 - ns
10 V - 30 15 - ns
15 V - 20 10 - ns
[1] The typical values of the propagation delay and transition times are calculated from the extrapolation formulas shown (CL in pF).
tPHL tPLH
VOH
90 %
output VM
10 %
VOL
tTHL tTLH
aaa-014878
HEF4047B All information provided in this document is subject to legal disclaimers. © Nexperia B.V. 2017. All rights reserved.
tW
VI
90 % 90 %
negative
pulse VM VM
10 % 10 %
0V
tf tr
tr tf
VI
90 % 90 %
positive
pulse VM VM
10 % 10 %
0V
tW
001aaj781
a. Input waveform
VEXT
VDD
RL
VI VO
G DUT
RT CL
001aaj915
b. Test circuit
Test and measurement data is given in Table 8.
Definitions test circuit:
RT = Termination resistance should be equal to output impedance Zo of the pulse generator.
CL = Load capacitance including jig and probe capacitance.
HEF4047B All information provided in this document is subject to legal disclaimers. © Nexperia B.V. 2017. All rights reserved.
11 Application information
[1]
Table 9. Functional connections
Function Pins connected to Output pulse Output period or pulse width
VDD VSS input pulse from pins
Astable multivibrator
Free running 4, 5, 6, 14 7, 8, 9, 12 - 10, 11, 13 at pins 10, 11; tA = 4.40 RtCt
True gating 4, 6, 14 7, 8, 9, 12 5 10, 11, 13 at pin 13; tA = 2.20 RtCt
[1] In all cases, external resistor between pins 2 and 3, external capacitor between pins 1 and 3.
[2] Input pulse to RESET of external counting chip: external counting chip output to pin 4.
HEF4047B All information provided in this document is subject to legal disclaimers. © Nexperia B.V. 2017. All rights reserved.
OSCILLATOR
OUTPUT (pin 13)
t1 t2 t1 t2
O OUTPUT
(pin 10)
1 1
t t
2 A 2 A
tA
aaa-013285
(1)
(2)
(3)
[1] Therefore if tA = 4.40 RtCt is used, the maximum variation is (+7.0%; -0.0%) at 10 V.
HEF4047B All information provided in this document is subject to legal disclaimers. © Nexperia B.V. 2017. All rights reserved.
aaa-013286
7.5
period accuracy
for O and O
(%)
5.0
(1)
(2)
(3)
2.5
-2.5
0 5 10 15
VDD (V)
aaa-013287
15
(1)
period accuracy
(2)
for O and O (3)
(%) (4)
10
-5
0 5 10 15
VDD (V)
HEF4047B All information provided in this document is subject to legal disclaimers. © Nexperia B.V. 2017. All rights reserved.
+ TRIGGER
(pin 8)
OSCILLATOR
OUTPUT (pin 13)
t1' t2 t1 ' t2
O OUTPUT
(pin 10)
tM tM
aaa-013288
(4)
(5)
(6)
1
[1] In the astable mode, the first positive half cycle has a duration of tM: succeeding durations are ⁄2 tA.
Therefore if tM = 2.48 RtCt is used, the maximum variation is (+12%; -0.0%) at 10 V.
HEF4047B All information provided in this document is subject to legal disclaimers. © Nexperia B.V. 2017. All rights reserved.
+ TRIGGER;
RETRIGGER
(pins 8, 12)
OSCILLATOR
OUTPUT (pin 13)
t1 ' t1
t2 t1' t2
t2
O OUTPUT
(pin 10)
tRE tRE tD
tRE
aaa-013289
(7)
Where text = pulse duration of the circuitry, and N is the number of counts used.
HEF4047B All information provided in this document is subject to legal disclaimers. © Nexperia B.V. 2017. All rights reserved.
ASTABLE
4
HEF4047B optional
buffer
O CP0 O5-9
10 14 HEF4017B 12 output
15
input MR
pulse
text
aaa-013290
Astable mode:
(8)
(9)
HEF4047B All information provided in this document is subject to legal disclaimers. © Nexperia B.V. 2017. All rights reserved.
Monostable mode:
(10)
Because the power dissipation does not depend on Rt, a design for minimum power
dissipation would be a small value of Ct. The value of R would depend on the desired
period (within the limitations discussed previously). Typical power consumption in astable
mode is shown in Figure 12, Figure 13 and Figure 14.
aaa-013291
105
P
(µW)
104
103
102
10
1 10 102 103 104 105 106
f (Hz)
VDD = 5 V.
(1) Ct = 100 nF.
(2) Ct = 10 nF.
(3) Ct = 1 nF.
(4) Ct = 100 pF.
(5) Ct = 10 pF.
Figure 12. Power consumption as a function of the output frequency at O or O; astable mode.
HEF4047B All information provided in this document is subject to legal disclaimers. © Nexperia B.V. 2017. All rights reserved.
aaa-013292
106
P
(µW)
105
103
1 10 102 103 104 105 106
f (Hz)
VDD = 10 V.
(1) Ct = 100 nF.
(2) Ct = 10 nF.
(3) Ct = 1 nF.
(4) Ct = 100 pF.
(5) Ct = 10 pF.
Figure 13. Power consumption as a function of the output frequency at O or O; astable mode.
aaa-013293
106
P
(µW)
105
104
103
1 10 102 103 104 105 106
f (Hz)
VDD = 15 V.
(1) Ct = 100 nF.
(2) Ct = 10 nF.
(3) Ct = 1 nF.
(4) Ct = 100 pF.
(5) Ct = 10 pF.
Figure 14. Power consumption as a function of the output frequency at O or O; astable mode.
HEF4047B All information provided in this document is subject to legal disclaimers. © Nexperia B.V. 2017. All rights reserved.
12 Package outline
SO14: plastic small outline package; 14 leads; body width 3.9 mm SOT108-1
D E A
X
y HE v M A
14 8
Q
A2
(A 3) A
A1
pin 1 index
θ
Lp
1 7 L
e w M detail X
bp
0 2.5 5 mm
scale
Note
1. Plastic or metal protrusions of 0.15 mm (0.006 inch) maximum per side are not included.
99-12-27
SOT108-1 076E06 MS-012
03-02-19
HEF4047B All information provided in this document is subject to legal disclaimers. © Nexperia B.V. 2017. All rights reserved.
13 Abbreviations
Table 12. Abbreviations
Acronym Description
DUT Device Under Test
14 Revision history
Table 13. Revision history
Document ID Release date Data sheet status Change notice Supersedes
HEF4047B v.6 20170317 Product data sheet - HEF4047B v.5
Modifications: • The format of this data sheet has been redesigned to comply with the new identity guidelines
of Nexperia.
• Legal texts have been adapted to the new company name where appropriate.
HEF4047B v.5 20151216 Product data sheet - HEF4047B v.4
Modifications: • Type number HEF4047BP (SOT27-1) removed.
HEF4047B v.4 20140915 Product data sheet - HEF4047B_CVN_3
Modifications: • The format of this data sheet has been redesigned to comply with the new identity
guidelines of NXP Semiconductors.
• Legal texts have been adapted to the new company name where appropriate.
HEF4047B_CVN_3 19950101 Product specification - -
HEF4047B All information provided in this document is subject to legal disclaimers. © Nexperia B.V. 2017. All rights reserved.
15 Legal information
[1] Please consult the most recently issued document before initiating or completing a design.
[2] The term 'short data sheet' is explained in section "Definitions".
[3] The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple
devices. The latest product status information is available on the Internet at URL http://www.nexperia.com.
15.3 Disclaimers Limiting values — Stress above one or more limiting values (as defined in
the Absolute Maximum Ratings System of IEC 60134) will cause permanent
Limited warranty and liability — Information in this document is believed
damage to the device. Limiting values are stress ratings only and (proper)
to be accurate and reliable. However, Nexperia does not give any
operation of the device at these or any other conditions above those
representations or warranties, expressed or implied, as to the accuracy
given in the Recommended operating conditions section (if present) or the
or completeness of such information and shall have no liability for the
Characteristics sections of this document is not warranted. Constant or
consequences of use of such information. Nexperia takes no responsibility
repeated exposure to limiting values will permanently and irreversibly affect
for the content in this document if provided by an information source outside
the quality and reliability of the device.
of Nexperia. In no event shall Nexperia be liable for any indirect, incidental,
punitive, special or consequential damages (including - without limitation -
lost profits, lost savings, business interruption, costs related to the removal Terms and conditions of commercial sale — Nexperia products are
or replacement of any products or rework charges) whether or not such sold subject to the general terms and conditions of commercial sale, as
damages are based on tort (including negligence), warranty, breach of published at http://www.nexperia.com/profile/terms, unless otherwise agreed
contract or any other legal theory. Notwithstanding any damages that in a valid written individual agreement. In case an individual agreement is
customer might incur for any reason whatsoever, Nexperia's aggregate and concluded only the terms and conditions of the respective agreement shall
cumulative liability towards customer for the products described herein shall apply. Nexperia hereby expressly objects to applying the customer’s general
be limited in accordance with the Terms and conditions of commercial sale of terms and conditions with regard to the purchase of Nexperia products by
Nexperia. customer.
Right to make changes — Nexperia reserves the right to make changes No offer to sell or license — Nothing in this document may be interpreted
to information published in this document, including without limitation or construed as an offer to sell products that is open for acceptance or
specifications and product descriptions, at any time and without notice. This the grant, conveyance or implication of any license under any copyrights,
document supersedes and replaces all information supplied prior to the patents or other industrial or intellectual property rights.
publication hereof.
Export control — This document as well as the item(s) described herein
Suitability for use — Nexperia products are not designed, authorized or may be subject to export control regulations. Export might require a prior
warranted to be suitable for use in life support, life-critical or safety-critical authorization from competent authorities.
HEF4047B All information provided in this document is subject to legal disclaimers. © Nexperia B.V. 2017. All rights reserved.
Non-automotive qualified products — Unless this data sheet expressly design and use of the product for automotive applications beyond Nexperia's
states that this specific Nexperia product is automotive qualified, the standard warranty and Nexperia's product specifications.
product is not suitable for automotive use. It is neither qualified nor tested in
accordance with automotive testing or application requirements. Nexperia Translations — A non-English (translated) version of a document is for
accepts no liability for inclusion and/or use of non-automotive qualified reference only. The English version shall prevail in case of any discrepancy
products in automotive equipment or applications. In the event that customer between the translated and English versions.
uses the product for design-in and use in automotive applications to
automotive specifications and standards, customer (a) shall use the product
without Nexperia's warranty of the product for such automotive applications,
use and specifications, and (b) whenever customer uses the product for
automotive applications beyond Nexperia's specifications such use shall be
15.4 Trademarks
solely at customer’s own risk, and (c) customer fully indemnifies Nexperia Notice: All referenced brands, product names, service names and
for any liability, damages or failed product claims resulting from customer trademarks are the property of their respective owners.
HEF4047B All information provided in this document is subject to legal disclaimers. © Nexperia B.V. 2017. All rights reserved.
Contents
1 General description ............................................ 1
2 Features and benefits .........................................1
2.1 General .............................................................. 1
2.2 Monostable multivibrator ....................................1
2.3 Astable multivibrator .......................................... 1
3 Ordering information .......................................... 1
4 Functional diagram ............................................. 2
5 Pinning information ............................................ 3
5.1 Pinning ............................................................... 3
5.2 Pin description ................................................... 3
6 Functional description ........................................4
7 Limiting values .................................................... 5
8 Recommended operating conditions ................ 5
9 Static characteristics .......................................... 6
10 Dynamic characteristics .....................................7
10.1 Waveform and test circuit ..................................8
11 Application information .................................... 10
11.1 Astable mode design information .................... 11
11.1.1 Unit-to-unit transfer voltage variations ............. 11
11.1.2 Variations due to changes in VDD ...................12
11.2 Monostable mode design information .............. 13
11.2.1 Retrigger mode operation ................................14
11.2.2 External counter option ....................................14
11.2.3 Timing component limitations .......................... 15
11.2.4 Power consumption ......................................... 15
12 Package outline .................................................18
13 Abbreviations .................................................... 19
14 Revision history ................................................ 19
15 Legal information .............................................. 20
Please be aware that important notices concerning this document and the product(s)
described herein, have been included in section 'Legal information'.