B.

Tech/Odd/CS302/2017-18(Regular) Enrolment
No.

University Examination
B.Tech, 2nd year, 3rd Semester
Subject Code- CS302 Total Marks-100
Subject- Analog & Digital Electronics Time Duration -3hrs.
All the answers should be in brief and to the point.
Strike off all the blank pages of copy, after completing your work.
The students are advised not to write anything on the question paper other than Enrolment No.

Group-A
(Answer any fifteen questions) [15*1=15]

1. Choose the correct option:

a. Cross-over distortion occurs in
i) Class A amplifier
ii) Class AB amplifier
iii) Class C amplifier
iv) Push pull Amplifier

b. Negative feedback in an amplifier is

i) Reduced gain
ii) Increased noise
iii) Increased frequency and phase
iv) Reduced Bandwidth

c. Schmitt trigger circuit generates

i) Triangular wave
ii) Square wave
iii) Sawtooth wave
iv) None of these

d. Which of the following oscillators is used at audio frequency?

i) Crystal Oscillator
ii) Hartley oscillator
iii) RC phase shift Oscillator
iv) None of these

e. What is the function of the comparators in the 555 timer circuit?

i) to compare the output voltages to the internal voltage divider
ii) to compare the input voltages to the internal voltage divider
iii) to compare the output voltages to the external voltage divider
iv) to compare the input voltages to the external voltage divider
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No.

f. The voltage levels for positive logic system

i) Must necessarily be positive
ii) Must necessarily be negative
iii) May be positive or negative
iv) Must necessarily be 0V and 5V

g. In a digital computer binary subtraction is performed

i) In the same way as we perform subtraction in decimal number system
ii) Using 2’s complement method
iii) Using 9’s complement method
iv) Using 10’s complement method

h. Gray code of (1001)2

i) (1100)2
ii) (1101)2
iii) (1010)2
iv) None of these

i. What is the minimum number of NAND gates required to realize an X-OR gate?
i) 3
ii) 4
iii) 5
iv) 6

j. A+AB+ABC+ABCD+…=
i) 1
ii) A
iii) A+AB
iv) AB

k. The code used for labeling the cells of a K-map is

i) 8421
ii) hexadecimal
iii) Gray
iv) Octal

l. Flip-flop has
i) One stable state
ii) Two stable states
iii) No stable state
iv) None of these

m. How many select lines are contained in a multiplexer with 1024 inputs and one
output?
i) 512
ii) 258
iii) 64
iv) 10
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No.

n. The race around condition occurs in a J-K flip-flop when

i) both the inputs are 0
ii) both the inputs are 1
iii) the inputs are complementary
iv) any one of the above input combinations is present

o. Master-slave configuration is used in flip-flops to

i) increase its clocking rate
ii) reduce power dissipation
iii) improve its reliability
iv) eliminate race-around condition

p. The minimum number of flip-flops required for a mod-12 ripple counter is

i) 3
ii) 4
iii) 6
iv) 12

q. How many full adders are required to construct m bit parallel adder?
i) m/2
ii) m-1
iii) m
iv) m+1

r. The fastest logic family is

i) TTL
ii) CMOS
iii) RTL
iv) ECL

s. An 8x4 ROM contains a decoder of size

i) 3x8
ii) 8x4
iii) 8x8
iv) 3x4

t. A EPROM is
i) non erasable
ii) volatile
iii) programmable and erasable
iv) erasable but not programmable
B.Tech/Odd/CS302/2017-18(Regular) Enrolment
No.

Group-B
(Answer any five questions) [5*5=25]

2. Draw and explain the Schmitt trigger circuit. (5)

3. Draw and explain the operation of astable multivibrator using 555 Timer. (5)

4. Explain Master Slave Flip-Flop. (5)

5. a) Distinguish between latch and flip-flop.

b) Distinguish between ripple counter and synchronous counter. (2+3)

6. Define the following terms related to digital ICs: (1+2+1+1)

i) Noise Margin
ii) Propagation delay- tPLH,tPHL
iii) Set up time
iv) Hold time.

7. Perform the conversion from S-R to J-K flip flop. (5)

8. Realize a full-subtractor using half-subtractor. (5)

9. What is the difference between combinational circuit and sequential circuit? Explain with
example. (5)

10. Explain TTL NAND gate with proper circuit diagram. (5)

Group-C
(Answer any four questions) [4*15=60]

11. Explain the operation of Class-B push pull amplifier with circuit diagram.
Determine its collector circuit efficiency. What is crossover distortion in Class-B push pull
amplifier? (7+6+2)
12. What is Barkhausen criterion for a feedback amplifier to function as an oscillator? Give a
neat circuit diagram of Wien bridge oscillator and explain how it works. Derive an
expression for its frequency of oscillation. (2+8+5)

13. a)Simplify the following functions by means of K-map: (4+4)

i) F(A,B,C,D)=Ʃm(0,4,7,9,13,15) + dƩ(3,5)
ii) F(A,B,C,D)=πM(0,1,3,5,8,10,15) .dπ(11,13,15)
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b) Implement following Boolean function using NAND gates (7)

F (A, B, C, D) = Ʃm(1,3,4,11,12,13,14,15)

14. a) Design full-adder using 4:1 multiplexers. (6)

b) Describe the operation of a bidirectional universal shift register (with parallel load)
with a neat diagram. (9)

15. a) Explain the operation of a R-2R ladder type DAC with circuit diagram. (7)
b) Explain the working of a successive approximation register type ADC. (8)

16. a) Write truth table, circuit diagram and timing diagram of SR flip-flop using NOR gate.
b) Convert D flip-flop into JK flip-flop. (8+7)

17. Draw the circuit for a four-bit Johnson counter using D flip-flops and explain its
operation. Draw the timing diagram for this 4-bit Johnson counter. How does this timing
diagram differ from that a Ring counter? (8+4+3)

18. Write Short Notes: (Answer any three): (3x5)

i) CMOS inverter
ii) Flash memory
iii) Priority Encoder
iv) Decoder