EE 8551 MICROPROCESSORS AND MICROCONTROLLERS

UNIT I 8085 PROCESSOR 9

Hardware Architecture, pinouts – Functional Building Blocks of Processor – Memory
organization – I/O ports and data transfer concepts– Timing Diagram – Interrupts.

UNIT II PROGRAMMING OF 8085 PROCESSOR 9

Instruction format and addressing modes – Assembly language format – Data transfer, data
manipulation & control instructions – Programming: Loop structure with counting & Indexing -
Lookup table - Subroutine instructions - stack.

UNIT III 8051 MICRO CONTROLLER 9

Hardware Architecture, pinouts – Functional building blocks of processor – Memory
organization – I/O ports and data transfer concepts – Timing diagram – Interrupts – Comparison
to programming concepts with 8085.

UNIT IV PERIPHERAL INTERFACING 9

Study on need, Architecture, configuration and interfacing with ICs: 8255, 8259, 8254,8237,
8251, 8279 - A/D and D/A converters & interfacing with 8085 & 8051.

UNIT V MICRO CONTROLLER PROGRAMMING & APPLICATIONS 9

Data Transfer, Manipulation, Control algorithm & I/O instructions – Simple programming
exercises key board and display interface – Closed loop control of servo motor- stepper motor
control – Washing Machine Control.

TOTAL : 45 PERIODS
TEXT BOOKS
1. “Microprocessor and Microcontrollers”, Krishna Kant Eastern Company Edition, Prentice –
Hall of India, New Delhi , 2007.
2. R.S. Gaonkar, ‘Microprocessor Architecture Programming and Application’, Wiley
Eastern Ltd., New Delhi.

REFERENCES
1 . Muhammad Ali Mazidi & Janice Gilli Mazidi, R.D.Kinely ‘The 8051 Micro Controller and
Embedded Systems’, PHI Pearson Education, 5th Indian reprint, 2003.
2. N.Senthil Kumar, M.Saravanan, S.Jeevananthan, ‘Microprocessors and Microcontrollers’,
Oxford,2013.
 UNIT I
8085 PROCESSOR
PART – A
1. What is the function of ALE in 8085 microprocessor? (April /May 2015)(RE)
It is a positive going pulse generated when 8085 begins an operation. This signal is used to
latch the low order address from the multiplexed A/D bus.
2. What is the use of stack pointer? (Nov/Dec 2015) (RE)
The stack pointer is a 16 bit register used as a memory pointer. Ti maintains the address of
the last byte entered into the stack. The stack pointer is decremented each time when data is
loaded into the stack and is incremented when data is retrieved from the stack.
3. How the address and data lines are demultiplexed in 8085? (Dec 2009) (RE)
The low order address and data lines of 8085 are demultiplexed using an external 8-bit D-
Latch (74LS373) and the ALE signal of 8085, as shown in fig.
A0 – A7

8085 74LS373

D0 - D7
AD0 – AD7 LATCH

Demultiplexing of address and data lines in 8085 processor

EN
At the beginning of every machine cycle, ALE is asserted high and then low. Also the
ALE
low byte of address is given out through AD0 -AD7 lines. Since the ALE is connected to
Enable of Latch, when ALE is asserted high and then low the addresses are latched into the
output lines of the latch. Now the lines AD0 -AD7 are free for data transfer.
4. What is a flag and list the types? (Nov / Dec 2010) (UN)
Flag is a flip flop used to store the information about the status of the processor and the
status of the instruction executed most recently.
There are five flags in 8085. They are sign flag, zero flag, Auxiliary carry flag, parity flag
and carry flag.
5. What is processor cycle (Machine cycle) and instruction cycle? (Dec 2009) (RE)
The processor cycle or machine cycle is the basic operation performed by the processor.
To execute an instruction, the processor will run one or more machine cycles in a particular
order.
The sequence of operations that a processor has to carry out while executing the
instruction is called Instruction cycle. Each instruction cycle of a processor in turn consists of
a number of machine cycles.

6. List the various machine cycles of 8085.(Nov / Dec 2010) (RE)

The various machine cycles of8085 are
(i) Opcode fetch cycle (ii) Memory read cycle
(iii) Memory write cycle (iv) I/0 read cycle
(v) I/0 write cycle (vi) Interrupt acknowledge cycle (vii) Bus idle cycle.
7. What is HOLD and HLDA? How is it used? (Nov/ Dec 2008) (RE)
The HOLD and HLDA signals are used for direct memory access type of Data transfer.
This type of data transfers are achieved by employing a DMA controller in the system. When
DMA is required the DMA controller will place a high signal on HOLD pin of 8085. when
HOLD input is asserted high, the processor will enter into a wait state and drive all its tristate
pins to high impedance state and send an acknowledge signal, the DMA controller will take
control of the bus and performs DMA transfer and at the end it asserts HOLD signal low.
When HOLD is asserted low the processor will resume its execution.

8. List the five interrupt pins available in 8085. (May 2010) (RE)
The 8085 have five interrupt signal. TRAP, RST 7.5, RST 6.5, RST 5.5 and INTR.

9. Compare the memory mapped I/O and standard I/O mapped I/O. (Nov/Dec 2005) (UN)
S.NO Memory Mapped I/O Standard I/O mapped I/O
1 16-bit address is allotted toan I/O device8 -bit address is allotted to an I/O device.
2 The devices are accessed by I/O read The devices are accessed by memory read
or I/O write cycle. or memory write cycle.
3 All instructions related to memory can beOnly IN and OUT instructions
 used for data transfer can be used for data transfer.
4 A large number of I/O ports Only 256 ports can be interfaced.
can be interfaced.

10. What is Microprocessor? Give the power supply & clock frequency of 8085 (UN)
A microprocessor is a multipurpose, programmable logic device that reads binary
instructions from a storage device called memory accepts binary data as input
and processes data according to those instructions and provides result as output.
The power supply of 8085 is +5V and clock frequency in 3MHz.
11. What are the basic units of a microprocessor? (UN)
The basic units or blocks of a microprocessor are ALU, an array of registers and control unit.
12. What is multiplexing and what is its advantage? (RE)
Multiplexing is transferring different information at different well defined times through
same lines. A group of such lines is called multiplexed bus. The advantage of multiplexing is
that fewer pins are required for microprocessors to communicate with outside world.
13. What is the function of IO/M, READY in 8085. (UN)
The IO/M is used to differentiate memory access and I/O access. For IN and OUT
instruction it is high. For memory reference instructions it is low.
READY is an input signal to the processor, used by the memory or I/O devices to get extra
time for data transfer or to introduce wait states in the bus cycles.

14. What is the function of /RD and /WR. (RE)

The /RD signal is asserted low by the processor during memory or I/O read operation.
The /WR signal is asserted low during memory or I/O write operation.

15. Give the function of HOLD and HLDA in 8085. (RE)

HOLD and HLDA signals are used for the Direct Memory Access (DMA) type of data
transfer. The DMA controller places a high on HOLD pin in order to take control of the
system bus. The HOLD request is acknowledged by the 8085 by driving all its tristated pins
to high impedance state and asserting HLDA signal high.
16. What is fetch and execute cycle? (RE)
In general, the instruction cycle of an instruction can be divided into fetch and execute
cycles. The fetch cycle is executed to fetch the opcode from memory. The execute cycle is
executed to decode the instruction and to perform the work instructed by the instruction.
17. What is the need for timing diagram?(UN)
The timing diagram provides information regarding the status of various signals, when a
machine cycle is executed. The knowledge of timing diagram is essential for system designer
to select matched peripheral devices like memories, latches, ports, etc., to form a
microprocessor system.
18. What is T -state? (UN)
The T-state is the time period of the internal clock signal of the processor. The time taken
by the processor to execute the machine cycle is expressed in T-state.

19. What is meant by memory mapping? What is memory access time? (UN)
The memory mapping is the process of interfacing memories to microprocessor and
allocating addresses to each memory locations. The memory access time is the time taken
by the processor to read or write a memory location. During read operation it is the time
between a valid address on the bus and end of read control signal. During write operation
it is the time between a valid address on the bus and the end of write control signal.
20. What is an interrupt and how they are classified? (RE)
Interrupt is a signal send by an external device to the processor so as to request the
processor to perform a particular task or work.
They are three methods of classifying interrupts
Method I: The interrupts are classified into Hardware and Software interrupts
Method II: The interrupts are classified into vectored and Non-Vectored interrupt
Method III: The interrupts are classified into maskable and Non-maskable interrupt.

21. What is vectored and Non- Vectored interrupt? (RE)

When an interrupt is accepted, if the processor control branches to a specific address
defined by the manufacturer then the interrupt is called vectored interrupt.
 In Non-vectored interrupt there is no specific address for storing the interrupt service
routine.
Hence the interrupted device should give the address of the interrupt service routine.

22. What is Polling and list the different types of polling? (UN)
Polling is a scheme or an algorithm to identify the devices interrupting the processor.
Polling is employed when multiple devices interrupt the processor through one interrupt pin
of the processor.
The polling can be classified into software and hardware polling. In software polling the
entire polling process is govern by program. In hardware polling, the hardware takes care of
checking the status of interrupting devices and allowing one by one to the processor.

23. What is the difference between wait state and bus idle condition? (UN)
During Bus idle condition the tri-stated pins of the processor are driven to high impedance
state, but during wait state they are in normal states (either low or high). The READY is not
sampled during bus idle condition but it is sampled during wait state.

24. What is program counter? How is it useful in program execution? (UN)

The program counter keeps track of program execution. To execute a program the starting
address of the program is loaded in program counter. The PC sends out an address to fetch a
byte of instruction from memory and increments its contents automatically.
25. Why interfacing is needed for I/O devices? (UN)
Generally I/O devices are slow devices. Therefore the speed of I/O devices does not match
with the speed of microprocessor. And so an interface is provided between system bus and
I/O devices.
26. What is the difference between system bus and CPU bus? (UN)
The CPU bus has multiplexed lines but the system bus has separate lines for each signal. The
multiplexed CPU lines are demultiplexed by the CPU interface circuit to form system bus.
27. How the clock signals are generated in 8085 and what is the frequency of the internal
clock? (RE)
The 8085 has the clock generation circuit on the chip but an external quartz crystal or LC
circuit or RC circuit should be connected at the pins X1 and X2 in order to generate a clock
whose frequency is double that of internal clock. The generated clock is divided by two and
then used as internal clock. The maximum internal clock frequency of 8085 is 3.05MHz.
28. What happens to the processor when it is resetted? (AN)
When /RESETIN pin is asserted low, the program counter, instruction register, interrupt
mask bits and all internal registers are cleared. Also the RESETOUT signal is asserted high
to clear all the peripheral devices in the system. After a reset the content of program counter
will be 0000 and so the processor will start executing the program stored at 0000.

29. List the types of semiconductor memories. (UN)

 Static Random Access Memory
 Dynamic RAM
 Read Only Memory
 Erasable Programmable Memory
 Programmable ROM
30. How the microprocessor is synchronized with peripherals? (RE)
The timing and control unit synchronizes all the microprocessor operations with clock and
generates control signals necessary for communication between microprocessor and
peripherals.
31. Why status signals are provided in microprocessor? (RE)
The status signals can be used by the system designer to track the internal operations of the
processor. Also it can be used for memory expansion(by providing separate memory banks
for program and data, and selecting the banks using status signals).
32. List the features of semiconductor memories. (UN)
 The semiconductor memories are random access memories.
 In semiconductor memories, a read operation by the processor will not destroy the stored
information.
 The read and write time of semiconductor memory are compatible for the processor.
33. How the processor differentiates memory access and I/O access? (UN)
The memory access and I/O access is differentiated using IO/(/M) signal. The 8085 processor
asserts IO/(/M) low for memory read/write operations and IO/(/M) is asserted high for I/O
read and write operation.
34. What is interrupt acknowledge cycle? (RE)
The interrupt acknowledge cycle is a machine cycle executed by 8085 processor after
acceptance of the processor to get the address of the high impedance state. Also, the
processor will not sample the READY signal.
35. What is the physical memory space in 8085? (RE)
The 8085 uses 16-bit address memory locations. Hence it can directly address 64K memory
locations. Since 8085 has 8 data lines, it can read/write 8-data bits from a memory address.
Therefore the physical memory space is 64K*1byte = Kilobytes.
36. Why status signals are provided in microprocessor? (RE)
The status signals can be used by the system designer to track the internal operations of the
processor. Also, it can be used for memory expansion (by providing separate memory banks
for program and data, and selecting the banks using status signals).
37. Explain how a microprocessor services an interrupt request? (RE)
When a processor recognizes an interrupt, it saves the processor status in stack. Then it call
and execute an interrupt service routine. At the end of ISR, it restores the processor status and
the program control is transferred to main program.
38. What is masking and why it is needed? (RE)
Masking is preventing the interrupt from disturbing the current program execution. When the
processor is performing an important job and if the process should not be interrupted then all
the interrupts should be masked or disabled.
In processor multiple interrupts, the lower priority interrupt can be masked so as to prevent it
from interrupting, the execution of interrupt service routine of higher priority interrupt.
39. When the processor will disable the interrupt system? (UN)
The interrupts of 8085 except TRAP are disabled after any one of the following operations:
 Executing EI instruction.
 System or processor reset.
 After recognition of an interrupt.
40. What is the role of ISR? (RE)
For each interrupt the processor has to perform a specific job. An interrupt service routine
has been developed in order to perform the operations required for a device that is interrupting
the processor.
41. What is masking and why it is needed? (UN)
Masking is preventing the interrupt from disturbing the current program execution. When
the processor is performing an important job and if the process should not be interrupted
then all the interrupts should be masked or disabled.
In processor multiple interrupts, the lower priority interrupt can be masked so as to prevent
it from interrupting, the execution of interrupt service routine of higher priority interrupt.
42. When the processor will disable the interrupt system? (UN)
The interrupts of 8085 except TRAP are disabled after any one of the following
operations:
 Executing EI instruction.
 System or processor reset.
 After recognition of an interrupt.
43. When the 8085 processor accepts a hardware interrupt? (UN)
The processor keeps on checking the interrupt pins at the second T-state of last machine
cycle of every instruction. If the processor finds a valid interrupt signal and if the interrupt is
unmasked and enabled then the processor accepts the interrupt. The acceptance of the
interrupt is acknowledged by sending an /INTA signal to the interrupting device.
44. Why interfacing is needed for I/O devices? (RE)
Generally I/O devices are slow devices. Therefore the speed of I/O devices does not match
with the speed of microprocessor. And so an interface is provided between system bus and I/O
devices.

PART – B
1. Interpret the functional block diagram, explain the architecture of 8085 microprocessor. (UN)
2. Summarize the pin configuration of 8085 processor and explain them in detail. (UN)
3. Explain 8085 interrupts system in detail.(UN)
4. Draw the timing diagram for I/O read operation and explain. (RE)
5. Draw the timing diagram of opcode fetch machine cycle and Memory read/write cycle. (RE)
6. Illustrate the timing diagram for the execution of instruction MVI B,08 in 8085. (AN)
7. Explain the memory organization of 8085 processor. (RE)
8. Draw and explain the timing diagram of LDA, address in 8085. (AN)

UNIT II
PROGRAMMING OF 8085 PROCESSOR
PART – A

1. List the data manipulation instructions. (Nov/Dec 2014) (RE)

RRC, RAL, RLC, RAR, ORA R, ANA R

2. What is meant by lookup table? (Nov/Dec 2014) (RE)

 In a microprocessor system, a lookup table is an array, that replaces runtime
computations. It replaces them into an easier index operation.
 Look up table is used to reduce the processing time for applications that uses
complex calculations.

3. What is the function of rotate instructions? (April/May 2015) (RE)

Rotate instruction is used to rotate one bit in left or right in the accumulator content.

4. How the time delay generated using subroutine? (April/May 2015) (UN)
 A subroutine is a graph of instructions written separately from the main program
to perform a function that occurs repeatedly in the main program.
 For example, if a time delay is required, delays can be written in the main
program.
 To avoid repetition of the same delay instructions, time subroutine technique is
used.

5. Mention the functioning of CMP instruction. (Nov/Dec 2015) (UN)

 CMP instruction, the content of register or content of memory location is
compared with the content of accumulator.
6. What is addressing? What are the various addressing modes available in 8085? (Dec
201) (RE)
The method of specifying the data to be operated by the instruction is called addressing. The
8085 has the following five different types of addressing.
 Immediate addressing
 Direct addressing
 Register addressing
 Register indirect addressing
 Implied addressing
7. What are the instructions associated with a subroutine? (Dec 2013) (UN)
CALL and RET instructions are associated with subroutine.
8. What is meant by level triggered interrupt? Which of the interrupt in 8085 are level
triggered? (May 2014) (UN)
 A level triggered interrupt is an interrupts signal by maintaining the interrupt line
at high level or low level
 RST 7.5, RST 6.5, RST 5.5, INTR, TRAP are level triggered interrupts.
9. Define mnemonics.(RE)
The short-hand form of describing the instructions is called mnemonics. The mnemonics are
given by the manufacturers of microprocessors and programmable devices.

10. Define opcode and operand. (UN)

Opcode (Operation code) is the part of an instruction / directive that identifies a specific
operation.
Operand is a part of an instruction / directive that represents a value on which the instruction
acts.

11. Write an 8085 program to generate a time delay of 0.4sec given crystal frequency
5MHZ. (EV)
Operating frequency = 5/2 = 2.5MHZ.
Time for one T-state = 1/ 2.5MHZ = 0.4sec.
Number of T-states required = Required Time/Time for 1T-state
 = 0.4sec/ 0.4sec
= 1 x 106
Delay program:
LXI B,COUNT
Loop : DCX B
MOV A,C
ORA B
JNZ Loop
1 x 106 = 10 + (count – 1) x24 +21
Count = 4166610
= A2C2H.
12. What is the similarity and difference between SUB and CMP instruction? (UN)
Similarity: Both the subtraction and comparison are performed by subtracting two data in acc
and flags are altered depending upon the result.
Difference: After the execution of SUB instruction, the result is stored in acc, but after the
execution of compare instruction the result is discarded.
13. What is DAA? (UN)
DAA- Decimal Adjust Accumulator.
After BCD addition, this instruction is executed to get the result in BCD. When
DAA instruction is executed the content of the acc is altered or adjusted as explained
below:
(i) If the sum of lower nibble exceeds 09 or auxiliary carry is set , a correction 06 is
added to lower nibble.
(ii) If the sum of higher nibble exceeds 09 or auxiliary carry is set , a correction 06 is
added to lower nibble.
14. What is the difference between conditional and unconditional branching instructions?
(RE)
In unconditional branch instructions the program control is transferred to branch
address without checking any flag condition. But in conditional branch instructions, a flag
condition is checked and only if the flag condition is true, the program control is transferred
to branch address. Otherwise next instruction is executed.
15. What is DAD and what are the flags affected by this instruction? (UN)
DAD refers Double Addition. This instruction is used to perform addition of two 16-bit
numbers. Syntax: DAD rp.
The content of rp is added to the content of HL pair. After the addition the result will be in
HL pair. The register pair can be BC, DE, HL or Stack pointer.

16. What is the difference between CALL and JMP instruction? (UN)
In CALL instruction, the address of next instruction is pushed into stack before transferring
the program control to call address. But in JMP instruction, the address of next instruction is not
saved.
17. Explain EI and DI. (UN)
DI – Disable Interrupt. When the instruction is executed all the interrupts except TRAP are
disabled. When the interrupts are disabled the processor will not accept or recognize the
interrupt.
EI – Enable Interrupt. This instruction is used or executed to allow the after disabling.
18. State the difference between LDA and LDAX instructions. (RE)
The LDA instruction uses direct addressing mode to load a data byte from memory to
accumulator, but LDAX instruction uses register indirect addressing for the same operation.
In LDA instruction the content of memory location whose address is given in the instruction
is moved to accumulator. In LDAX instruction a register [pair contains the address of the
memory location. The content of memory location whose address is available in register pair
is moved to accumulator.
19. What is the function performed by SIM instruction and RIM instruction? (RE)
SIM – Set Interrupt Mask – the SIM instruction is used to mask the hardware interrupts RST
7.5, RST6.5, and RST 5.5. The execution of SIM instruction output the content of
accumulator to program interrupt mask bits and also used to output serial data on the SOD
line.
RIM – Read Interrupt Mask – the RIM instruction is used to check whether an interrupt is
masked or not. It is also used to read the data from SID line.
20. State the difference between STA and STAX. (UN)
The STA instruction uses direct addressing mode to store the content of the accumulator to a
memory location, but STAX instruction uses indirect addressing mode to the same
operation.
21. What is the function XCHG? (UN)
The content of HL register pair is exchanged with DE pair. No flags are affected.
Example: Before execution: DE – 4500; HL – 6000
After execution: DE – 6000; HL – 4500

22. What is the instruction format of 8085? (UN)

The size of 8085 instruction is one to three bytes. Each instruction has one byte Opcode
the remaining bytes are either data or address.
One byte instruction: Opcode
Two byte instruction: Opcode 8-bit data or address
Three byte instruction: Opcode 16 – bit data or address
23. List the instructions that affect only carry flag. (UN)
1. CMC – complement carry
2. RAR/RAL – Rotate Accumulator Right/ Left through carry
3. STC – Set Carry
4. DAD rp – Double addition
5. RLC/RRC – Rotate Left/Right accumulator to Carry
24. Explain the purpose of the I/O instructions IN and OUT. (RE)
The IN instruction is used to move data from an I/O port into the accumulator. The OUT
instruction is used to move data from the accumulator to an I/O port. The IN and OUT
instructions are used only on microprocessor, which use a separate address space for I/O
interfacing.
25. What is difference between the shift and rotate instruction? (UN)
A rotate instruction is a closed loop instruction. This is, the data moved out at one end is put
back n at the other end. The shift instruction loses the data that is moved out of the last bit
locations.
26. What is an instruction? (UN)
An instruction is a binary pattern or code which is interpreted by the microprocessor to
perform that specific function.
27. What is the significance of XCHG and SPHL instructions? (UN)
XCHG : This instruction exchanges the content of the register H with that of D and of L
with that of E.
SPHL : This instruction copies the content of HL register pair into the stack pointer. The
contents of H register are copied to higher order byte of stack pointer and contents of L
register are copied to the lower byte of stack pointer. This allows indirect way of initializing
stack pointer.
28. Write the machine control instructions of 8085 microprocessor. (UN)
Machine control instructions of 8085 microprocessor are:
EI, DI, NOP, HLT, SIM, RIM
29. Mention the instructions used for data transfer with I / O ports. (UN)
The instructions used for data transfer with I/O ports are: 1. IN addr 2. OUT addr
30. Differentiate cascade stack and memory stack. (UN)
In a cascade stack, CPU registers are used as a stack. In memory stack, the part of memory
is used for stack.
31. List the various instructions that can be used to clear the accumulator. (UN)
The accumulator can be cleared by the following instructions:
(i) MVI A,00H
(ii) SUB A
(iii) ANI 00H
(iv) XRA A
32. What is NOP? State its importance. (RE)
The NOP is a dummy instruction, it neither achieves any results nor affects any CPU
register. This is used for producing software delay and reserve memory spaces for future
software modifications.
33. What is PSW? (UN)
PSW – Program Status Word. The flag register and accumulator together is called PSW.
Flag register is a low order register. The accumulator is a high order register.
34. Explain RET instruction. (UN)
RET – Return to main program. This instruction is placed at the end of the subroutine
program in order to return to the main program. When this instruction is executed, the top of
the stack is poped to the program counter.
35. What will be the content of the SP(stack pointer) after execution of PUSH and POP
instruction? (UN)
(i) After execution of PUSH instruction, the content of a stack pointer will be 02 less
than the earlier value
(ii) After execution of POP instruction, the content of a stack pointer will be 02 greater
than the earlier value
36. How can the result of subtract operation be interpreted?(UN)
(i) After subtract operation, if the carry flag is set (1), then the result is negative and
the result will be in 2’s complement form.
(ii) After subtraction operation, if the carry flag is RESET(0), then the result is
positive.

37. In which unit is the arithmetic and logical operations performed. Which unit is the
destination of the result? (UN)
The arithmetic and logical operations are performed in ALU. After the operation, the
result will be stored in the accumulator.

PART – B
1. With suitable examples, explain the function of various data transfer and data manipulation
instructions of 8085. (UN)
2. Discuss the organizations of the 8085 stack and the various instructions that will operate on
the stack.(UN)
3. Explain the sequence of events in the execution of CALL and RET instructions. (UN)
4. With example explain the different addressing modes of 8085 and the different types of
instruction.(RE)
5. Explain the instruction set of 8085 with examples.(RE)
6. Explain the loop structure with counting and indexing in 8085 programming. (AN)
7. Write an assembly language program based on 8085 microprocessor instruction set to search
the smallest data in a set. (AP)
8. Write an assembly language program based on 8085 microprocessor instruction set to find
the square root of the given number. (AP)
9. Write an assembly language program based on 8085 microprocessor instruction set for
arranging a array of 8bit unsigned number in ascending order. (AP)
10. Compare the similarities and difference of CALL and RET instructions with PUSH and POP
instructions. (UN)

UNIT – III
8051 MICROCONTROLLER
1. What are the I/O instructions used in 8051? (Nov/Dec 2014) (RE)
 IN and OUT instructions is a I/O instruction.
 The IN instructions is used to move data from an I/O port into the accumulator.
 The OUT instruction is used to move data from the accumulator to an I/O port.

2. Write the instruction format for 8051 microcontroller? (April/May 2015) (RE)
The instruction format generally made up of three parts mnemonic destination operand
and source operand.

Menimonic Operands

3. How pulse is generated using 8051 mcirocontroller? (April/May 2015) (RE)

 8051 microcontroller has an in-built on-chip oscillator circuitry.
 The 8051 generated the clock pulse by using a quartz crystal oscillator.
 Pins XTAL 1 and XTAL 2 are provided for connecting a resonant network to
form an oscillator.

4. List the interrupts of 8051 microcontroller. (Nov/Dec 2015) (RE)

INT0, INT1, Timer0, Timer1, Serial port interrupt

5. What are the various flags used 8051? (Dec 2013) (RE)
Sign flag, Zero flag, Auxiliary carry flag, Parity flag, Carry flag
6. Mention the function of EA in 8051 microcontroller. (May 2014) (RE)
EA: EA stands for external access. When the EA pin is connected to Vcc, program fetched to
addresses 0000H through 0FFFH are directed to the internal ROM and program fetches to
addresses 1000H through FFFFH are directed to external ROM/EPROM. When the EA pin is
grounded, all addresses fetched by program are directed to the external ROM/EPROM.

7. What is mean by microcontroller? (UN)

A device which contains the microprocessor with integrated peripherals like memory, serial
ports, parallel ports,timer/counter,interrupt controller, data acquisition interfaces like
ADC,DAC is called microcontroller.

8. Explain DJNZ instructions of intel 8051 microcontroller? (UN)

a. DJNZ Rn, rel
Decrement the content of the register Rn and jump if not zero.
b. DJNZ direct , rel
Decrement the content of direct 8-bit address and jump if not zero.

9. State the function of RS1 and RS0 bits in the flag register of intel 8051
microcontroller? (UN)
RS1 , RS0 – Register bank select bits
RS1 RS0 Bank Selection
0 0 Bank 0
0 1 Bank 1
1 0 Bank 2
1 1 Bank 3

10. Write a program using 8051 assembly language to change the date 55H stored in the
lower byte of the data pointer register to AAH using rotate instruction. (AN)
MOV DPL,#55H
 MOV A, DPL
RL A
Label :SJMP label

11. Give the alternate functions for the port pins of port3? (UN)

R RD WR T1 T0 INT1 INT0 TXD RXD

RD - Read data control output.

WR -Write data control output.
T1 - Timer / Counter1 external input or test pin.
T0 -Timer / Counter0 external input or test pin.
INT1- Interrupt 1 input pin.
INT 0 - Interrupt 0 input pin.
TXD -Transmit data pin for serial port in UART mode.
RXD - Receive data pin for serial port in UART mode.
12. Explain the function of the pins PSEN of 8051. (RE)
PSEN: PSEN stands for program store enable. In 8051 based system in which an external
ROM holds the program code, this pin is connected to the OE pin of the ROM.

13. Explain the DPTR of 8051. (RE)

DPTR: DPTR stands for data pointer. DPTR consists of a high byte (DPH) and a low byte
(DPL). Its function is to hold a 16-bit address. It may be manipulated as a 16-bit data register or
as two independent 8-bit registers. It serves as a base register in indirect jumps, lookup table
instructions and external data transfer.
14. Explain the 16-bit register SP of 8051. (UN)
SP: SP stands for stack pointer. SP is a 8- bit wide register. It is incremented before data is stored
during PUSH and CALL instructions. The stack array can reside anywhere in on-chip RAM. The
stack pointer is initialized to 07H after a reset. This causes the stack to begin at location 08H.
15. Name the special functions registers available in 8051. (RE)
(i) Accumulator
(ii) B Register
(iii)Program Status Word.
(iv) Stack Pointer.
(v) Data Pointer.
(vi) Port 0
(vii) Port 1
(viii) Port 2
(ix) Port 3
(x) Interrupt priority control register.
(xi) Interrupt enable control register.
16. Write down the different operating modes for serial communication of 8051. (UN)
Serial communication of 8051 operates under four modes. They are mode 0, mode1,
mode 2 and mode3 .SM0 and SM1 bits of SCON register specifies the mode.
SM0 SM1 MODE
0 0 0 Baud rate fixed.
0 1 1 8-bit data, 1 stop bit, 1 start bit. Baud
rate variable.
1 0 2 8-bit data,9th programmable bit, 1
stop bit,1 start bit, Baud rate fixed.
1 1 3 8- Bit data,9th programmable bit,1
stop bit,1 start bit, Baud rate variable.

17. Explain the register IE format of 8051. (RE)

EA - ET2 ES ET1 EX1 ET0 EX0
EA - Enable all control bit.
ET2 - Timer 2 interrupt enable bit.
ES - Enable serial port control bit.
ET1 - Enable Timer1 control bit.
 EX1 - Enable external interrupt1 control bit.
ET0 - Enable Timer0 control bit.
EX0 -Enable external interrupt0 control bit.
18. List the features of 8051 microcontroller? (RE)
The features are
 Single supply +5 volt operation using HMOS technology.
 4096 bytes program memory on chip(not on 8031)
 128 data memory on chip.
 Four register banks.
 Two multiple mode,16-bit timer/counter.
 Extensive Boolean processing capabilities.
 64 KB external RAM size
 32 bidirectional individually addressible I/O lines.
 8 bit CPU optimized for control applications.
19. What are SFRs? (RE)
The SFRs(Special Function Register) are internal registers of microcontroller dedicated for
specific functions. These registers can be used only for their specified/ defined functions and
cannot be used for an other functions. In microcontrollers the SFRs are mapped as internal data
memory and can be accessed by direct addressing.

20. What are the register banks of 8051? (UN)

The register banks are internal RAM locations of 8051 which can be used as general purpose
registers or scratch pad registers. The first 32 bytes of internal RAM of 8051 are organized as
register banks with each bank consisting of 8 locations. At any one time the processor can work
with only one register bank depending on the value of bits RS0 and RS1 in the PSW register

21. How stack is implemented in 8051? (UN)

The 8051 supports LIFO (Last In First Out) stack and the stack can reside anywhere in the
internal RAM. The 8051 has 8-bit stack pointer to indicate the top of stack. The stack can be
accessed using PUSH and POP instructions. During PUSH the SP is automatically incremented
by one and during POP the SP is automatically decremented by one.
22. Compare Microprocessor and Microcontroller. (UN)

S.No Microprocessor Microcontroller

1 Microprocessor contains Microcontroller contains the circuitry of
ALU,general purpose registers,stack microprocessor and in addition it has
pointer, program counter, clock built- in ROM, RAM, I/O devices, timers
timing circuit and interrupt circuit. and counters.
2 It has many instructions to move data It has one or two instructions to move
between memory and CPU. data between memory and CPU.
3 It has one or two bit handling It has many bit handling instructions.
instructions.
4 Access times for memory and I/O Less access times for built-in memory
devices are more. and I/O devices.
5 Microprocessor based system Microcontroller based system requires
requires more hardware. less hardware reducing PCB size and
increasing the reliability.

23. What are the operating modes of the timer of 8051? (RE)
The operating modes of the timers of 8051 are mode-0, mode-1, mode-2 and mode-3. In
mode-0 the timers will function as 13-bit timers and in mode-1 the timers will function as 16-
bit timers will function as 16- bit timers. In mode-2 the timers will function as 8-bit timers
with auto reload feature. The timer-0 alone can work in mode-3 and in this mode the TL0
will function as 8-bit timer controller by standard timer-0 control bits and TH0 will function
as 8-bit timer controlled by the timer-1 control bits.

24. What is PSW? Draw its format. (UN)

The Program Status Word store the status of the result of ALU operation and some of the status
of processor by means of 1-bit status called flags. The PSW is also known as flag register. The
flags are useful for the programmer to test the condition of the result and make decisions.
C AC - RS1 RS0 OV - P
P- Parity flag
OV – Overflow flag
 C – Carry flag
AC – Auxiliary flag
RS1 and RS0 – Register bank selection

25. What is the function of TMOD and PCON register? (UN)

The TMOD register is used to select the operating modes and the timer/counter operation
of timers.
The PCON register is used for power control and baud rate selection. It also consists of
general purpose user flags.

26. What is Idle mode? (RE)

The controller can be driven to idle mode by setting IDL bit of PCON register. When idle
mode is activated the clock signal is supported to CPU (ALU), but the clock signal is
supplied to interrupt, timer and serial port blocks. The idle mode can be terminated either by
an interrupt or by hardware reset.

27. What is Power down mode? (RE)

The controller can be driven to power down mode by setting PD bit of PCON register.
During power down mode the internal oscillator is stopped, and the content of SFR and
internal RAM are preserved. When the controller remains in power down mode, the Vcc can
be reduced to 2V. the power down mode can be terminated only by a hardware reset and
during hardware reset the content of SFR are altered but the content of internal RAM are
preserved.

28. How the 8051 controller differentiates external program memory access and internal
memory access? (UN)
With external program memory the controller can perform only read operation but with
external data memory the controller can perform both read and write operation. For reading
program memory the controller asserts /PSEN as low. For reading data memory the
controller asserts /RD as low, and for writing data memory the controller asserts /WR as low.
25. What is ISR? (UN)
The program which is associated with the interrupt is called Interrupt service Routine or
Interrupt handler. When an interrupt is invoked, the microcontroller runs the ISR. For every
interrupt, there is a fixed location in memory that holds the address of its ISR. The group of
memory locations set aside to hold the addresses of ISR is called the interrupt vector table.

26. What is timer overflow? (RE)

The timers of 8051 microcontrollers are upcounters and they keep on incrementing as long as
clock is applied. Therefore when clock is applied after reaching maximum value (the content of
counter is all 1s), the content of counter will become zero (all zeros). This condition is called
timer overflow and this is the end of timing which a program wants to maintain by using the
timer.

27. How to estimate the time taken to execute an instruction in 8051 controller?
The time taken to execute an instruction by 8051 controller is obtained by multiplying the time
to execute a machine cycle by the number of machine cycles of the instruction. The time to
execute a machine cycle is 12 clock periods.
.˙. Time to execute an instruction = C*12*T = C*12 / f
Where C – Number of machine cycles of an instruction
T – Time period of crystal frequency in sec.
f – Crystal frequency.
28. What is the function of ALE pin in microcontroller 8051? (RE)
Address Latch Enable is an output pin and is active high. When connecting an 8051 to
external memory, port 0 provides both address and data. In other words the 8051 multiplexes
address and data through port 0 to save pins. The ALE pin is used for demultiplexing the address
and data by connecting to the G pin of the 74LS373chip.

29. List the interrupts available in 8051. (UN)

The 8051 microcontroller has five interrupts. In this two interrupts are external interrupts (INT0
and INT1) and the remaining are internal interrupts (T0, T1 and serial port interrupt).
30. Explain the function of SM2 bit in SCON register. (UN)
The Serial Mode bit 2 (SM2) has no effect in mode 0 and when programmed for mode 0, the
SM2 should be zero. In mode 1, SM2 is used to check a valid stop bit during reception. In mode
1, if SM2=1, then RI is activated only when a stop valid stop bit is received.

31. Explain register indirect addressing in 8051. (UN)

In register indirect addressing, the instruction specifies the name of the register in which the
address of the data is available. The internal data RAM locations can be addressed indirectly
through registers R1 and R0. The external RAM can be addressed indirectly through DPTR.
Ex: MOV a,@R0 – the content of RAM location addressed by R0 is moved to A-register.

32. How the program memory is organized in 8051 based system? (UN)
In 8051 based system the entire 64Kb program memory can be external or 4Kb I internal and the
remaining 60Kb is external. This is decided by the logic level of the signal at /EA pin. When /EA
pin is tied high the first 4Kb of program memory is internal and remaining 60Kb is external.
When /EA pin is tied low the internal ROM is ignored and entire 64Kb is external.

33. Explain relative addressing in 8051.(UN)

In relative addressing mode, the instruction specifies the address relative to program counter.
The instruction will carry an offset whose range is -128 to +127. The offset is added to PC to
generate 16-bit physical address.
EX: JC offset – if carry is one then the program control jump to an address obtained by
adding the content of PC and offset value in the instruction.
34. Explain direct addressing in 8051? (UN)
In direct addressing mode, the address of the data is directly specified in the instruction. The
direct address can be the address of an internal data RAM location (00 to 7F) or address of a
special function register (80 to FF).
EX: MOV A, 07 – the address of R7 register of bank -0 is 07. This instruction will move
the content of R7 register to A-register.
35. What is the function of SBUF? (UN)
The SBUF register is used to hold the parallel data during transmission and reception. During
serial reception, the serial data is received via RxD pin and converted to parallel data and stored
in receive buffer. During serial transmission, the parallel data is stored in transmit buffer and
then converted to serial data via TxD pin.
36. Explain the operation of timers in mode-2. (UN)
In mode-2, the timers function as 8-bit timer with automatic reload feature. The TL register will
function as 8-bit timer count register and the TH register will hold an initial count value. When
the timer is started, the initial value in TH is loaded to TL and for each clock input to timer the 8-
bit timer register is incremented by one. When the timer count over from all 1s to all 0s , the
interrupt flag in TCON register is set to one and the content of TH register in TL register and the
count process starts again from this initial value.
37. Write program to clear ACC then add 3 to the accumulator ten times. (AN)
MOV A, #00
MOV R2, #10
REPT: ADD A, #03
DJNZ R2, AGAIN
MOV R5, A
38. The following shows the crystal frequency for three different 8051 based systems. Find
the period of the machine cycle in each case. i. 11.0592MHz ii. 16MHz iii. 20MHz (EV)
Solution:
i. 11.0592/12 = 921.6KHz;
machine cycle is 1/921.6KHz = 1.085μs
ii. 16MHz / 12 = 1.333 MHz
Machine cycle is 1/1.333MHz = 0.75 μs
iii. 20MHz / 12 = 1.66 MHz
Machine cycle is 1/1.66MHz = 0.60 μs
 Part-B
1. Summarize the interrupt structure in 8051 in detail. (RE)
2. Explain the different addressing modes in 8051 in detail (UN)
3. Explain the different modes of operation of timers in 8051 (RE)
4. Explain the following functional units in Microcontroller 8051 (UN)
a. I/O Ports
b. Serial Communication.
5. With neat functional block diagram, explain the architecture of 8051
microcontroller.(RE)
6. With explain the instruction set of 8051 with examples.(RE)
7. Explain the memory organization of 8051 controller.(UN)
8. Explain the pin details of 8051 controller.(UN)

UNIT – IV
PERIPHERAL INTERFACING

1. What is USART? Nov / Dec 2010 (UN)

The device which can be programmed to perform Synchronous or Asynchronous serial
communication is called USART (Universal Synchronous Asynchronous Receiver
Transmitter). The INTEL 8251A is an example of USART.
2. What is debouncing? Nov / Dec 2010 (RE)
When a key is, pressed it bounces for a short time. If a key code is generated immediately after
sensing a key actuation, then the processor will generate the same key code a number of times.
(A key typically bounces for 10 to 20 msec). Hence the processor has to wait for the key
bounces to settle before reading the key code. This process is called keyboard debouncing.

3. List out the operating modes in 8254 Timer/Counter. (RE) (Nov /Dec 2014)
Mode 0: Interrupt on terminal count
Mode 1: Programmable one-shot
Mode2: Rate generator
Mode 3: Square wave generator
 Mode4: Software triggered mode
Mode5: Hardware triggered mode

4. Mention the registers used for serial communication in 8051 microcontroller. (RE)
(Nov /Dec 2014)
PCON, SCON, TMOD, TCON
5. What is the need for interrupt controller? (RE)
The interrupt controller is employed to expand the interrupt inputs. It can handle the
interrupt request from various devices and allow one by one to the processor.

6. List some of the features of INTEL 8259 (Programmable Interrupt Controller )(RE)
 It manages eight interrupt requests.
 The interrupt vector addresses are programmable.
 The priorities of interrupts are programmable.
 The interrupt can be masked or unmasked individually.
7. Write the various functional blocks of INTEL 8259?(UN)
The various functional blocks of 8259 are Control logic, Read/ Write logic, Data bus
buffer, IRR, ISR, IMR, Priority resolver and cascade buffer
IRR - Interrupt Request Register
ISR - In-Service Register
IMR Interrupt Mask Register
8. What is Master and Slave 8259? (UN)
When 8259's are connected in cascade, one 8259 will be directly interrupting 8085 and it is
called master 8259, To each interrupt request input of master 8259, one slave 8259 can be
connected, The 8259 's interrupting the master 8259 are called slave 8259.
9. How 8259 is programmed? (UN)
The 8259 is programmed by sending
i) Initialization Command Words (ICWs) and
ii) Operational Command Words (OCWs).
10. What are the functions of 8259 that are programmed using ICW’s? (UN)
The ICW’s are used to program the following features of 8259:
 Call address interval
 Cascade mode or single mode
 Level or edge triggered
 Vector address or type number
 8085 or 8086 mode
 auto or normal end of interrupt
 Special fully nested mode.
11. What is the difference in programming master 8259 and slave 8259? (UN)
The ICW 3 will be different for master 8259 and slave 8259. for master, the ICW 3 will
inform the IR input that are having slaves. For slave, the ICW3 will inform it has slave ID
number.
12. What is a programmable peripheral device? (UN)
If the functions performed by a peripheral device can be altered or changed by a program
instruction then the peripheral device is called programmable device. Usually the
programmable devices will have control registers. The device can be programmed by
sending control word in the prescribed format to the control register.
13. What is handshake port? (UN)
In handshake port, signals are exchanged between I/O device and port or port and processor
for checking or informing various condition of the device.
14. Explain the working of a handshake input port. (UN)
In handshake input operation, the input device will check whether the port is empty or not. If
the port is empty then it will load data to port. When the port receives the data, it will inform
the processor for read operation. Once the data have been read by the processor, the port will
signal the input device that it is empty. Now the input device can load another data to port
and the above process is repeated.
15. What are the functions performed by port-C of 8255? (RE)
 The port-C pins are used for handshake signals.
 Port-C can be used as an 8-bit parallel 1/0 port in mode-0.
 It can be used as two numbers of 4-bit parallel port in mode-0.
  The individual pins of port-C can be set or reset for various control

16. What are the different scan modes of 8279? (RE) Nov / Dec 2010
The different scan modes of8279 are decoded scan and encoded scan. In decoded scan mode,
the output of scan lines will be similar to a 2-to-4 decoder. In encoded scan mode, the output of
scan lines will be binary count, and so an external decoder should be used to convert the binary
count to decoded output.
17. What is baud rate? (RE)
The baud rate is the rate at which the serial data are transmitted. Baud rate is defined as l/
(The time for a bit cell). In some systems one bit cell has one data bit, then the baud rate and
bits/sec are same.
18. What are the functions performed by INTEL 8251A? (RE)
The INTEL 825lA is used for converting parallel data to serial or vice versa. The data
transmission or reception can be either asynchronously or synchronously. The 8251A can be
used to interface MODEM and establish serial communication through MODEM over telephone
lines.
19. What are the control words of 8251A and what are its functions? (RE)
The control words of 8251A are Mode word and Command word. The mode word informs
8251 about the baud rate, character length, parity and stop bits. The command word can be
send to enable the data transmission and reception.
20. What is the difference in programming the 8279 for encoded scan and decoded scan?
If the 8279 is programmed for decoded scan then the output of scan lines will be decoded output
and if it is programmed for, encoded scan then the output of scan lines will be binary count. In
encoded mode, an external decoder should be used to decode the scan lines.
21. What are the different types of ADC? (RE)
The different types of ADC are successive approximation ADC, counter type ADC flash type
ADC, integrator converters and voltage-to-frequency converters.
22. What is DMA Controller? (RE)
Direct Memory Access is an I/O technique used for high speed data transfer. In DMA, the MPU
releases the control of the buses to a device called a DMA controller. The controller manages
data transfer between memory and a peripheral under its control, thus bypassing the MPU.
23. Explain the function of in-service register, masking register and interrupt request
register of 8259? (UN)
In-service Register: ISR stores all the levels that are currently being serviced.
Masking Register: IMR stores the masking bits of the interrupt lines to be
masked.
Interrupt Request Register: IRR stores the interrupt request, when interrupt
request lines goes high.
24. What is synchronous data transfer scheme? (UN)
In synchronous data transfer scheme, the processor does not check the readiness of the device
after a command has been issued for read/write operation. In this scheme the processor will
request the device to get ready and then read/write to the device immediately after the request.
25. What is asynchronous data transfer scheme? (UN)
In asynchronous data transfer scheme, first the processor sends the request to the device for
read/write operation. Then the processor keeps on polling the status of the device. Once the
device is ready, the processor executes a data transfer instruction to complete the process.

26. What are the tasks involved in keyboard interface?(UN)

The task involve in keyboard interfacing are sensing a key actuation, debouncing the key and
generating key codes (decoding the key). These tasks are performed by software if the keyboard
is interfaced through ports and they are performed by hardware if the keyboard is interfaced
through 8279.

27. What is scanning in keyboard and what is scan time? (RE)

The process of sending zero to each row of a matrix and the columns for key actuation is called
scanning. The scan time is the time taken by the device or processor to scan all the rows and
columns back to the first row again.
28. What is the disadvantage in keyboard interfacing using ports? (RE)
The disadvantage in keyboard interfacing using ports is the most of the processor time is utilized
in keyboard scanning and debouncing. As a result the computational speed/efficiency of the
processor will be reduced.

29. What is multiplexed display? What is its advantage? (RE)

The process of switching ON the display devices one by one for a specified time interval is
called multiplexed display. The advantage in multiplexed display is that the power requirement
of the display devices is reduced to a very large extent.

30. List the functions performed by 8279.(UN)

 Keyboard scanning
 Key debouncing
 Key code generation
 Informing the key entry to CPU
 Output display codes to LEDs
 Display refreshing

31. What are programmable display features of 8279? (UN)

The 8279 can be used for interfacing LEDs or 7 segment LEDs. In decoded scan, 4 numbers of
7-segment LEDs can be interfaced and in encoded scan mode, a maximum of 16 numbers of 7
segment LEDs can be interfaced. The 8279 can be programmed for left entry or right entry.
32. What are the different scan modes of 8279?(UN)
The different scan modes of 8279 are decoded scan and encoded scan mode. In decoded scan
mode the output of scan lines will be similar to a 2-to-4 decoder. In encoded scan modes, the
output of scan lines will be binary count, and so external decoder should be used to convert the
binary count to decoded output.

33. When ICW4 is send to 8259? (UN)

The ICW4 is send to perform anyone of the following feature:
 8085 or 8086 mode
  Special fully nested mode
 Auto or Normal end of interrupt.
 Buffered or Non-buffered mode.

34. Write a program segment to initialize a single 8259 connected to 8085 processor. (AP)
MVI A, ICW1
OUT 00
MVI A, ICW2
OUT 01
MVI A, OCW1
OUT 01
HLT

35. What is simplex data transmission? (RE)

A simplex data line can transmit data only in one direction. Data from sensors to
processor and commercial radio stations are examples of simplex transmission.

36. What is Half – duplex transmission? Give example. (RE)

Half – duplex transmission means that communication can take place in either
direction at a time. An example of half duplex transmission is a two-way radio system, where
one user always listens while the other talks because the receiver circuitry is turned off during
transmit.
37. What is full – duplex transmission? (RE)
The term full – duplex transmission means that each system can send and receive data at the
same time. A normal phone conversation is an example of a full – duplex operation.

38. What is RS232 standard? (UN)

The RS232 is serial bus consisting of a maximum of 25 signals. This bus signals are
Standardized by EIA (Electronics Industries Association), USA and adopted by IEEE.
Usually the first 9 – signals are sufficient for most of the serial data transmission. The RS
232 serial bus is usually terminated using either a 9 – pin connector or a 25 – pin connector.
39. What voltage levels are used in RS232 serial communication standard? (UN)
The voltage levels for all RS232 signals are,
Logic low = -3 to -15V under load (-25V on no load)
Logic high = +3 to +15V under load (+25V on no load)
Commonly used voltage levels are +12V and -12V.

40. How the RS232 serial bus is interfaced to TTL logic device?(RE)
The RS232 signal voltage levels are not compatible with TTL logic levels. Hence for
interfacing TTL devices using RS232 serial bus, level converters are used. The popularly
used level converters are MC 1488 and MC 1489 or MAX232.

41. What is the advantage in using INTEL 8279 for keyboard and display interfacing?(RE)
When 8279 is used for keyboard and display interfacing, it takes care of the entire task involved
in keyboard scanning and display refreshing. Hence the processor is relieved from the task of
keyboard scanning, debouncing, keyboard generation and display refreshing, and so the
processor time can be more efficiently used for computing.

42. What are the programmable features of 8279? (UN)

The 8279 can be used for interfacing LEDs or 7 segment LEDs can be interfaced and in
encoded scan, a maximum of 16 numbers of 7-segment LEDs can be interfaced. The 8279
can be programmed for left entry or right entry.
43. How a key code matrix is formed in keyboard interface using 8279? (UN)
The return lines RL0 to RL7 of 8279 are used to form the columns of keyboard matrix. In
decoded scan lines SL0 to SL3 of 8279 are used to form the rows of keyboard matrix. In
encoded scan mode, the scan lines SL0 to SL3 are connected to input of a decoder and the
output lines of decoder are used as rows of keyboard matrix.

44. What is block and demand transfer mode DMA? (RE)

In block transfer mode, the DMA controller will transfer a block of data and relieve the bus
to processor. After sometime another block of data is transferred by DMA and so on.
 In demand transfer mode the DMA controller will complete the entire data transfer at a
stretch and then relieve the bus to processor.

45. Write the various functional blocks of INTEL 8259? (RE)

The various functional blocks of 8259 are Control logic, Read/ Write logic, Data bus
buffer, IRR, ISR, IMR, Priority resolver and cascade buffer
IRR - Interrupt Request Register ISR - In-Service Register
IMR Interrupt Mask Register

46. What is Master and Slave 8259? (RE)

When 8259's are connected in cascade, one 8259 will be directly interrupting 8085 and it is
called master 8259, To each interrupt request input of master 8259, one slave 8259 can be
connected, The 8259 's interrupting the master 8259 are called slave 8259.

Part - B
1. Explain the architecture of USART 8251 in detail with neat block diagram and describe the
mode, command and status control words in it. (RE)
2. With neat block diagram, explain the architecture of 8259 PIC. (UN)
3. With necessary diagrams explain the different modes of operations of 8253
Timer/Counter.(RE)
4. Explain the functional block diagram of 8255 PPI in detail. (RE)
5. With necessary diagrams explain the different modes of operations of 8279 Keyboard display
controller.(RE)
6. Summarize the interfacing ADC with 8051 microcontroller. (RE).
 UNIT V
MICRO CONTROLLER PROGRAMMING AND APPLICATIONS

1. What is meant by PSW? (Nov/Dec 2015) (RE)

 PSW is also called a flag register
 It is a bit addressable register
 It is an 8 bit status register
2. How the 8051 instructions can be classified? (Nov/Dec 2015) (RE)
The 8051 instructions can be classified into the following five groups.
 Data transfer instructions
 Arithmetic instructions
 Logical instructions
 Branching instructions
 Boolean instructions
3. What is the function of GATE in TMOD register? (Nov/Dec 2014) (RE)
The GATE bit in TMOD register will facilitate the external signal applied to /INT pin to act
as additional control signal to allow or disallow the clock input to timer. When GATE = 1,
the clock input to timer is allowed only if the signal at /INT pin is high and when GATE = 0
the signal at /INT pin is ignored.
4. List the various machine cycles of 8051? (UN)
The various machine cycles of 8051 microcontroller are,
 External program memory fetch cycle
 External data memory read cycle
 External data memory write cycle.
 Port operation cycle.
5. What is stepper motor and advantages of stepper motor? (RE)
A stepper motor is a widely used device that translates electrical pulses into mechanical
movement.
Advantages:
 It is ideal in an open loop positional system
 Adaptable for high velocity applications
6. What are the applications of stepper motor? (UN)
 Disk drives
 Dot matrix printers
 Robotics and
 Position control applications

7. What are the modes of washing machine control? (UN)

Normal mode, save mode

8. How the DC motor interfacing with microcontroller. (RE)

A typical DC motor will take electronic pulses and convert them to mechanical motion
with the help of microcontrollers.
9. Write an ALP to make port 1 as an input port and receive data through this port and
store in R7,R6 and R5. (EV)
MOV A,#FF
MOV P1,A
MOV A,P1
MOV R7,A
ACALL DELAY
MOV A,P1
MOV R6,A
ACALL DELAY
MOV A,P1
MOV R5,A

10. Write a program to copy a block of 10 bytes of data from RAM locations starting at 35
to RAM locations starting at 60. (EV)
MOV R0, #35
MOV R1, # 60
MOV R3, #10
 BACK: MOV A, @R0
MOV @R1,A
INC R0
INC R1
DJNZ R3,BACK

11. What is signal conditioning? (RE)

Signal conditioning is widely used in data acquisition. The most common transducers produce an
output in the form of voltage, current, charge, capacitance, and resistance. However we need to
convert these signals to voltage in order to send input to an ADC. This conversion is called
signal conditioning or signal amplification.
12. What is subroutine or procedure? (UN)
A subroutine is a group of instructions written separately from the main program to perform a
function that occurs repeatedly in the main program.
13. Explain the function of DAA instruction. (RE)
This instruction is executed after addition of two packed BCD data to convert the result in result
in accumulator to packed BCD data. If the lower nibble of accumulator is greater than 09 or AC
flag is set then it is corrected by adding 06. if the upper nibble of accumulator is greater than 09
or C flag is set, then it is corrected by adding 06.
14. What is the function of SWAP? (RE)
The higher nibble of accumulator is exchanged with lower nibble of accumulator.
15. Write an assembly language program to multiply two numbers of 8-bit data stored in
memory 3000 and 3001 an store the product in 3500 and 3501. (EV)
MOV DPTR, #3000
MOVX A,@DPTR
MOV B,A
INC DPTR
MOVX A,@DPTR
MUL AB
INC DPTR
MOVX @DPTR,A
 INC DPTR
MOV A,B
MOVX @DPTR,A
HALT:SJMP HALT
END
16. What are the operations of washing machine? (RE)
Fill, agitate, soak, drain, spin

17. What are the various control knobs available in washing machine? (RE)
Load select knob, water inlet knob, mode select knob, program select knob
18. What are the advantages of subroutine? (RE)
 Modular programming: the various tasks in a program can be developed as separate
modules and called in the main program.
 Reduction in the amount of work a program development time.
 Reduces memory requirement for program storage.

Part-B

1. Explain the LCD display interfacing with Microcontroller 8051. (RE)

2. Summarize the Microcontroller 8051 based DC motor Speed control. (UN)
3. Interface a 20 X 2 LCD with 8051 microcontroller and write assembly language
program to display the following message in it at the middle (AP)
HELLO! ALL
ARE WELCOME
4. Interpret the ADC interfacing with Microcontroller 8051. (UN)
5. Interpret the DAC interfacing with Microcontroller 8051.(UN)
6. Explain the Microcontroller 8051 based Stepper motor Speed control.(AP)
7. Explain the Sensor interfacing with Microcontroller 8051.(AP)
8. Explain the Keyboard interfacing with Microcontroller 8051.(AP)
9. Explain how to interface 8051 with washing machine.(AP)