EE 574 Advanced Microprocessor Systems

1/2 ME, EEE, Semester I

Power Systems and Power Electronics
Elective

UNIT I - 8086 and 8087 Microprocessors

Session 2 – 8086 Microprocessor - Addressing Modes

Instructor: N.Vasantha Gowri

Assistant Professor, EEE Dept.
CBIT, Hyderabad
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Syllabus
✓ Unit I
▪ 8086 Microprocessor
▪ 8086 Microprocessor Architecture
▪ Segmented Memory
▪ Addressing Modes
▪ Instruction Set
▪ 8086 Assembly Language Programming
▪ 8087 Numerical Data Processor
(Math Coprocessor )
▪ Architectural Details
▪ Data types
▪ Floating Point Operations
▪ 8087 Instructions

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 8086 Instruction Set and Assembler EE 574

Directives
2.1 Machine Language Instruction formats: Ref
A machine language instruction format has one or more [3]
number of fields associated with it.
First field – operation code or opcode – indicates the type of
operation to be performed by the CPU
Other fields – operands – CPU executes the instruction using the
information in these fields

There are 6 formats of instructions.

The length of instruction varies from 1 byte to 6 bytes

1. One byte instruction

- Instruction is only one byte long
- may have implied data or register operands
- 3 LSBs used for specifying register operand, if any
- Otherwise, all 8 bits form opcode and operands are implied
2. Register to register
- Format is 2 bytes long
- The first byte contains opcode and W bit - width of operand
- Second byte shows register operands and R/M field

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 8086 Instruction Set and Assembler EE 574

3.
Directives
Register to/from Memory with no Displacement Ref
- Format is 2 bytes long [3]
- Similar to register to register format except MOD field as
shown

4. Register to/from Memory with Displacement

- contains one or two additional bytes for displacement along
with 2 bytes of register to/from memory with no displacement

5. Immediate Operand to Register

- first byte and 3 bits from second byte are used for REG field
in case register to register format is used in opcode.
- Also contains one or two bytes of immediate data.

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 8086 Instruction Set and Assembler EE 574

6.
Directives Ref
Immediate Operand to Memory with 16 bit Displacement
- Format is 5 to 6 bytes long [3]
- First 2 bytes contain opcode, MOD, R/M
- Remaining 4 bytes contain
2 bytes of displacement
2 bytes of data

Normally opcode appears in the first byte

But in a few instructions, register destination is in the first byte
a few other instructions, 3 bits of opcode in the second byte

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 8086 Instruction Set and Assembler EE 574

Directives
The opcodes have single bit indicators Ref
[3]
W-bit – indicates whether the instruction is to operate on 8-bit or
16-bit data/operand
W = 0 -> operand = 8 bits
W = 1 -> operand = 16 bits
D-bit – valid in the case of double operands
- One of the operands must be a register specified in REG field
- if D = 0, register specified by REG is source
- if D = 1, register specified by REG is destination
S-bit – sign extension bit
- used along with W-bit to show the type of operation
S = 0, W= 0 8-bit operation with 8-bit immediate operand
S = 0, W= 1 16-bit operation with 16-bit immediate operand
S = 1, W= 1 16-bit operation with a sign extended immediate
data
V-bit – used in case of shift and rotate instructions
if V = 0, shift count = 1
if V = 1, shift count is contained in CL
Z-bit – bit is used by REP instruction to control the loop
if Z = 1, the instruction with REP prefix is executed
until the zero flag matches the Z-bit.

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 8086 Instruction Set and Assembler EE 574

Directives
REG code for different registers (source or destination) is assigned
with binary
Segment registers - 4 numbers – 2 bits needed
Other registers – 8 numbers – 3 bits needed Ref
[3]
- To use 16-bit registers, they are coded with W = 1.

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 EE 574
8086 Addressing Modes
Usually all addressing modes have DS as default data segment Ref
- Addressing modes using BP and SP have SS as default [3]
segment register.
To find MOD and R/M fields – need to know the addressing mode.
Addressing mode depends on operands and suggests how the
effective address is computed for locating the operand, if it is
memory.
Different addressing modes of 8086 instructions are listed in
Table 2.2.
R/M column and addressing mode row element specifies the R/
M field
Addressing mode column specifies the MOD field

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 EE 574
8086 Addressing Modes
2.2. Addressing Modes of 8086
- Addressing mode indicates the way of locating data or
operands.
Ref
Depending on the data types used, an instruction may belong
to one or more addressing modes. [3]
Some instructions may not belong to any addressing mode.
Addressing modes describe the types of operands and the way
they are accessed for executing an instruction.

According to the flow of instructions, instructions are categorized

as
(i) Sequential control flow instructions
- instructions which after execution, transfer the control to
the next instruction appearing immediately after it (in the
sequence) in the program.
Example: arithmetic, logical, data transfer and processor
control instructions
(ii) Control transfer instructions
- transfer control to some predefined address or the address
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somehow specified in the instruction after execution.
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8086 Addressing Modes
Addressing modes of sequential control flow instructions Ref
1. Immediate [3]
- Immediate data is a part of the instruction and appears as
successive byte or bytes.
Example 2.1 MOV AX, 0005H
0005H is the data. Immediate data may be 8 bits or 16 bits
long.
2. Direct
- 16-bit memory address (offset) is directly specified in the
instruction.
Example 2.2 MOV AX, [5000H]
Data is in memory location in the data segment with effective
address calculated using 5000H as offset.
Effective address 10H*DS + 5000H
3. Register
- Data is stored in a register and it is referred using the
particular register
- All registers except IP may be used in this mode.
Example 2.3 MOV BX, AX 10
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8086 Addressing Modes
Addressing modes of sequential control flow instructions Ref
4. Register Indirect [3]
- Address of the memory location in which the data or
operand is located is determined in an indirect way, using
offset registers.
- in this mode, offset address is either BX, SI, or DI register.
- Default segment is either DS or ES
Example 2.4 MOV AX, [BX]
Data is present in memory location in DS with offset address
in BX.
The effective address 10H*DS + [BX]
5. Indexed
- offset of the operand is stored in one of the index registers.
- DS and ES are default segment registers for index registers SI
and DI, respectively.
- This mode is a special case of register indirect addressing
mode
Example 2.5 MOV AX, [SI]
Data is available at an offset address stored in SI in DS. 11
Effective address 10H*DS + [SI]
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8086 Addressing Modes
Addressing modes of sequential control flow instructions Ref
6. Register Relative [3]
- Data is stored at an effective address formed by adding an 8-
bit or 16-bit displacement with the contents of any one of the
registers BX, BP, SI, DI in the default (DS or ES) segment.
Example 2.6 MOV AX, 50H[BX]
Effective address 10H*DS + 50H + [BX]
7. Based Indexed
- Effective address of data is formed by addressing content of a
base register (BX or BP) to the content of an index register (SI
or DI).
- Default segment register may be DS or ES.
Example 2.7 MOV AX, [BX] [SI]
Here BX is the base register and SI is the index register.
Effective address 10H*DS + [BX] + [SI]

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 EE 574
8086 Addressing Modes
Addressing modes of sequential control flow instructions Ref
8. Register Based Indexed [3]
- Effective address of data is formed by adding an 8 or 16-bit
displacement with the sum of contents of any one of the base
registers (BX or BP) and any one of the index registers, in a
default segment.
Example 2.8 MOV AX, 50H [BX] [SI]
Here 50H is immediate displacement, BX is the base register
and SI is the index register.
Effective address 10H*DS + [BX] + [SI] + 50H

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8086 Addressing Modes
Addressing modes of control transfer instructions Ref
Addressing mode depends upon [3]
- whether the destination location is within the same segment
or a different one.
- method of passing the destination address to the processor
Basically there are two addressing modes for control transfer
instructions
1. intersegment addressing mode
- Location to which the control is to be transferred lies in a
different segment other than the current one
2. intrasegment addressing mode
- Destination location lies in the same segment
Fig. 2.1 shows the modes for control transfer instructions

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 EE 574
8086 Addressing Modes
Addressing modes of control transfer instructions Ref
9. Intrasegment Direct [3]
- The address to which the control is to be transferred lies in
the same segment and appears directly in the instruction as
an immediate displacement value.
- The displacement is computed relative to the content of IP
Effective address for destination
= 8 or 16-bit displacement + content of IP
In the case of JUMP instruction
if signed displacement (d) is 8 bits (-128 < d < +128),
we call it short jump
if signed displacement (d) is 16 bits (-32768 < d < +32768),
we call it long jump
10. Intrasegment Indirect
- The address to which the control is to be transferred lies in
the same segment and but it is passed to the instruction
indirectly.
Branch address is found as the content of a register or
memory location.
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- This addressing mode may be used in unconditional branch
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8086 Addressing Modes
Addressing modes of control transfer instructions Ref
11. Intersegment Direct [3]
- The address to which the control is to be transferred lies in a
different segment.
- The addressing mode provides a means of branching from
one code segment to another code segment.
- The CS and IP of the destination address are specified
directly in the instruction.
12. Intersegment Indirect Mode
- The address to which the control is to be transferred lies in a
different segment and but it is passed to the instruction
indirectly, i.e. contents of a memory block containing 4 bytes
– IP (LSB), IP(MSB), CS(LSB), CS(MSB) sequentially.
- The starting address of the memory block may be referred
using any of the addressing modes, except immediate mode.

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8086 Addressing Modes
Forming the Effective Address: Ref
[3]

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8086 Addressing Modes
Forming the Effective Address: Ref
[3]

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 EE 574
8086 Addressing Modes
Forming the Effective Address: Ref
Example 2.10 [3]
Suppose main program resides in code segment where CS =
1000H
Main program calls a subroutine which resides in the same
code segment
The base register contains offset of the subroutine
BX = 0050H
Since offset is specified indirectly, it is indirect addressing.
The instruction CALL [BX] calls the subroutine in address
10H*CS + [BX] = 10050H in the same segment.
This is an example of intrasegment indirect addressing
mode.

Example 2.11
Now let us assume that the subroutine lies in a different
segment where CS = 2000H.
The instruction CALL 2000H:0050H calls the subroutine at an
address
10H*2000H + 0050H = 20050H in a different segment.
The control goes to a different segment and the address is 19
directly specified in the instruction.
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Suggested Reading
1. Barry B. Brey, “Intel Microprocessors: 8086/88,
80186/188, 80286, 80386, 80486, Pentium, Pentium II,
Pentium III, Pentium IV – Architecture, Programming
and Interfacing”, Pearson Education, 2003.
2. Badri Ram, “Advanced Microprocessors and Interfacing”,
Tata-McGraw Hill, 2001.
3. A.K. Ray and K.M. Bhurchandi, “Advanced
Microprocessors and Peripherals – Architecture,
Programming and Interfacing”, Tata-McGraw Hill, 2000.

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