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EE101 Project Display A Smily On 8X8 LED Matrix: Group No. - G11

The document describes an EE101 project to display a smiley face on an 8x8 LED matrix. The circuit uses a 555 timer IC to generate a clock signal, which is fed to a 74191 counter IC. The counter outputs select the columns of the LED matrix through a 7442 BCD decoder. Logic gates like AND, OR, XOR on the counter outputs and decoder select the rows to light up the LEDs in the pattern of a smiley face. When the clock frequency is low, a single column lights up at a time to display the smiley slowly, and at high frequency all LEDs of the smiley light up simultaneously.

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Umesh Jangid
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0% found this document useful (0 votes)
92 views11 pages

EE101 Project Display A Smily On 8X8 LED Matrix: Group No. - G11

The document describes an EE101 project to display a smiley face on an 8x8 LED matrix. The circuit uses a 555 timer IC to generate a clock signal, which is fed to a 74191 counter IC. The counter outputs select the columns of the LED matrix through a 7442 BCD decoder. Logic gates like AND, OR, XOR on the counter outputs and decoder select the rows to light up the LEDs in the pattern of a smiley face. When the clock frequency is low, a single column lights up at a time to display the smiley slowly, and at high frequency all LEDs of the smiley light up simultaneously.

Uploaded by

Umesh Jangid
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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Download as PDF, TXT or read online on Scribd
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EE101 project

Display a Smily on 8X8 LED matrix

Group No. - G11


● Umesh Jangid (170020080)
● Suryansh Godara (170020053)
● Mridul Raj (170020088)

Components used -
● One 8x8 Led Matrix
● One 555 Timer IC
● One Module 16 Counter (IC 74191)
● One 4 to 10 BCD decoder with enable (IC 7442)
● AND Gate (Two 7408 IC)
● NOT Gate (Two 7404 IC)
● XOR Gate (one 7486 IC)
● OR Gate (One 7432 IC)

BLOCK DIAGRAM:
CIRCUIT DIAGRAM:

OBSERVATION AND BRIEF OF THE OPERATION:

● Firstly, a 555-Timer IC is used to generate a clock, and the clock is input for the Module
16-counter (IC 74191)
● As we only need counting up to 8, the MSB of Module 16- counter (IC 74191) is not used,
and the rest 3 outputs are used to as input for the BCD-Decoder (IC 7442)
● As only 3 inputs are used of the BCD decoder, only D​0​, D​1​, ……. , D​7​ will get selected,
which are used as input for the LED grid, the rest of the outputs of the BCD decoder are not
selected in the experiment.
● The BCD-Decoder (IC 7442) gives active low output according to the counter. This results
in only one column of the LED grid to be LOW at a time and rest to be High
● Now, at a time only one column of the LED grid is LOW and with the use of the output of
the counter and logic gates, we give HIGH input to the specific rows with the column
corresponding to be low only for the required combination of row & columns to generate a
smily on the led matrix.
● This will only light the LEDs column-wise because the input colums are low for single
column at a time and if we increase clock frequency to very high value the all the LEDs will
be ON simultaneously
Truth Table for Logic Gates:

S​2 S​1 S​0 Deco R​1 R​2 R​3 R​4 R​5 R​6 R​7 R​8
der

0 0 0 D​0 0 0 1 1 1 1 0 0

0 0 1 D​1 0 1 0 0 0 0 1 0

0 1 0 D​2 1 0 1 0 1 0 0 1

0 1 1 D​3 1 0 0 0 0 1 0 1

1 0 0 D​4 1 0 0 0 0 1 0 1

1 0 1 D​5 1 0 1 0 1 0 0 1

1 1 0 D​6 0 1 0 0 0 0 1 0

1 1 1 D​7 0 0 1 1 1 1 0 0

K-Map for R​1​ & R​8​:

​R​1​ (& R​8​) = XOR(S​2 ,​ S​1​)

Similarly, we can get the logic functions for all the corresponding rows--
​R​2​ (& R​7​) = ( !( XOR(S​2 ,​ S​1​))) (XOR(S​1 ,​ S​0​) )
R​3​ (& R​5​) = !( XOR(S​2 ​, S​0​) )
R​6​ = !( XOR(S​1 ​, S​0​) )
R​4​ = (S​2​S​1​S​0​) + ((!​S​2​)(!​S​1​)(!​S​0​) )
COMPONENTS:

a) 555 Timer IC -
The ​555 timer IC​ is an integrated circuit (chip) used in a variety of timer, pulse generation, and
oscillator applications. The 555 can be used to provide time delays, as an oscillator, and as a
flip-flop ​element. ​In astable mode, it can be used to generate a digital signal known as a clock.
Depending on the manufacturer, the standard 555 package includes 25 transistors, 2 diodes and
15 resistors on a silicon chip installed in an 8-pin mini dual-in-line package (DIP-8).

b) Module 16 counter (74191 IC)


The DM74LS191 circuit is synchronous, reversible, up/ down counter. Synchronous operation is
provided by having all flip-flops clocked simultaneously so that the outputs change
simultaneously when so instructed by the steering logic. The outputs of the four master-slave
flip-flops are triggered on a LOW-to-HIGH level transition of the clock input, if the enable input
is LOW. A HIGH at the enable input inhibits counting. The direction of the count is determined
by the level of the down/up input. When LOW, the counter counts up and when HIGH, it counts
down
Block Diagram:
Truth table:
Timing Diagram:

c) 4 to 10 BCD decoder with enable (IC 7442)


The 7442 is a BCD (binary coded decimal) decoder intended for input values 0 to 9 (0000
to 1001 in binary). With inputs from 10 to 15 (1010 to 1111 in binary), all outputs are
high. The appropriate output becomes low in response to the BCD (binary coded
decimal) input. The 7442 outputs are active-low which means they become low when
selected but are high at other times. Note that the 7442 can be used as a 1-of-8 decoder if
input D is held low.

Block Diagram:
Truth table:

d) AND Gate (7408 IC)


A Logic AND Gate is a type of digital logic gate that has an output which is normally LOW (0)
and only goes HIGH (1) when all of its inputs are HIGH (1). The output state of a “Logic AND
Gate” only returns “LOW” again when any of its inputs are LOW (0). ​ The 7408 IC is a
well-known QUAD 2-Input AND GATES and contains four independent gates each of which
performs the logic AND function.
Block Diagram:
Truth table:

e) NOT Gate (7404 IC)


7404​ is a NOT gate ​IC​. It consists of six inverters which perform logical invert
action. The output of an inverter is the complement of its input logic state, i.e.,
when input is high its output is low and vice versa.
Block Diagram:

Truth table:

f) XOR Gate (7486 IC)


It is a quad two-input NAND gate. All four NAND gates may be used independently. On any
gate if either of the input is 'Low' then the Output is 'High'. When both the inputs are 'High' or
‘low’, then the output is 'Low'.
Block Diagram:

Truth Table:

g) OR Gate (7432 IC)


A HIGH output (1) results if one or both the inputs to the gate are HIGH (1). If neither
input is high, a LOW output (0) results. The 7432 IC package contains four independent
positive logic OR GATES.
Block Diagram:
Truth table:

h) 8X8 LED Matrix


8​×​8 matrix​ consists of 64 dots or pixels. There is an LED for each pixel and these
LEDs are connected to a total of 16 pins. Generally, there are two types of dot
matrix – a common cathode and common anode. ​In this matrix, all Rows are
Anode(P-type) and Columns are Cathode(N-type). If a row gets high and a
column gets low then the corresponding LED(intersection of row and column)
gets the glow.
​Block Diagram:
CONCLUSION:

1. Using the small frequency clock from the 555 timer, the pattern of smily was observed
with a single column glowing at a time with shift from C1 to C8 with time.
2. For high-frequency clock from 555 timer, a complete smily was observed with all the
corresponding LEDs(with the smily) glowing at any time

3. Smily on the led matrix-

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