Labview Real-Time Course Manual: November 2001 Edition Part Number 323226A-01
Labview Real-Time Course Manual: November 2001 Edition Part Number 323226A-01
Course Manual
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Table of Contents
Preface..............................................................................................................................................1
Lesson 1 LabVIEW Real-Time Basics ........................................................................................ 1-1
Exercise 1-1 ............................................................................................................................... 1-23
Exercise 1-2 ............................................................................................................................... 1-23
Exercise 1-3 ............................................................................................................................... 1-24
Lesson 2 Communication with RT Series Hardware................................................................... 2-1
Exercise 2-1 ............................................................................................................................... 2-42
Exercise 2-2 ............................................................................................................................... 2-46
Exercise 2-3 ............................................................................................................................... 2-47
Exercise 2-4 ............................................................................................................................... 2-48
Exercise 2-5 ............................................................................................................................... 2-49
Exercise 2-6 ............................................................................................................................... 2-49
Lesson 3 Multithreading and Priorities........................................................................................ 3-1
Exercise 3-1 ............................................................................................................................... 3-23
Exercise 3-2 ............................................................................................................................... 3-23
Exercise 3-3 ............................................................................................................................... 3-26
Exercise 3-4 ............................................................................................................................... 3-28
Lesson 4 Timing and Sleep.......................................................................................................... 4-1
Exercise 4-1 ............................................................................................................................... 4-27
Exercise 4-2 ............................................................................................................................... 4-28
Exercise 4-3 ............................................................................................................................... 4-29
Lesson 5 Shared Resources.......................................................................................................... 5-1
Exercise 5-1 ............................................................................................................................... 5-24
Exercise 5-2 ............................................................................................................................... 5-27
Exercise 5-3 ............................................................................................................................... 5-30
Lesson 6 Other Features of LabVIEW Real-Time ...................................................................... 6-1
Exercise 6-1 ............................................................................................................................... 6-24
Exercise 6-2 ............................................................................................................................... 6-28
Exercise 6-3 ............................................................................................................................... 6-29
Exercise 6-4 ............................................................................................................................... 6-30
Exercise 6-5 ............................................................................................................................... 6-32
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LabVIEW Real-Time
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As a prerequisite to this course, you should have at least taken the LabVIEW
Basics I course.
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To complete the exercises in this course, one of the following sets of hardware is required:
• PXI controller (8156B, 8170 with ethernet module 8211, 8145, 8146)
• PXI-MIO board
• PXI chassis
• ethernet or crossover cable
• host PC
OR
• PCI/PXI RT Series DAQ board
OR
• host PC
• ethernet or crossover cable
• FP-2000
Some exercises are hardware specific, so you may not be able to complete all the exercises
with your hardware set.
! Exercises reinforce
the topics presented
! Each exercise shows
a finished VI after it
is run
! Descriptions of how to
build the VI follow the
picture
! Save exercises
in personal folder on
the Windows desktop
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This course will focus on LabVIEW Real-Time and DAQ. Although Serial, GPIB,
and VISA are supported in LabVIEW Real-Time 6, they will not be discussed.
To learn how to program with these protocols in LabVIEW, take the necessary
courses.
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Before delving into how to use LabVIEW Real-Time, it is first important to understand
some technical terms related to real-time systems. The first term to understand is what is
meant by real-time. A misconception is that it means really fast. Real-time is probably
more synonymous to in-time. In other words, a real-time system ensures that responses
will occur in time, or on time. With non-real-time systems, you do not have any way to
ensure that your response will occur within any given time period, and calculations may
finish much later or earlier than you expect them to.
In order for a system to be a real-time system, all parts of it need to be real-time.
For instance, even though a program runs in a real-time operating system, it does not
mean that the program will behave with real-time characteristics. The program may rely
on something that does not behave in real-time, which then causes the program
to not behave in real-time.
Input
Time critical
Control Algorithm
or other Real-Time
code
Output
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Loop Time
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All real-time systems have some jitter, it is just that the jitter is much smaller than
in non-real-time systems, sometimes on the order of nanoseconds. Non-real-time
systems have very large or unbounded maximum jitter.
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If all you need to do is real-time data acquisition, then you do not necessarily need
LabVIEW Real-Time. National Instruments has many data acquisition boards that
can acquire data in real-time even though they are controlled by programs running
in Windows. This is done using an onboard hardware clock that makes sure that data
is acquired at constant rates. This data is automatically transferred directly to
memory using DMA or interrupt service requests (IRQ).
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!Components required:
• Windows PC (Host PC)
• LabVIEW Real-Time Development System
(on Host PC)
• National Instruments Real-Time Series Hardware
– Separate CPU and memory
– Separate real-time kernel (OS)
• Cables and Accessories
!Same LabVIEW programming techniques
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Communication
RT Engine
RT Series Hardware (embedded version
Target Platform running of LabVIEW)
RTOS and RT Engine
(Headless) RTOS
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There are many applications for which LabVIEW Real-Time is needed instead of
LabVIEW for Windows. These are applications that require programs to run with
a level of determinism unattainable with Windows.
One advantage is that when an RT application is running on RT Series hardware,
if the Host PC crashes, the RT Engine continues to run. Also, since all that is
running on the RT Series Hardware is the LabVIEW RT Engine, it is much more
stable than Windows, which combines software and drivers from many vendors.
Even though your programs are running in a real-time operating system, it does not
mean that they are not susceptible to poor performance due to poor programming
techniques. A well-programmed loop will have higher loop rates and less jitter than
a poorly programmed loop. There are cases where poor programming will cause
your program to crash. For instance, if you make a program that continues to use
more and more memory, as soon as all of the memory is used up, the program will
crash (no virtual memory is used in the RTOS because it is not deterministic). Also,
if you make your program execution dependant upon non-deterministic external
processes, such as communication (i.e., GPIB, Serial, or Ethernet), or File I/O, then
your program is not guaranteed to run in real-time.
PXI Controllers
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One type of target or platform is a device that plugs into a PCI or PXI slot
of a computer running Windows. It is referred to as an RT Series DAQ Device.
Another type of platform is the RT Series PXI Controller. There is also
a FieldPoint module that can run the RT Engine.
Processor
Processor Board
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The RT Series PXI Controllers come with the RT Engine preinstalled. During
development, RT Series PXI Controllers communicate with the Host PC through
an Ethernet interface. Since RT Series PXI Controllers are controlled remotely,
they are considered headless systems. A headless system has no keyboard, monitor,
or mouse.
As of September 25, 2001, these are the RT Series PXI Controllers available:
• PXI-8156B
• PXI-8170 (requires a separate Network module)
• PXI-8145
• PXI-8146
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The FP-20XX has many features that enable it to act as a stand-alone device. Since most stand-
alone devices reside in remote or inaccessible locations, it is important for these systems to be
reliable to eliminate the need for constant maintenance. The dedicated processor in the FP-20XX
runs a real-time operating system which executes the LabVIEW Real-Time application
deterministically. The reliability of the real-time operating system also reduces the chances
of system malfunction.
The FP-20XX includes a Watchdog timer that monitors the overall operation of the FieldPoint
system. When the watchdog senses that the system has a malfunction, it can run a separate
maintenance routine or even reboot the FieldPoint system. The operation of the watchdog
is completely user-defined through a simple and intuitive protocol.
The FP-20XX also includes 5 DIP switches, 3 tri-color LEDs, and 1 bi-color LED that can be
used for user interaction as a stand-alone system. For instance, the LEDs can be used to signify
certain states of operation while the dip switches can be configured to specify the startup state
of the FieldPoint system.
Switches 1, 2, 3, 4, and 5 are user-accessible DIP switches. They may be read by the FieldPoint
LabVIEW VIs, but have no default functionality. The DISABLE VI, SAFE MODE, and RESET
DIP switches are read only when you power up or reboot the FP-20XX network module.
You must reboot the module with one of these switches ON for its setting to take effect. If you
reboot the system with more than one of these switches ON, only the left-most switch is read,
and the others are ignored.
The onboard static memory consists of 3 MB of Flash memory for the FP-2000 and 11 MB of
Flash memory for the FP-2010. The Flash memory acts as a hard drive for the system and can
be used to store startup applications or data. For instance, you can configure the FP-2000 to
monitor the temperature inside an environmental chamber while logging that data to the Flash
memory. The FP-2010 is ideal for large data-logging applications with the larger 11 MB of
Flash memory. If you need to stream to disk larger memory chunks, you can transfer data back
to the host program, and stream it to the host PC hard drive.
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The FP-20XX includes a second set of screw terminals to connect a backup power supply.
The system will automatically switch to this second power supply, when it senses a problem
with the first power supply.
The serial port allows the FP-20XX to connect to existing systems. In addition, it can be used
to connect other serial devices such as a serial LED which can be used to display information
for the operator.
The FieldPoint I/O modules are compact modules ideal for usage in industrial environments,
where space is limited, or where placing a standard desktop computer is not an option.
The dimensions of the module are 4.3 in. wide, 4.3 in. deep, and 3.6 in. high. The systems
can be din-rail mounted to increase space on the factory floor, and be placed in locations with
stringent temperature demands. A FieldPoint 2000 based system can operate efficiently in
environments from –25 to 55 ºC.
With LabVIEW Real-Time downloading the code into the FP-20XX, you can create a stand-alone
system. For instance, you can create a custom data-logging application that acquires the data from
the FieldPoint I/O module and logs the data to the local Flash memory. With over 100 analysis
routines such as digital filters, spectrum analysis, signal processing, and curve fitting in LabVIEW,
you can include custom in-line data analysis on the FP-20XX node. The in-line analysis can
convert the raw data into more effective information by determining and logging the peak
frequency of a signal which also reduces the amount of information stored on the local Flash
memory.
You can also create a stand-alone control application that continually monitors and responds to
a set of stimuli. For instance, this system can be used to monitor and control the pressure in an
environmental chamber. With built-in PID, fuzzy logic, and other control algorithms, you can
build a custom control routine for the system. With this custom control routine running in the
stand-alone control node, the FP-20XX has device level intelligence that doesn’t rely on a main
supervisory control station to make decisions for it. In addition to being more reliable, this
improves the performance of the system with a real-time system responding deterministically
to stimuli.
© National Instruments Corporation 1-17 LabVIEW Real-Time
LabVIEW RT Menu Items and VIs
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New features have been added to Measurement & Automation Explorer (MAX).
Functionality that was previously found in Remote System Explorer (used with
LabVIEW Real-Time 5.1.2) is now found in MAX. In the Configuration window,
you will find an entry called Remote Systems. It is here that you configure RT Series
Devices on the network. The use of MAX will be discussed later.
Fieldpoint Explorer 3.0 is used to configure Fieldpoint 2000 Series modules. See the
user manual for details.
\Examples\RT\
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Exercise 1-2
Objective: To become familiar with the documentation available with MAX.
1. Launch LabVIEW.
2. Click on the Open VI button and browse to the c:\Program Files\National
Instruments\LabVIEW 6\Examples\RT directory.
3. Open each *.llb file and browse the contents of each.
Most examples in these libraries contain two VIs, one that runs on the RT Engine,
and a corresponding VI that runs on the Host PC. The RT Engine VI runs in real-time
and communicates with the Host PC VI, which provides a User Interface.
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This lesson will briefly describe how to configure RT Series Hardware, but it will
not go into specifics of installation or configuration of either software or hardware.
This information is covered in detail in the user manuals. This lesson will also
discuss communication methods between the Host PC and the RT Engine.
• View»Refresh, or <F5>
• Right-click on 7030, select Properties…
– Test Resources
– You can change Device Number
– No Test Panels (grayed out)
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• Right-click on
Daughterboard,
select Properties…
– You can change Device Number
– No Test Resources or Panels (grayed out)
– Select Accessory
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You cannot test resources or run test panels for the DAQ daughterboard because,
even though the daughterboard is configured using the Host PC, the daughterboard is
actually located on the local PCI bus of the RT Series processor board. Only LabVIEW
Real-Time applications targeted to the RT Series DAQ Device can access the DAQ
daughterboard. Applications run on the Host PC cannot access the DAQ daughterboard
directly, even though the DAQ daughterboard is configured as a separate device.
For this reason, the resource configuration on the PCI bus cannot be tested from
the Host PC. Note that you do not need to test the resource configuration because
National Instruments configures it and it does not change.
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After you create any Virtual Channels, you must reset the RT Series DAQ Device
in order for them to take effect. The configuration information is downloaded to the
RT Series DAQ Device during the reset.
Select Help»Help
Topics»Remote
Systems for more
information.
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If you have an RT Series PXI Controller with the RT Engine installed, if you boot it up for the first
time after connecting it to the Network, you can see it from a Host PC on the same subnet with MAX.
If you have a non-RT Series PXI Controller, you can create a PXI Boot Disk from MAX (Tools»
Remote Systems»RT PXI Disk Utilities»Create PXI Boot Disk) which will allow you to boot the
controller into the RT Engine. (Only the PXI-8156B and PXI-8170 are supported at this time.) When
the PXI Controller is booted from the PXI Boot Disk for the first time, it creates the ni-rt.ini file
(which contains configuration information for the network settings and embedded version of LabVIEW)
and ni-rt folder on the c:\ drive. You can then configure the controller using MAX. For details on
using non-RT Series PXI Controllers with LabVIEW Real-Time, in MAX select Help»Help
Topics»Remote Systems»PXI Specific Information»PXI Controller with Windows Installed.
Configure the Network Settings, click Apply, and reboot the RT Series PXI Controller.
See the user manual for details.
Host Name refers to the name that the networked device will be known as on the network.
After an RT Series PXI Controller is configured, you can view it in MAX even if it is not on the same
subnet. To do this, right click on Remote Systems, select Create New, then select Remote Device
(not on the local subnet), click Next, then enter the IP address of the Remote System, and click on
Finish.
Other Functions:
• Reboot—this function allows you to remotely reboot the controller.
• Lock—you can protect the controller by providing a password.
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If you wish to refresh the Remote Systems section of the Configuration window
in MAX, you can select View»Refresh, which refreshes the whole configuration
window, or you can select Tools»Remote Systems»Find Remote Systems, which
searches for Remote Systems on the same subnet as your Host PC.
Software images for RT Series Networked Devices are installed on the Host PC
in the c:\Program Files\National Instruments\RT Images
directory by default. Selecting Install Firmware… ,as shown above, installs
the appropriate software over the network on the RT Series Networked Device.
With LabVIEW 5.1.2, the Remote System Explorer is used to install firmware
on RT Series Networked Devices.
• Enter Name or IP
address of RT Series
PXI Controller
To configure the DAQ devices in the RT PXI Chassis, you will need to use Remote
DAQ Configuration. Through Remote DAQ Configuration, you can also configure
SCXI, virtual channels, and scales. When you finish the configuration, the
configuration file will be sent to the RT PXI Controller. You then need to reboot
the controller for some of the configuration changes to take effect.
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!winipcfg or ipconfig
• Useful for finding IP configuration information
for the Host PC
!ping [IP Address]
• Useful for testing network connection
!ftp [IP Address]
• Useful for viewing RT Engine File System
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3. Lower left
corner RT Development
indicates System
target. Target: RT Engine
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While developing a real-time application, LabVIEW Real-Time provides a user interface for
the RT Engine. This is done by “targeting” LabVIEW Real-Time to the RT Engine. When
LabVIEW Real-Time is targeted to the RT Engine, it is considered the RT Development
System. While developing RT applications in this manner, to the user, development is done the
same way as developing programs for Windows. Only, when the program is run, it actually runs
on the RT hardware and not on the windows machine.
To target LabVIEW Real-Time to your RT Series Hardware, start a new VI from LabVIEW
Real-Time, then:
1. Select Operate»Switch Execution Target.
2. Select the RT Engine you wish to target. In the target list, you will see an entry for every
RT Series DAQ Device configured in MAX. These are designated by DAQ::x RT
Engine on PCI-7030, where x is the device number in MAX. You will also see an entry
called RT Engine on Network. Select this if you wish to target LabVIEW Real-Time to
RT Series Networked Devices such as RT Series PXI Controllers. You will also see an
entry called Host PC (LabVIEW for Windows). Although this is actually not an RT
Engine, if you select this, then LabVIEW Real-Time will act as regular LabVIEW
for Windows.
3. While you are targeted, you will see the RT Engine indicated in the lower left corner
of both the front panel and diagram.
• Configure…—launches MAX
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If you wish to have the Target Platform Selection Dialog Box appear automatically
when you first start LabVIEW, you can check the option as shown above.
• VIs are
automatically
downloaded when
the Run button
is pushed.
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When VIs are opened in the RT Development System, they are not downloaded to the
RT Engine until you manually download them.
You can see which VIs have been downloaded by selecting Browse»Show VI
Hierarchy. An inserted thumbtack indicates a downloaded VI. If the thumbtack is not
inserted, the VI is not downloaded.
User
Interface
Thread
• UI Thread automatically updates interface
• Cannot run code targeted to Host PC
• Can run multiple VIs targeted to RT Engine
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The Call Chain ring appears when a subVI is paused, and is not supported in the
RT Development System. (The Call Chain ring is also referred to in the Real-Time
User Manual, as is the Call List Window.)
!File»Exit
• Results in this dialog box:
!File»Exit without closing RT Engine VIs
• Automatically closes LabVIEW
• RT Engine VIs will continue to run
!Operate»Switch Execution Target
• RT Engine VIs will continue to run
!Deployed State – VIs are in Deployed State
after selecting Exit without closing RT
Engine VIs or Switch Execution Target
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When you connect the RT Development System to an RT Engine with VIs already
downloaded or running, the RT Development will try to locate and open the
corresponding Front Panels on the Host PC. The Front Panel information is not
downloaded to the RT Engine and is only contained in the local copies of the VIs
on the Host PC. If the copy of the VI on the Host PC has been changed, then the
Changed or Missing VIs dialog box will appear. The user has the option of closing
the old RT Engine VIs and updating them with the new VIs, which will download the
new VIs, or the user can switch to Host LabVIEW without closing the RT Engine VIs.
If the VIs are missing, you will first be prompted to find them. If you are unable to
find the VIs, click cancel to make the Changed or Missing VIs dialog box appear.
Tip: You can FTP the Host PC’s copy of the VI to RT Engines that have storage
devices. This way, if the Host PC’s copy of the VI is lost or corrupted, you can
retrieve the backup copy from the RT Hardware using FTP.
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After the application has been developed, the RT Development System can be
disconnected from the RT Engine, and the RT Engine can run the application independent
of LabVIEW Real-Time on the Host PC. When an RT application is running independent
of the Host PC, it is considered to be deployed. LabVIEW Real-Time on the Host PC can
then be targeted to the Host PC itself. In this mode, LabVIEW Real-Time on the Host PC
is no longer running RT Development System, but is running as regular LabVIEW for
Windows. After an RT application is deployed, it can still communicate with programs
running in regular LabVIEW on the Host PC.
Since deployed applications running on RT Series Hardware do not have a User Interface
provided by the RT Development System, there are many cases in which you want to
create a companion application that runs on the Host PC or another PC. Your deployed
RT Engine VI can communicate with the companion VI. This companion application can
receive data from the RT Engine VI, analyze or log the data received, send data to the RT
Engine VI, and provide a way for a user to interact with your Deployed RT Engine VIs.
This is also true of applications that run on an RT Series DAQ device that need to have
data saved to disk. Since RT Series DAQ Devices (which plug into the PCI bus of the
Host PC) have no hard drive, they need to send that data to an application on the Host PC,
which can then save the data to the hard drive.
• VIs that run on the RT Series Hardware are referred to as RT Engine VIs.
• VIs that run on the Host PC are referred to as Host PC VIs.
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TCP/IP is good for directly transferring large chunks of data between RT Engine VIs
and Host PC VIs.
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data data
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RT Engines on the Network have options that can be configured while targeted by
selecting Tools»Network x.x.x.x Options… See the RT Series PXI User Manual for
details on configuring these options.
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If a peek is done at the same time as a poke, some bytes may contain old data while
others contain new data, which results in a corrupt value.
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If a peek is done at the same time as a poke, some bytes may contain old data while
others contain new data, which results in a corrupt value. The Read/Write VIs avoid
this problem by not writing a new value until the entire old value has been read.
The tip strips on the diagrams show that the highlighted input is for “previous data
(DBL).”
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Use the RT Board Utilities VIs located on the Functions»RT»RT Series DAQ»
RT Board Utilities palette to check the shared memory size, toggle the board LEDs,
and facilitate high-level communication between the RT Series DAQ Device and
the host PC.
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When a large number of parameters needs to be passed between the RT Engine and
the Host PC, the Incremental Single Read and Incremental Single Write VIs are
very useful. Rather than transferring all of the parameters each iteration, which can
slow down your loops, these VIs allow you to transfer a small portion of the
parameters in each loop iteration. Only a portion of the data array is written or read
from shared memory each time. Although this allows your loops to run faster, this
means that it may take several loop iterations for a parameter to be transferred, and
sometimes parameters values are not transferred at all, since they may change many
times before actually being transferred.
There is a concept document in the National Instruments Developer Zone called
“Incremental Single Read and Incremental Single Write VIs” which discusses these
VIs in more detail.
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This exercise assumes that the RT Series Hardware that you will use has been
previously installed and configured.
PART 1. Finding Device numbers for RT Series DAQ Device processor boards and
their daughter cards.
1. Expand My System, and then Devices and Interfaces if they are not already
expanded. Do this by double clicking on the item you would like to expand.
2. Any RT Series DAQ Devices in your PC will show up here. Double click on
the RT Series DAQ Device (if you have one installed, such as a PCI-7030-6XXX)
to expand it to see the DAQ daughter card. Write down the device numbers
of the processor board and the DAQ daughterboard. (If you do not have
an RT Series DAQ Device, skip to Part 2.)
3. Test the resources for each RT Series DAQ Device by right clicking on the
processor board and selecting Properties…»Test Resources. Notify the
instructor if your device fails the test.
Note: You can also configure SCXI Chassis, Virtual Channels, and Scales for the
RT Series DAQ Device’s daughter card just like you would for normal DAQ cards
in MAX, however, this is beyond the scope of this class. You cannot test daughter
cards or virtual channels for daughter cards from MAX.
PART 2. Using MAX to view configuration information for RT Series PXI Controllers.
1. Select Tools»Remote Systems»Find Remote Systems. This will locate any
RT Series PXI Controllers on the same subnet as your Host PC. They will then be
listed in the Configuration window of MAX under My System»
Remote Systems.
2. Expand Remote Systems if it is not already expanded.
3. If there are any RT Series PXI Controllers on the same subnet as your Host PC,
they will appear here. Click on the name of the RT Series PXI Controller that you
will be using (consult the instructor about which controller you will use if there
5. Select the Firmware tab and observe the versions installed on the RT Series
PXI Controller.
6. From MAX, select Tools»NI-DAQ Configuration»Remote DAQ
Configuration…, enter the IP Address and click OK. Expand the NI-DAQ
Devices section. Write down the Device Numbers for each of the PXI DAQ cards.
Note: You can also configure SCXI Chassis, Virtual Channels, and Scales for the
RT Series Controller using Remote DAQ Configuration, however, this is beyond
the scope of this class.
PART 3. Using MAX and RDA to test PXI DAQ board resources in PXI chassis with
RT Series PXI Controllers. (Skip this part if you are using an RT Series DAQ Device.)
1. In MAX, right-click on Devices and Interfaces and select Create New…
2. Select RDA/Ethernet Device and click Finish.
6. The card should now be listed under Devices and Interfaces. Test the resources
for the remote DAQ board by right-clicking on it and selecting Properties…»
Test Resources. If the device fails the test, reboot the RT Series Controller and
try the test again. Notify the instructor if the device fails the test a second time.
8. After testing the DAQ card, you can delete it from Devices and Interfaces.
Exercise 2-2
Objectives: 1) Configure LabVIEW Real-Time to prompt for execution each
time LabVIEW Real-Time is started. 2) Run a VI on the target platform
using the RT Development System as your user interface.
Exercise 2-3
Objective: To see how an embedded VI interacts with a copy of the VI
on the Host PC. You will use the Changed or Missing VIs dialog box.
1. Start LabVIEW Real-Time and select your RT Engine from the Select Target
Platform dialog box.
2. Select File»Open and open the TCP - RT Engine VI from c:\Program
Files\National Instruments\LabVIEW 6\Examples\RT\RT
Communication.llb.
3. Select File»Save As and save the VI to your desktop.
4. Download the VI by selecting Operate»Download Application. Do not run the VI.
5. Select File»Exit Without Closing RT Engine VIs.
6. Delete the VI you just saved to the desktop.
7. Launch LabVIEW Real-Time and select the appropriate target platform from
the Select Target Platform dialog box. Clear the Reset checkbox if you target
an RT Series DAQ device. Because the RT Development System cannot find
the local copy of the VI, it prompts you to locate it. You could select the
TCP - RT Engine VI from Examples\RT\RT Communication.llb, but
for this exercise, click Cancel. The Changed or Missing VIs dialog box appears.
When the RT Development System detects that there is an embedded VI on the
target platform, it attempts to open the front panel from the local copy of the VI
on the host PC hard drive. If the RT Development System detects a change in
version or cannot locate the host copy of the VI, the Changed or Missing VI
dialog box appears. When the Changed or Missing VI dialog box appears you
have the option to close all the embedded VIs and update them with the copy
on the host PC or to exit the RT Development System and not update the
embedded VIs.
Exercise 2-4
Objective: To use a VI in LabVIEW targeted to the Host PC to serve
as a User Interface for a deployed VI.
This example uses an RT Engine VI and a Host PC VI. The RT Engine VI runs on the
target platform in deployed state and communicates with the Host PC VI that runs on
the Host PC. The Host PC VI provides the user interface.
Tip: Although peek and poke VIs are the low level, fastest form of communication,
using several of these VIs in a control loop can slow down your application. If you
need a loop with communication to run at maximum rates, use the RT Incremental
Single Write VI and RT Incremental Single Read VI, found on the RT»RT Series
DAQ»RT Board Utilities palette.
The size of the shared memory is limited to 1 KB. If you need to transfer several
megabytes of data, you must separate the data into smaller portions and then transfer
them. In doing so, you must make sure that you do not overwrite data in the shared
memory before you read it. TCP/IP VIs manage flow control and are more convenient
for bulk transfers.
Exercise 2-6
Objective: To use Shared Memory VIs to communicate between the Host
PC and the RT Engine running on an RT Series DAQ Device. This example
is not necessarily a use case, but rather an exercise that teaches the
concept of how some of the shared memory VIs work.
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Tasks
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!Round Robin
• Threads of equal priority
receive equal time slices
• Might take several turns for
a thread to complete
!Preemptive
• Higher priority thread
immediately suspends
execution of all lower priority
threads
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Multithreading is useful when you have parts of your code that do not need to be
deterministic, or if parts of your code rely on non-deterministic I/O. For example,
putting network communication tasks inside the time-critical loop may harm
determinism. If you make your time-critical code rely on responses from another
PC over the network, then if the other PC does not reply in time, it may cause you
to miss a deadline. In order to remedy this, you can break the threads up into time-
critical tasks and tasks that are not time-critical, then you can assign higher priority
to time-critical tasks to ensure that they always finish on time.
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To set the priority of a VI, right-click on the icon and select VI Properties…,
then select the Execution Category and then the Priority Level. The highest priority
level that allows multithreading is time-critical priority. Subroutine priority does not
allow multithreading, and will be discussed later.
SubVIs will inherit the priority of any of its callers in memory. This inheritance
property allows for upward priority inheritance only. For example, even if a normal
priority VI calls a normal priority subVI, if that subVI is in a time-critical priority VI
that is in memory, then the subVI will run at time-critical priority, even though
a normal priority VI called it.
Sleep mode can be thought of as a programmatic tool that a VI can use to proactively
take itself off of the LabVIEW and operating system scheduling mechanisms. Users
can programmatically provide a sleep mode in a VI by using the functions Wait Until
Next ms Multiple, or Wait (ms).
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When controlling the rate of a software loop by using the Wait Until Next ms
Multiple function users can only achieve rates in 1 millisecond multiples. This means
you can either run your loop at full speed providing no sleep at all, or you can achieve
loop rates of 1000 Hz, 500 Hz, 333.33 Hz, 250 Hz, 200 Hz, etc. We will discuss
a method of implementing loop rates with a finer sleep mode resolution than
1 millisecond multiples later in this presentation.
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When in the development state, the compiled code will only run in real-time
if there is no interaction with the front panel.
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Global variables pass information between locations in your application that you
cannot connect with a wire. You can use global variables to access and pass data
among several VIs.
Global variables are built-in LabVIEW objects. When you create a global variable,
LabVIEW automatically creates a special global VI, which has a front panel but no
block diagram. Add controls and indicators to the front panel of the global VI to
define the data types of the global variables it contains. In effect, this front panel
is a container from which several VIs can access data.
Global variables can add jitter to the program because they are a shared resource.
Shared resources and better methods of inter-thread communication are discussed
later.
Inter-thread
Communication
Time Critical
VI
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Inter-thread
Global
Communication
Time Critical
VI
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You can replace the normal priority communication loop with a VI that just reads
and writes to the global variables which the time-critical VI also reads and writes to.
The Host PC could then call the normal priority VI through VI Server to get the
variable values. This form of communication is lossy, though, since the global
variables could be updated many times before the normal priority VI gets called
by the Host PC. There are many examples of this type of communication in the
Examples\RT folder.
Inter-thread
Communication
with Globals
Time Critical.vi
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The simplest way to assure that starvation does not occur is to add Wait VI’s to your
loops. This will put your high-priority thread to sleep and will give the other threads
processor time. You want to make your sleep time long enough for the other threads
to accomplish their tasks, but short enough that your determinism is not compromised.
Inter-thread
Communication
Time-Critical
VI
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It is important to do all file I/O operations in a normal priority loop. This is because file I/O
is inherently non-deterministic. File I/O calls in the time-critical loop can jeopardize the
determinism of the entire program.
When transferring data to disk, the transfer rate is largely dependent on the size of the read
or write you are performing. In reading and writing, the optimal size is 512 bytes. This is
because 512 bytes is the size of a sector on a hard disk, and is the basic unit that is read or
written from a disk. If you wanted to read 32 bytes, you would have to read an entire 512
byte sector first, then pull out the 32 bytes that you need from it. The same issue arises with
writing—if you want to write 32 bytes, you have to read the full sector first, then replace
the bytes, then write the entire sector back to disk. Since LabVIEW Real-Time does not
do disk caching on the embedded side, we see these effects clearly. On platforms with disk
caching, the performance is typically higher and more balanced at the expense of
determinism.
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1. Launch LabVIEW Real-Time and select the appropriate RT Series device from
the Select Target Platform dialog box. Close any VIs already running on the
target platform.
2. For RT Series DAQ Devices, select the Reset checkbox to reboot the hardware
if needed.
3. Click the OK button.
4. Open the Priority Trouble VI from c:\Program
Files\National Instruments\LabVIEW 6\Examples\RT\RT
Tutorial.llb.
5. Right-click on the VI icon on the front panel and select VI Properties…
6. Select Execution from the pull-down menu. Notice that the priority is set to
time- critical priority (highest). This makes the VI run in the highest priority
thread on the RT Engine.
7. On the front panel, set the msec to wait control to greater than 0. 10 is the default.
Run the VI. The chart displays a sine wave.
8. Slowly decrement the msec to wait control. With each step, the chart display
speeds up. However, when the msec to wait control reaches zero, the front panel
no longer updates.
The reason for this behavior is that the RT Engine can no longer communicate
with the RT Development System front panel. Because the time-critical loop has
the highest priority, the user interface thread that updates front panel objects
cannot use any processor time. As a result, the front panel and VI appear locked.
However, the code is still running.
While msec to wait control is greater than 0, the time-critical loop will “sleep”
for that many milliseconds. During this sleep, you can run non time-critical tasks
like updating user interfaces.
9. Click the Abort button. After a short period of time, the RT Development System
recognizes that it has lost communication with the RT Series device, and displays
a warning message. Click OK to close the RT Development System. You must
reset the RT target before the RT Development System can communicate with the
target platform again.
10. Exit LabVIEW Real-Time. Do not save any changes.
Exercise 3-2
Objective: To build a Multi-threaded RT Engine VI that communicates with
the Host PC through VI Server.
1. Build the following VI and set it to Time Critical Priority. Save the global
variables in a file called Global.vi. This Time Critical Loop represents a VI
that needs to run in real-time. It generates “data” in the form of a numeric.
2. Next create a VI as shown below using the global variables from Global.vi.
Modify the connector for this VI so that stop is an input, and Numeric is an
output. This VI will be called from the Host PC using a Call By Reference
Node VI.
3. Build the following Top Level VI using Parameters VI and Time Critical Loop VI
as subVIs. This way you only have to download one VI instead of two.
Download and run your top level VI on your RT Engine.
5. Switch execution target to the Host PC. Create the following VI. To create the
type specifier VI Refnum, right-click on that output terminal of the Open VI
Reference and select Create»Control. Right-click on the type specifier VI
Refnum (for type only) control and choose Select VI Server Class»Browse…,
then select the Parameters.vi. The type specifier VI Refnum tells
the Call by Reference Node what type of inputs and outputs are used by
Parameters.vi. Since the Parameters.vi VI is in memory on the RT Engine,
the Open VI Reference only requires the VI’s name, and not a path.
Exercise 3-4
Objective: To build a Multi-threaded RT Engine VI that communicates with
the Host PC through a VI Server and Get/Set Control Value.
1. Build the VI shown below. It is similar to the Time Critical VI used earlier. Set it
to time-critical priority.
To String VI, , and Unflatten From String VI, , are found in the
Functions»Advanced»Data Manipulation palette.
When the Time Critical VI on the RT Engine is sleeping, the VI Server on the RT
Engine can communicate with the Host PC.
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We will soon see that we can easily implement software-timed control loops, where all
analog acquisitions and analog outputs are initiated through software. As a result we
are limited to the deterministic capabilities of software. Fortunately, with LabVIEW
Real-Time, software determinism is frequently adequate. By timing our loops with
Wait Until Next ms Multiple, we can mask out most of the software jitter within the
loop, leaving only the inherent software jitter incurred from the Wait function itself,
which is typically around 15 µs. One caveat about this method is that you must ensure
that your code within the loop executes faster than the requested Wait Until Next ms
Multiple period. This will become more clear once we have covered the Wait Until
Next ms Multiple function in detail.
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In systems that require more determinism (i.e., less jitter), we can use DAQ event
messaging techniques to achieve control response with nanosecond determinism.
By anchoring our timing to the DAQ time base, we can expect output responses
to occur at some user-defined interval, plus or minus a few nanoseconds!
By leveraging the determinism of the hardware, software jitter only becomes
a limiting factor of the overall performance of the control loop (i.e., it limits
the maximum control loop rate).
*NI-DAQ 6.7 introduced the AI SingleScan event message, and NI-DAQ 6.9
introduced the Counter Control—Wait event message.
Hardware Determinism
• Oscillator is independent from OS timing
• Hardware jitter depends on oscillator’s accuracy
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Before we move into great detail about timing and sleep, we can summarize the difference
between software and hardware determinism with a few key points. Software determinism
is typically much worse than hardware determinism because code execution time almost
always varies more than a timebase governed by a hardware oscillator (i.e., the 20 MHz
time base on the DAQ-STC). Depending on the time base and accuracy of the oscillator,
hardware jitter generally ranges from 1 to a few hundred nanoseconds. On the other hand,
software jitter within the real-time OS is around 15 µs at best. We will learn how to control
and minimize software jitter in this lesson and in Lesson 5. Once we have the tools to
measure software determinism, we can demonstrate these points more clearly.
1 ms OS updates
100 ms multiples
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Every millisecond, the OS updates an internal clock to keep track of time. Wait Until Next ms
Multiple synchronizes itself with this clock. When called, Wait Until Next ms Multiple waits
until the OS clock counts up to the next millisecond multiple requested. Each time Wait Until
Next ms Multiple is called in the above diagram, it waits until the OS clock has reached the next
multiple of 100 ms. If the loop begins executing arbitrarily between 100 ms multiples, Wait Until
Next ms Multiple waits long enough to synchronize the next loop cycle to the next 100 ms
multiple of the OS clock. In the slide shown above, My Proc may take a variable amount of time
to finish executing, but by calling Wait Until Next ms Multiple afterwards, we enforce a loop
frequency of 10 Hz (1/100 ms). The maximum loop rate that can be achieved using this method
is 1 kHz with a wait multiple of 1 ms. Since Wait Until Next ms Multiple only accepts integers,
loop rates are limited to only a few frequencies: 1000, 500, ~333, 250, 200, ~167 Hz, etc.
In the example above, the 100 ms timer is initialized by calling the Wait function immediately
before the while loop begins. Otherwise, the loop time for the first iteration would be
indeterminate. In the while loop, the Wait function is enclosed in a sequence structure to
assure that the delay is added after My Proc has finished. The output of My Proc is wired to the
sequence structure to create data dependency. In this way, the order of execution is guaranteed.
Before deciding on a millisecond multiple, you must be certain that the code in your loop can
execute faster than the wait multiple. If your code takes slightly longer than the ms multiple, then
your loop will actually wait two ms multiples, since code was running when the first ms multiple
arrived. In this case, the wait until ms multiple will not be aware that the first ms multiple
occurred, and will wait until a second ms multiple occurs before returning.
In addition to controlling loop rates, Wait Until Next ms Multiple forces time-critical VIs to
“sleep” until the wait is finished. When a VI sleeps, it relinquishes the CPU, allowing other VIs
or threads to execute. Sleep time is required in time-critical VIs because the user interface and
other background processes (ftp server, etc.) need CPU time to survive. Without any sleep,
a time-critical VI starves other processes, including the user interface and communication thread
in development mode.
(t)
(SW timing, ∆T = 1 ms ± inherent jitter)
The Wait Until Next ms Multiple function masks software jitter within the loop. The Wait
function has some inherent jitter, which is acceptable for many real-time applications.
In this slide, the Wait function synchronizes with each 1 ms tick of the OS clock, allowing
the loop to achieve 1 kHz software-timed analog input. The timeline illustrates the 1 ms
wait multiple in yellow (top arrow), the actual time required to execute the code in red,
worst case jitter in purple, and worst case time in green. As long as the worst case time
is smaller than the wait multiple, the actual loop period will equal the wait multiple,
plus or minus the jitter incurred by the wait function itself.
(t)
Wait AI SingleScan Wait AI SingleScan
executes executes
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Using the Wait Until Next ms Multiple function, you can achieve a loop rate of up to 1000 Hz.
Alternately, loop rates can achieve their maximum rate if no delay is present, but without
a delay, you cannot precisely control the rate of the loop. Furthermore, if the VI is set for
time-critical priority, you risk starving other processes of CPU time. NI-DAQ 6.7 introduced
AI SingleScan event messaging, which is almost identical to the existing DAQ occurrences.
AI SingleScan event messaging, however, is faster and easier to program than DAQ occurrences
because no extra VIs are required to anchor loop timing to the scan clock signal on E-Series
DAQ devices.
As you may have already noticed, the loop rate matches the scan rate programmed at AI Start,
and this means your loop rates are no longer restricted to 1000 Hz. The scan clock is simply
an onboard signal which initiates analog to digital (A/D) conversions at the user-defined scan
rate. Each scan clock edge corresponds to a single scan across all channels in the scan list.
Calling AI SingleScan can have many different effects, depending on how the buffer and
hardware have been configured. To activate AI SingleScan event messaging, you must configure
the scan clock (i.e., set up hardware timing as opposed to software timing), and you must use
no buffer (i.e., buffer size = 0). In “hardware-timed, non-buffered” mode, AI SingleScan collects
data from the onboard FIFO buffer each time it is woken up by a new scan clock edge. For
relatively slow scan rates, AI SingleScan can retrieve new data as fast as it enters the onboard
FIFO. Overwrite errors can occur, however, when the requested scan rate is too fast relative to
the code execution time. In other words, if the CPU is not powerful enough to execute the code
within the loop at least as fast as the scan rate, the FIFO will eventually overflow with new,
unread data.
(t)
(HW timing, ∆T = scan interval ± jitter)
AI SingleScan acts like Wait Until Next ms Multiple because both functions synchronize themselves
to a clock, and both functions induce sleep within the calling VI during the wait period. Unlike Wait
Until Next ms Multiple, however, AI SingleScan has an output parameter, which indicates when the
loop is keeping up with the requested timing interval. “Data remaining” is a convenient indicator of
whether the overhead in the loop is preventing AI SingleScan from keeping up with the scan clock.
You can verify that AI SingleScan’s sleep mode is enabled by looking for the following entry in your
NI-RT.INI file associated with the target on which you are executing code:
[NI-DAQ]
UseSleepingTimedNonBuffered=TRUE
This entry is present by default for all networked RT Series PXI Controller targets. Networked RT
Series PXI Controller’s NI-RT.INI files can be found in C:\NI-RT.INI of the target’s hard
drive. The AI Single Scan sleep mode is not turned on by default for the 7030 family RT Series DAQ
Devices. The 7030 product family’s NI-RT.INI file can be found in your ~\LabVIEW
RT\Resource folder.
In addition to providing greater-than-millisecond resolution to control loop timing, AI SingleScan's
“sleep mode” benefits multithreaded applications. A control loop running at time-critical priority
will starve other low priority threads if there is no delay or sleep mode built into the loop.
AI SingleScan’s sleep mode ensures that your time-critical code relinquishes the CPU while it is
waiting for the next scan clock edge, allowing other lower priority processes, including the user
interface, TCP/IP communication, and file I/O to run. Furthermore, only the time-critical priority
setting ensures a 1-to-1 correlation between your control loop and scan clock signal. If set to normal
priority, for instance, AI SingleScan is allowed to read from the onboard FIFO when a scan clock
edge arrives OR when there is a backlog of data in the FIFO. This is important because the “scans
remaining” output parameter of AI SingleScan can be misleading when run at normal priority.
Because AI SingleScan is not necessarily 1-to-1 with the scan clock, there is no guarantee that
zero scans remaining means AI SingleScan never missed a scan clock edge. Note: When using
hardware-timed, non-buffered AI SingleScan, you must be sure that no VIs are called between AI
Start and the first call to AI SingleScan to avoid a backlog of scans in the FIFO. Later, we will learn
about the input “read newest data,” which can counteract this effect in certain cases.
LabVIEW Real-Time 4-8 © National Instruments Corporation
Measuring Loop Rates—Software
Subtracting two well-placed Tick Counts can yield
accurate timing information.
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The easiest method for measuring how fast a loop executes involves Tick Count.
By simply taking a tick count before and after several iterations of a loop, we can
estimate average loop cycle time with millisecond resolution. In this slide, we use
a sequence structure to ensure Tick Count gets called immediately before and
immediately after the loop we are timing.
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(t)
This diagram illustrates the key ingredients to achieving hardware determinism with
AI SingleScan event messaging. As described on the previous slide, this diagram
features analog input and analog output sharing the same clock. AI SingleScan does
not initiate the A/D conversion, rather the scan clock does that. The same is true for
D/A conversions, which are initiated, not by the call to AO SingleUpdate, but rather
by scan clock. The system under control, therefore, is scanned and updated at
precisely the same time with each scan clock edge. Inside the loop, AI SingleScan
gathers a point (say point N) from the FIFO, which stores A/D samples. After the scan
is collected and processed, AO SingleUpdate loads a response to point N on the D/A
register. However, the D/A conversion of response to point N does not occur until the
next scan clock edge, when point N+1 is sampled. Using this architecture, D/A
response is delayed by one scan interval but is guaranteed to occur with only
a few nanoseconds of jitter.
Note: AO SingleUpdate must use the opcode “output only” when analog output
shares the scan clock with analog input.
(t)
Wait Counter Control Wait Counter Control
executes executes
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As of NI-DAQ 6.9, Counter Control has a new parameter called “wait,” and Counter Set
Attribute has a new parameter called “timeout” (seconds). When performing pulse train
generation, Counter Control will induce sleep with the wait parameter and wake up when
the counter outputs the next pulse. To be precise, the VI wakes up one active source edge
(which we will call the waking edge) before the output begins the next pulse. If a waking
edge occurs before the Counter Control is entered, then the VI will return immediately.
So if waking edges are occurring too fast, your VI will not sleep at all. Because Counter
Control induces sleep, it can be a useful tool for preventing synchronous calls from hanging
your application.
Like AI SingleScan event messaging, Counter Control event messaging allows us to
anchor loop timing to hardware events. The only difference is Counter Control waits
for pulses generated by a general purpose counter on the DAQ-STC instead of pulses
generated by the scan clock, which wakes up AI SingleScan.
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2. Counter on CPU
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In some of the previous exercises, we used the Tick Count VI to time our loops. Though
Tick Count offers a simple way to measure average loop speed, it only provides us with
millisecond resolution. Consequently, calling Tick Count each time within the loop to
obtain an execution profile over time would not benefit us much if the loop were running
faster than 500 Hz. On the other hand, onboard general purpose DAQ counters and even
the CPU time-stamp counter offer much better timing resolution than 1 millisecond.
In fact DAQ-STC counters (i.e., those found on E-series devices) have up to a 20 MHz
time base, and NI-TIO counters, which are present on 660x devices, have a time base
of up to 80 MHz. If the RT target is a PXI controller, you can even use the processor’s
built-in time-stamp counter to keep track of time. The CPU counter increments with
each CPU clock cycle and has a resolution of 1/CPU frequency, which amounts to 3 ns
(1/333 MHz) on the PXI-8156B and ~1.17 ns (1/850 MHz) on the PXI-8170. In the next
few slides we will examine one way to time loops using counters and how to time loops
using the CPU’s time-stamp counter.
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By configuring a counter for simple event counting, we can utilize the accurate
time base of the DAQ-STC as the counter’s source. Once the counter has begun
incrementing, we can read the count register each time our loop iterates and store
these count values as time-stamps within an array for later processing. Subtracting
adjacent time-stamps yields approximate loop execution time for each loop iteration.
This information is more useful than an average loop cycle time because we can also
determine how much software jitter is present by plotting the time-stamps on a
histogram.
Of course, you have probably realized that by calling Counter Get Attribute within
the loop, we are adding overhead (and possibly jitter) to the actual loop execution
time. As an alternative to calling Counter Get Attribute, you can instead call Port
Write to toggle a digital line on the E-Series board. By wiring the output of the
digital line to the gate of a counter performing buffered event counting, you can
acquire timestamps with Counter Read Buffer.
Note: Buffered event counting is not covered in this course because it involves
advanced DAQ knowledge that is beyond the scope of this course. Please ask the
instructor to explain this method in more detail if Counter Get Attribute incurs too
much overhead relative to your actual loop execution time.
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A faster, more precise timing method involves the CPU’s time-stamp counter. On PXI controllers
only, LabVIEW Real-Time users can call a special assembly instruction to measure loop timing at
the resolution of the processor clock (1/processor frequency). The assembly instruction is exposed
through a VI called Read Time Stamp Counter or RDTSC. This VI reads the 64-bit time-stamp
counter value from Pentium-class processors. The processor counter starts from zero each time the
controller is turned on. If the reset button is used to reset the controller, the processor counter will
reset. If MAX is used to reset or reboot the controller, the processor counter will reset. In order to
convert the time stamp information to a time value, you need to input the processor speed of your
machine to this VI. The timing code takes the array of time-stamps and converts them into actual
loop cycle times based on the CPU speed. The results are then plotted as Loop Cycle Time vs.
Loop Iteration.
This VI can yield erroneous data when run on laptops because laptops frequently adjust the
processor clock speed dynamically to conserve energy when there is no load. To remedy this
problem, place an empty running WHILE loop set at NORMAL PRIORITY in parallel with the
application being timed. The RDTSC instruction also returns erroneous data from dual processor
machines because the instruction does not always grab the time stamp from the same processor.
Each processor's Time Stamp Counter runs independently of the other.
Note: AMD processors used in the PXI-8156B Controller are Pentium-class.
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The timing shell’s front panel consists of several controls and indicators, most
notably the one large graph. The most relevant controls include iterations and
processor speed. Iterations dictates the number of test code iterations the FOR loop
will execute, and processor speed lets the timing code accurately convert time-stamp
data into actual loop cycle times. As you can see, the timing shell displays loop
cycle time for each loop iteration.
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Old Instructions
Main Cache
Memory Memory
New Instructions
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The most commonly used instructions are kept in a small cache, generally made up
of SRAM located on or near the processor die. Level 1 cache typically resides on the
processor die, while level 2 cache is separate from the processor but can be accessed
faster than normal memory. When new instructions must be processed, caching could
occur and might affect execution times. Processor are designed to optimize execution
time by placing more commonly used instructions in cache memory, which can be
accessed faster than main memory.
Read Newest
Data
Read Oldest
Data
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Processor cache effects the speed that code can execute in a loop. The first time the loop is
run, the cache does not necessarily contain the instructions that are used in the loop. Instead
the processor most likely still has instructions that were most frequently used before the loop
began running. When instructions that the processor needs are not in the cache, it takes longer
for them to load, but if they are in the cache, they load quickly from the cache.
This means that your initial loops may execute slower than later loops.
If you are using software or hardware timing to time your loops, and the loop execution time
is much faster than wait multiple (software timing) or scan interval (hardware timing), then
you do not need to worry about caching effects. However, in order to achieve optimal loop
rates, you will need to account for caching effects.
With AI SingleScan, you can counteract caching affects by using the opcode. For the first few
iterations, use the opcode “read newest data.” This assumes the following:
• Buffer Size = 0 (Sleeping will not work otherwise.)
• Hardware Timing
• RTOS
• Sleep Mode is enabled
• AI SingleScan is in a loop in a Time Critical VI
Read Newest will return the newest scan in the FIFO when the scan clock rising edge
occurs and will empty the FIFO. After each loop iteration, the loop will execute faster and
asymptotically approach some maximum loop rate. When the loop rate is running faster than
1/scan rate, you can then switch the opcode to read oldest data.
Stale scans
(t) remaining in FIFO
…
Newest scan
collected from FIFO
AI SingleScan collects newest
scan from FIFO and removes
stale scans FIFO
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Caching effects generally disappear after the first few iterations unless you have other
threads running while your time-critical code sleeps. Consider a scenario where you
have achieved an optimal loop execution time in a time-critical loop that sleeps a lot.
You also counteracted initial caching effects by switching from read newest to read
oldest after many iterations. Now if you introduce lower priority code that can run
while your time-critical code is sleeping, it will invalidate your cache, causing the
processor to swap instructions back and forth between main memory and cache
memory each time LabVIEW RT switches threads. However, since the time-critical
code is already running at near optimal speeds, it will have less time to sleep when
caching occurs. As the time-critical code sleeps less, the other lower priority threads
are allotted less CPU time or possibly none at all. In the worst case scenario, the time-
critical loop will not keep up with the wait multiple or scan interval, depending on
whether you have implemented software or hardware timing. When the loop execution
time cannot keep up with the requested loop interval due to caching effects, you must
slow down the loop timing. Generally, you do not have to compromise your loop rate
to run lower priority threads. This is only true if caching effects prevent your time-
critical code from keeping real-time.
Read newest data with AI SingleScan throughout the initial iterations. Using the
“read newest data” opcode, only the newest scan in the FIFO is collected from the
DAQ device, while the remaining points are thrown out. Reading newest data prevents
the FIFO from overflowing during the caching iterations and removes stale data points,
which can disrupt control response.
Stale scans
(t) remaining in FIFO
… …
Newest scan
collected from FIFO
AI SingleScan collects oldest
scan from FIFO and leaves
stale scans if present
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Discard Keep
“N” initial loop iterations are thrown out of the timing code
before mean cycle time and jitter are evaluated.
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The RDTSC timing shell has provisions for initial caching effects. The “Initial
points to ignore” allows you to discard the first “N” time-stamps so as not to group
the caching iterations with the optimal loop iterations when running the timing code
to compute mean, minimum, and maximum loop cycle time.
1. Launch LabVIEW Real-Time and select the appropriate RT Series Device from
the Select Target Platform dialog box. Close any VIs already running on the
target platform.
2. For RT Series DAQ Devices, select the Reset checkbox to reboot the hardware.
3. Select File»Open and open Cont Acq&Chart (hw timed) VI from c:\Program
Files\National Instruments\LabVIEW 6\Examples\daq\
anlogin\anlogin.llb.
4. Right-click on the VI icon on the front panel and select VI Properties.
5. Select Execution Options from the pull-down menu. Set the priority to time
critical priority (highest). This makes the VI run in the highest priority thread
on the RT Engine.
Before we run the example, we will add a Tick Count before and after the loop
to determine whether AI Single Scan really is synchronized with the scan clock.
6. Open the functions palette by right-clicking on the diagram window and select
the sequence structure located under the structures sub-palette.
7. Wrap the sequence structure around the while loop in the example.
This timing shell will only tell us how long overall the code took to execute.
To determine how fast each loop cycle executed on average, we need to divide
the overall time by the number of loop cycles. This can easily be accomplished by
passing the loop iteration terminal from the while loop in frame 1 to the timing
code in frame 2.
9. Modify the code in frame 1 and frame 2 to determine the average execution time
per loop cycle.
10. Run the VI with a scan rate of 100 Hz, and then stop the VI after a few seconds.
Notice that the average loop cycle time was approximately 1/100 second, which
corresponds to a period of 10 milliseconds.
Exercise 4-2
Objective: To control loop rates by using a DAQ-STC counter.
1. Launch LabVIEW Real-Time and select the appropriate RT Series Device from
the Select Target Platform dialog box. Close any VIs already running on the
target platform.
2. For RT Series DAQ Devices, select the Reset checkbox to reboot the hardware.
3. Select File»Open and open counterwait VI from Exercises\
Chapter 4\counterwait.llb.
The first thing that sets this example apart from normal pulse train generation
is that we configure a timeout (in seconds) using Counter Set Attribute VI.
The second node that makes this example unique is Counter Control within the
while loop. Notice that we use the wait parameter, which causes Counter Control
to become synchronized to the pulse train generated by the counter. If for some
reason the counter failed to start, we need it to time out to prevent the loop from
hanging indefinitely, hence the timeout mentioned earlier.
5. Now add a sequence timing shell around the while loop as you did with AI Single
Scan in the previous exercise.
6. Experiment with different pulse spec parameters and time the loop for several
iterations to verify that Counter Control really is synchronized to the counter’s
pulse train.
Exercise 4-3
Objective: To examine the Read Time Stamp Counter (RDTSC) timing
shell. (For RT Series PXI Controllers Only)
1. Launch LabVIEW Real-Time and select the appropriate RT Series device from
the Select Target Platform dialog box. Close any VIs already running on the
target platform.
2. Select File»Open and open RDTSC Timing Shell VI from
Exercises\Chapter 4\RDTSC Timing Shell.llb.
3. Look at the diagram. Inside the VI, you will find a For Loop and a subVI called
RDTSC.vi, which is merely a call to some external assembly-level code that reads
the time-stamp count register on Pentium processors. RDTSC returns two 32-bit
numbers corresponding to the upper and lower halves of a Pentium processor’s
64-bit time stamp counter register. Each time the Pentium clock generates a new
clock edge, the time stamp counter register increments once. By tracking the
counter register each time our loop executes, we can extract valuable timing
information with a resolution equal to 1/CPU speed. For our fastest controller,
which has an 850 MHz processor, we can measure loop rates with nanosecond
timing resolution.
When timing code with RDTSC, it is best to ensure that RDTSC executes at
exactly the same time with respect to the rest of the code inside your loop to
ensure accurate timing data is collected. To achieve this effect, we recommend
you wire RDTSC to your code such that RDTSC is either the last node of the first
node to execute within your loop.
Shared Resources
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Certain data structures, driver libraries, and variables can only be accessed serially,
one process at a time. A simple example of a shared resource common to all
programming languages is the global variable. As you know, global variables cannot
be accessed simultaneously from multiple processes to prevent race conditions.
Therefore, compilers automatically protect the global variable as a shared resource
while one process needs to access it. In the meantime, if a second process tries to
access the global variable while it is protected, the second process must wait until the
first process has finished with the global variable. As we will soon see, understanding
shared resources and how to identify them is an important skill when programming
real-time applications.
Note: These operations are inherently non-deterministic and should never be used
inside a time-critical priority loop if you’re attempting to achieve real-time
performance.
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For our purposes a shared resource is defined as a software object that can only be used
by one thread at a time. In this slide, let’s assume both processes constantly need to
access the shared resource. Let’s also assume Process 1 is running at normal priority,
while Process 2 runs at time-critical priority. Normally, when a time-critical thread
needs to execute, it preempts all other code running on the real-time target; however,
a normal priority thread can block the time-critical thread if it has not released a mutex
that the time-critical thread needs. This is known as a priority inversion because the
real-time operating system cannot allow the time-critical thread to preempt the normal
priority thread, merely because of the mutex around a shared resource.
A typical scenario of a priority inversion caused by a shared resource follows:
• When a lower priority thread needs a resource such as the LabVIEW Memory
Manager, it protects the resource from external access while in use. The lower priority
thread has acquired a mutex and begins allocating memory.
• Now, a time-critical priority thread wakes up while the lower priority thread
is using the resource and kicks the lower priority thread off of the processor.
• Then the time-critical priority thread wants to use the same protected resource
(i.e., wants to allocate memory), but is forced to wait because of the protection
(the mutex) around the resource. This is an inversion of priorities; a higher priority
thread is forced to wait because a lower priority thread has protected a resource the
higher priority thread needs.
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In this slide the shared resource is a global variable, which is shared by two VIs:
one set to normal priority and one set to time-critical priority.
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The real-time OS uses a method called priority inheritance to resolve the priority inversion
as quickly as possible. It does this by:
• Allowing the lower priority thread to temporarily “inherit” the time-critical priority setting
long enough to finish using the shared resource and to remove the protection.
• Once the protection is removed the lower priority thread resumes its original lower priority
setting and is taken off of the processor.
• Now the time-critical priority thread is free to proceed and use the resource (i.e., access the
global variable).
A result of this priority inversion is increased software jitter in the time-critical priority thread.
The jitter induced by a protected global variable is generally quite small compared to the jitter
induced by protecting the LabVIEW Memory Manager. Unlike accessing global variables,
performing memory allocations is unbounded in time and can introduce a broad range of
software jitter while parallel operations try to allocate blocks of memory in a wide variety of
sizes. The larger the block of memory to be allocated—the longer the priority inheritance takes
to resolve the priority inversion.
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The slide animation depicts one loop acquiring a mutex to the global variable,
blocking the other loop for a brief moment. The global variable is a very common
type of shared resource, which can cause problems for real-time applications. Every
shared resource conflict inevitably manifests itself as software jitter. Therefore, we
must learn how to avoid priority inversions and shared resource conflicts in general
to minimize software jitter.
FGVs can be
“skipped if busy.”
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The “skip if busy” setting ensures that the time-critical thread skips the FGV if another process
is currently accessing the same FGV. When skipped, the FGV returns default values for each
data type on the FGV diagram: numerics return 0, Booleans return false, etc. The FGV images
used in the slides depict only one set of shift registers for “A” and “B.” FGVs are similar to
queues because you can add more shift registers to store a longer history of values of “A” and
“B.” You can also add more variables to the FGV, to store “C,” “D,” “E,” etc. An advantage
of FGVs over normal global variables is that FGVs help prevent shared resource conflicts while
still offering the same functionality as normal global variables. A disadvantage to FGVs is that
you may lose data during inter-thread communication when the FGV gets skipped inside the
time-critical thread.
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As you saw in the previous slides, sharing subVIs cause priority inversions the same way
global variables do. When a subVI is set to subroutine priority, that subVI can be “skipped”
within time-critical code to avoid software jitter that would have occurred from a priority
inversion. If you are running unrelated parallel processes that call the same subVI, you can
configure the subVI for reentrant execution. A reentrant subVI establishes a separate data
space in memory each time it is called. This feature allows LabVIEW RT to call several
instances of a particular subVI simultaneously. Because reentrant subVIs use their own data
space, however, they cannot be used to share or communicate data between threads. You
should only use reentrancy when you must simultaneously run two or more instances of a
subVI within unrelated processes that do not need to share data within the reentrant subVI.
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As mentioned in the previous slide, NIDAQ32.dll is not multithread safe. This has
serious implications for parallel DAQ processes because the DAQ driver can only be
accessed by one process at a time, much like a global variable. Therefore, you must
architect your DAQ applications carefully to avoid parallel DAQ calls like the one
in this slide. The recommended method for architecting a DAQ application is to
call DAQ VIs in only one loop, serially. You can ensure that DAQ VIs are called
serially by routing one error cluster through every DAQ VI in the loop.
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The only way to achieve true real-time DAQ, is to call all DAQ VIs from within the same
loop inside the same thread, which must be given time-critical priority.
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The slide features two parallel loops. The top loop dynamically builds an array
using the Build Array function, while the lower loop builds the same array using
auto-indexing.
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Initialize Array in combination with Replace Array Subset allows you to pre-allocate
arrays inside a loop to avoid shared resource conflicts with the LabVIEW RT memory
manager.
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In general, memory allocations within a time-critical loop will induce jitter and affect
the deterministic properties of a LabVIEW RT program. All memory allocations must be
removed to guarantee robust hard real-time performance. You must pre-allocate your arrays
outside of the loop if you want your application to run deterministically. Certain LabVIEW RT
functions, such as Build Array and Bundle, allocate memory.
Also try to cast data to the proper data type. Every time LabVIEW RT has to perform a type
conversion, either implicitly or explicitly, a copy of the data buffer is made in memory in order
to retain the new data type after the conversion. Use the smallest data type possible, and if you
need to convert the data type of an array, try to do that conversion before the array is built. Also
keep in mind that many LabVIEW RT functions reuse their input buffers when the output data
representation, size, and dimensionality matches the input. The same structure and number of
elements. This ability for a function to reuse buffers is called inplaceness.
Note: More information about inplaceness and LabVIEW memory management can
be found in the LabVIEW Advanced Course.
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We did not cover all types of shared resources in this chapter. Avoid semaphores, TCP/IP,
UDP, VI Server, and File I/O functions within your time-critical loop. These functions are
inherently non-deterministic and use shared resources. For example, semaphores are
themselves shared resources, network functions use the Ethernet driver, and file I/O functions
use the hard disk. These functions can introduce severe software jitter in time-critical code
on account of priority inversions.
Also be aware that all handshaking protocols are non-deterministic. GPIB, RS-232,
and TCP/IP are just a few things that should never be run at time-critical priority.
DAQ handshaking protocols like burst mode and 8255 emulation mode on the 653x boards
are also non-deterministic and should be avoided in time-critical loops.
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Real-Time Queues are like the regular LabVIEW Queues except they pre-allocate enough
memory required to store up to “n” elements of a user-defined numeric representation
(i.e., DBL, SGL, U32, etc.). As we learned earlier, pre-allocating memory is important because
dynamic memory allocations within a time-critical loop can add a significant amount of
software jitter. Each RT Queue allows users to push and pop elements simultaneously because
RT Queues actually consist of two queue copies in memory. Simultaneous read and write
access is a necessary feature of RT Queues to prevent shared resource conflicts. Like FGVs,
RT Queues allow you to safely pass data between threads. A benefit to using RT Queues instead
of FGVs is that you can pass data between threads without losing any data. Recall that FGVs
become “lossy” when they are skipped by the time-critical thread. One disadvantage to RT
Queues is that data cannot be accessed arbitrarily or in blocks. RT Queue elements must be
popped from the queue one element at a time.
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PART 1.
1. Launch LabVIEW Real-Time and select the appropriate RT Series device from
the Select Target Platform dialog box. Close any VIs already running on the
target platform.
2. Select File»New, and create a new VI set for normal priority that writes
to a global variable.
The timing shell should reveal slightly more jitter when globalWriter VI is
running in the background. If the global were much larger than a simple Boolean,
such as a large array or cluster, the jitter would be much more pronounced.
7. Try other types of global variables to see what effect they have on jitter.
Try keeping the user interface for the global VI open to see the effect on jitter.
PART 2.
1. Select File»Open and open Normal Priority Loop VI from
Exercises\Chapter 5.
2. Examine the block diagram and study LV2Global VI.
What are the timing differences between global variables and Functional Globals?
Which case had the least jitter?
Exercise 5-2
Objective: To examine the LabVIEW RT Memory Manager as a shared
resource using the RDTSC Timing Shell.
1. Launch LabVIEW Real-Time and select the appropriate RT Series device from
the Select Target Platform dialog box. Close any VIs already running on the
target platform.
2. Select File»Open and open RDTSC Timing Shell VI from
Exercises\Chapter 5\RDTSC Timing Shell.llb. Also open
Background Memory Allocation.vi.
PART 1.
3. Modify the RDTSC Timing Shell VI to build an array using the Build
Array function. This will cause the array to grow in size while the VI is running.
Use the Initialize Array function to start the array with a size of 10,000. Add
a small wait statement to the loop as well.
4. Run the Background Memory Allocation VI. Then run the timing
benchmark you’ve created.
You should avoid allocating memory within your time-critical code for two
reasons. First, other background memory allocation can cause a priority inversion,
which adds jitter to your loop. Second, the process of allocating memory is not
bounded in time. The time required to resolve a memory allocation depends on
the amount of memory requested and the amount of free memory available. As
you saw in this example, the amount of requested memory grows as we build
larger arrays while the amount of available memory diminishes.
2. Run the Background Memory Allocation VI. Then run the timing
benchmark you’ve created.
3. Try running the timing benchmark with the Background Memory
Allocation VI stopped. Notice that the maximum jitter was not any greater
when the memory allocation VI was running. Memory is allocated before the
For Loop begins when using auto-indexing.
What conclusions can you draw from the timing results? How are memory
allocations handled differently with auto-indexing turned on than they are with
the Build Array function?
2. Run the Background Memory Allocation VI. Then run the timing
benchmark you’ve created.
3. Try running the timing benchmark with the Background Memory
Allocation VI stopped. Notice that the maximum jitter was not any greater
when the memory allocation VI was running. Memory is allocated before the
For Loop begins and the Replace Array Subset VI does not invoke the memory
manager.
Exercise 5-3
Objective: To transfer data between threads using RT queues.
1. Select File»Open and open Simple RT Queue Example – Time Critical Loop VI
from Exercises\Chapter 5\RT queue\Simple RT Queue
Example - Time Critical Loop.llb.
2. Examine the block diagram and priority of this VI.
3. Now select File»New, and build the following block diagram. Use the RT Queue
VIs from RTQ.llb.
The subVI node labeled “Real Time Loop” in the above illustration is merely
Simple RT Queue Example – Time Critical Loop VI. Simple
RT Queue Example VI pushes two new elements (a stop flag and amplitude)
into Control Data Queue and pops one element (sine data) from Result Data
Queue. When Result Data Queue has no new data available, the case structure
switches to TRUE and does nothing.
RT queues are also superior to normal global and functional global variables
because RT queues notify the user when they have lost data with the Boolean
parameter overwrite. When writing to global variables faster than reading them,
you will inevitably lose data, but there is no easy way to determine when exactly
this has happened.
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We will not cover the details of Application Builder in this class. To learn more
about the Application Builder settings, please review LabVIEW Basics II.
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Rather than downloading an executable to the RT-PXI hard disk, you can keep the
executable on the Host PC and run it targeted to the RT-PXI using a command line
arguments. This slide depicts the properties page of a shortcut to an executable called
Charts.exe. If we launch the shortcut, it will download and run Charts.exe on the
RT-PXI target at 130.164.48.131. By simply adding “-target” at the end of the
executable’s path, LabVIEW RT knows to download the executable to the RT-PXI target
and run it. The command line argument “-quithost” closes the user interface
to the executable on the Host PC and the communication thread on the RT-PXI.
To reset the device before or after running and executable, use “-reset.”
If the Host PC crashes while an executable is running on the RT Engine with a user
interface on the Host PC, if you later relaunch the executable targeted to the RT Engine,
the Front Panel will synchronize with the code still running on the RT Engine, and
continue to provide the user interface.
Batch files offer an easy method of launching multiple executables to various targets
at once. You can create a batch file by simply opening a new text file with Notepad
and saving the document with the extension *.bat. Inside the batch file, type
command lines as though you were at a command prompt, supplying the full
path and name of the executable(s) you wish to launch, followed by any command
line arguments. Batch files and shortcuts are very handy when placed in the
~\Windows\startup folder, because they allow you to automatically download
and run executables to any target if the Host PC loses power.
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Logging on to the RT-PXI’s FTP server can be done from a command prompt or from
a Web browser window. In this slide, we are demonstrating how to log onto the FTP
server from the command prompt. To transfer files, you must have some knowledge
of FTP commands, which can be displayed by typing “?” at the FTP prompt. Be sure
to use DOS 8.3 file name format when specifying the path to the file you wish to
transfer. Example:
ftp> put c:\windows\progra~\nation~\labview\charts.vi
You should not exceed 8 characters per directory when specifying the path name.
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If you are unfamiliar with FTP commands and feel more comfortable using
a web browser, simply launch Internet Explorer and type the IP address to the
RT-PXI Controller.
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The RT-PXI also runs a Web server, which must be enabled through LabVIEW RT
while targeted to the RT-PXI Controller. Go to Tools»Network Options,
and check Enable Web Server. The default web server path is
c:\NI-RT\system\WWW. You can place image files, HTML files,
etc. in this directory on the RT-PXI and then browse to them remotely from
a web browser.
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The web server is a powerful tool on the RT-PXI because you can incorporate
real-time control and file I/O to publish your results over the Web.
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The point to having a software watchdog is to disable a critical system in the event
of a software crash. The software watchdog on the PXI Controller is actually
a counter, which can trigger several different expiration actions if it expires,
including resetting the PXI Controller, setting an occurrence in software, and
activating a PXI back plane trigger.
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The watchdog API can be found under the RT functions palette. The top-level
watchdog API consists of three main VIs—Configure Watchdog, Whack Watchdog,
and Clear Watchdog.
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1. Launch LabVIEW Real-Time and select the appropriate RT Series device from
the Select Target Platform dialog box. Close any VIs already running on the
target platform.
2. Select File»Open and open MyApp VI from Exercises\Chapter 6.
3. Examine the diagram and run the VI on the target, watching the signal accessory.
Be sure to select the appropriate DAQ device number and make it the default
value. (Note: If you fail to make the DAQ device number the default value, later
steps will result in errors.)
4. Save the VI.
4. Check the box labeled Launch Application at Boot-Up, and then click OK.
5. Next select Tools»Build Application and click on the Source Files tab.
6. Add MyApp VI as the top-level VI.
10. Simulate a power failure by recycling power on the PXI controller then monitor
the signal accessory as the PXI boots up.
4. Then follow the remaining steps as above, adding MyApp VI as the top-level VI
and building the application.
This time we compiled the VI while targeted to the host computer. (This is needed
for RT Series DAQ Devices because the processor board has no hard drive on
which to store the executable.) We will need to use command-line arguments
to configure the executable to target itself to the RT device. We will also need
to put the executable in our Windows startup directory.
5. Once you have built the VI into an executable, it should be located on your
desktop, labeled MyApp.exe.
6. Right-click on it and choose Create Shortcut.
7. Right-click on the shortcut, and choose Properties.
8. In the field labeled Target, add a command-line argument to target the executable
to the 7030 device (i.e., -target DAQ::1, or -target [IP Address]).
Note: For users of Windows NT, you can download a utility called TweakUI.exe from
Microsoft, which allows you to configure Windows NT to automatically log in upon
bootup. Also, the paths may be different for Windows NT.
PART 1.
1. On your Windows PC, click Start»Run, then type ftp 130.164.48.22,
except use the IP address of your controller instead of 130.164.48.22.
2. When prompted for a username and password, just hit Enter.
3. Once you have reached the ftp command prompt, type “?” and then hit Enter.
4. After studying the list of ftp commands, try using the put and get commands
to transfer files back and forth. You may need to change local directory with lcd,
or change target directory with cd. You can list the contents of the remote
working directory with ls.
3. You should have immediate access to the remote hard drive via the Web browser,
so try dragging and dropping contents to transfer files.
Exercise 6-3
Objective: To become familiar with the LabVIEW Real-Time Web server
on PXI controllers.
Exercise 6-4
Objective: To implement a watchdog timer, which will reboot the PXI
controller when the watchdog expires.
4. Study the front panel of Watchdog Reset – RT Engine VI. Notice the
watchdog timeout period is 0.25 seconds and the loop period is set for only
100 milliseconds or 0.10 seconds, which ensures that Watchdog Whack will
have plenty of time to reset the watchdog counter before it resets.
Note: This section requires knowledge of advanced DAQ programming and timing
concepts and a 653x board for PART 2.
PART 1.
1. Launch LabVIEW Real-Time and select the appropriate RT Series device from
the Select Target Platform dialog box. Close any VIs already running on the
target platform.
2. Select File»Open and open Watchdog Example VI from
Exercises\Chapter 6\counterWatchdog.llb.
4. The first subVI sets up a DAQ counter on either a 660x device or an E-Series
device to perform pulse generation.
5. The second subVI resets the counter within the WHILE loop.
6. Finally, the last subVI clears and disarms the DAQ counter.
This example is almost identical to Watchdog Reset – RT Engine VI because
both examples configure a counter to perform a task after counting down some
time period. The WHILE loops in both examples reprogram the counter to start
counting down again, and if the WHILE loops are not executed on time,
the counter performs the watchdog expiration task. In this case, however,
the watchdog merely outputs a pulse rather than resetting the PXI controller
or setting an occurrence.
7. Download and run Watchdog Example VI using a Watchdog Delay of 5 seconds
and a Loop Delay of 3 seconds.
8. Slowly increase the loop delay to 5+ seconds while monitoring the output
of counter 0 on the DAQ device.
PART 2.
1. Launch LabVIEW Real-Time and select the appropriate RT Series device from
the Select Target Platform dialog box. Close any VIs already running on the
target platform.
2. Select File»Open and open digWatchdog VI from Exercises\Chapter 6\
digWatchdog.llb.
3. Study the diagram, which contains mostly advanced digital I/O functions.
On the other hand, if the loop dies or slows down significantly, the 653x device
will reach the end of the buffer and output a 1 or logic high. This voltage change
could be tied to a relay or some other external circuit to shut down a critical
system in the event of a software failure.
4. Download and run the VI with a clock frequency of 10 Hz and a sleep time
of 9 seconds or 9000 ms.
5. While the VI is running, monitor the state of digital line 0 on the 653x device.
It should be 0 volts.
6. Now increase the sleep time to 10+ seconds. What happens to digital line 0?