DM74LS573 Octal D-Type Latch with 3-STATE Outputs

October 1988
Revised March 2000

DM74LS573
Octal D-Type Latch with 3-STATE Outputs
General Description Features
The DM74LS573 is a high speed octal latch with buffered ■ Inputs and outputs on opposite sides of package allow-
common Latch Enable (LE) and buffered common Output ing easy interface with microprocessors
Enable (OE) inputs. ■ Useful as input or output port for microprocessors
This device is functionally identical to the DM74LS373, but ■ Functionally identical to DM74LS373
has different pinouts.
■ Input clamp diodes limit high speed termination effects
■ Fully TTL and CMOS compatible

Ordering Code:
Order Number Package Number Package Description
DM74LS573WM M20B 20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide
DM74LS573N N20A 20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.

Logic Symbol Connection Diagram

VCC = Pin 20
GND = Pin 10

Pin Descriptions Function Tables

Pin Names Description Output Latch Output
D0–D7 Data Inputs D
Enable Enable O
LE Latch Enable Input (Active HIGH) L H H H
OE 3-STATE Output Enable Input (Active LOW) L H L L
O0–O7 3-STATE Latch Outputs L L X QO
H X X Z
L = LOW State
H = HIGH State
X = Don't Care
Z = High Impedance State
QO = Previous Condition of O

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DM74LS573
Absolute Maximum Ratings(Note 1)
Note 1: The “Absolute Maximum Ratings” are those values beyond which
Supply Voltage 7V the safety of the device cannot be guaranteed. The device should not be
operated at these limits. The parametric values defined in the Electrical
Input Voltage 7V Characteristics tables are not guaranteed at the absolute maximum ratings.
Operating Free Air Temperature Range 0°C to +70°C The “Recommended Operating Conditions” table will define the conditions
for actual device operation.
Storage Temperature Range −65°C to +150°C

Recommended Operating Conditions

Symbol Parameter Min Nom Max Units
VCC Supply Voltage 4.75 5 5.25 V
VIH HIGH Level Input Voltage 2 V
VIL LOW Level Input Voltage 0.8 V
IOH HIGH Level Input Current −2.6 mA
IOL LOW Level Output Current 24 mA
TA Free Air Operating Temperature 0 70 °C

Electrical Characteristics
Over recommended operating free air temperature range (unless otherwise noted)
Typ
Symbol Parameter Conditions Min Max Units
(Note 2)
VI Input Clamp Voltage VCC = Min, II = −18 mA −1.5 V
VOH HIGH Level VCC = Min, IOH = Max,
2.7 3.4 V
Output Voltage VIL = Max
VOL LOW Level VCC = Min, IOL = Max,
0.35 0.5
Output Voltage VIH = Min V
IOL = 4 mA, VCC = Min 0.25 0.4
II Input Current @ Max Input Voltage VCC = Max, VI = 7V 1 mA
IIH HIGH Level Input Current VCC = Max, VI = 2.7V 20 µA
IIL LOW Level Input Current VCC = Max, VI = 0.4V −0.4 mA
IOS Short Circuit VCC = Max
−30 −130 mA
Output Current (Note 3)
ICC Supply Current VCC = Max 50 mA
IOZH 3-STATE Output VCC = VCCH
20 µA
OFF Current HIGH VOZH = 2.7V
IOZL 3-STATE Output VCC = VCCH
−20 µA
OFF Current LOW VOZL = 0.4V
Note 2: All typicals are at VCC = 5V, TA = 25°C.
Note 3: Not more than one output should be shorted at a time, and the duration should not exceed one second.

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 DM74LS573
Switching Characteristics
at VCC = 5V and TA = 25°C
RL = 2 kΩ,
Symbol Parameter CL = 50 pF Units
Min Max
tPLH Propagation Delay 27
ns
tPHL Data to Q 18
tPLH Propagation Delay 36
ns
tPHL LE to Q 25
tPZH 3-STATE Enable Time 20
ns
tPZL OE to Q 25
tPHZ 3-STATE Enable Time 20
ns
tPLZ OE to Q 25
tS(H) Setup Time (HIGH/LOW) 3
ns
tS(L) Data to LE 7
tH(H) Hold Time (HIGH/LOW) 10
ns
tH(L) Data to LE 10
tW(H) Pulse Width (HIGH)
15 ns
Data to LE

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DM74LS573
Physical Dimensions inches (millimeters) unless otherwise noted

20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide
Package Number M20B

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 DM74LS573 Octal D-Type Latch with 3-STATE Outputs
Physical Dimensions inches (millimeters) unless otherwise noted (Continued)

20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide

Package Number N20A

Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and
Fairchild reserves the right at any time without notice to change said circuitry and specifications.
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