Cyclic Code
Cyclic Code
=
g(1)(x) g(2)(x) g(n-r-1)(x) polynomials in C
# of binary polynomial with degree ≤ n-1 that are multiples of g(x) = 2n-r
2n-r = 2k r = n-k
Thm : In an (n,k) cyclic code, there exists one and only one code
polynomial of degree n-k
g(x) = 1 + g1x + g2x2 + … + gn-k-1xn-k-1 + xn-k
Non-Systematic Encoding
xn-ku(x) =a(x)g(x)+ t(x)
v(x) = u(x)g(x)
t(x)+ xn-ku(x) = a(x)g(x)
& deg[t(x)+ xn-ku(x)] n-1
Systematic Encoding ∴ It’s a code polynomial
xn+1 = g(x)h(x)
where h(x) = h0 + h1x + … + hkxk : parity polynomial
xkh(x-1) = hk + hk-1x + … + h0xk
Q: ∵ xkh(x-1) | xn+1 ∴ xkh(x-1) can also generate an (n, n-k) cyclic code
k-th coefficient
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2006/11/22 Yuh-Ming Huang, Information Coding Lab., CSIE NCNU Cyclic_Code 19
xn 1
g ( x ) h( x )
( g 0 g1 x g 2 x 2 ... g n k x n k )(h0 h1 x h2 x 2 ... hk x k )
g 0 h0 ( g1h0 g 0 h1 ) x ( g 2 h0 g1h1 g 0 h0 ) x ... 2
h v i n -i - j 0 1 j n - k
deg = j 項係數 i 0
Ans (3)
V = (v0,v1,…,vn-k-1,vn-k,vn-k+1,…,vn-1)
= (t0,t1,…,tn-k-1,u0,u1,…,uk-1)
=0
Ax + B (=s(x))
g0 g1 -1
b3x3 mod g(x) = (-g0b3+g12b3)x+g0g1b3
b0,b1,b2,b3
b2x2 mod g(x) = -g1b2x-g0b2
G
0 0
b1x mod g(x) = b1x
b3 0 b0 mod g(x) = b0
b2 b3
b1 g 0 b3 b2 g1b3
b0 g 0 (b2 g1b3 ) (b1 g 0b3 ) g1 (b2 g1b3 )
=
=
B A
2006/11/22 Yuh-Ming Huang, Information Coding Lab., CSIE NCNU Cyclic_Code 24
b3 x ( g1b3 )
x 2 g1 x g 0 b3 x3
b3 x 3 g1b3 x 2 g 0b3 x
( g1b3 ) x 2 ( g 0b3 ) x
( g1b3 ) x 2 g 1 ( g1b3 ) x g 0 ( g1b3 )
( g 0b3 g 1 g1b3 ) x g 0 g1b3
g0 g1 -1
b3
G
0 0
b3 0
0 b3
g 0 b3 g1b3
g 0 g1b3 g 0 b3 g1 g1b3
g0 g1 -1
b3
G
0 0
0 0
b2 0
0 b2
g 0 b2 g1b2
g1 g2 gn-k-1
b0 b1 b2 … bn-k-1
Parity-check
digits
Figure 4.1 Encoding circuit for an (n, k) cyclic code with generator polynomial
g(X) = 1 + g1X + g2X2 + … + gn-k-1Xn-k-1 + Xn-k
Parity digits
(1 0 1 1) Code word
Message Xn-ku(X)
Figure 4.2 Encoder for the (7, 4) cyclic code generated by g(X) = 1 + X + X3
2006/11/22 Yuh-Ming Huang, Information Coding Lab., CSIE NCNU Cyclic_Code 30
< Method Ⅱ>
k 1
vn k j h v
i 0
i n i j 1 j n k --- (1)
+ + + +
Gate2 hk-1 hk-2 h2 h1
Figure 4.3 Encoding circuit for an (n, k) cyclic code based on the parity
polynomial h(x) = 1 + h1X + h2X2 + …+ hk-1Xk-1+Xk
Output
Figure 4.4 Encoding circuit for the (7, 4) cyclic code based on its parity
polynomial h(x) = 1 + X + X2 + X4
r(x)/g(x) ≈ g1 g2 gn-k-1
sn-k-1
r(X)
s0 s1 …
Received
vector
Figure 4.5 An (n-k)-stage syndrome circuit with input from the left end.
2006/11/22 Yuh-Ming Huang, Information Coding Lab., CSIE NCNU Cyclic_Code 33
Ref : pp. 21 & 22
r = (r0, r1, … ,rn-k-1, rn-k, … , rn-1) = (t0, t1, … , tn-k-1, u0, u1, … ,uk-1)
r•HT = (s0, s1, … , sn-k-1)
s0 = r0 + rn-kb00 + rn-k+1b10 + … + rn-1bk-1,0 = r0 + t0
Syndrome is simply the vector sum of the received parity digits and the
parity-check digits recomputed from the received information digits
∵ r(x) = r0 + r1x + … + rn-k-1xn-k-1 + xn-k•u(x)
u(x) = u0 + u1x + … + uk-1xk-1
∴ r(x)/g(x) = r0 + r1x + … + rn-k-1xn-k-1 + xn-k•u(x)/g(x)
=
t0 + t1x + … + tn-k-1xn-k-1
( rn-k, rn-k+1, … , rn-1 )G = ( t0, t1, … , tn-k-1, rn-k, rn-k+1, rn-1 )
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Thm : Let s(x) be the syndrome of a received polynomial r(x)
Then s(1)(x) [the syndrome of r(1)(x) (= x • r(x)/xn+1)] is equal to
x• s(x)/g(x)
Ref. pp.14
pf: s( x ) r ( x ) g ( x ) ?
x s( x ) g ( x ) x r ( x ) g ( x ) g ( x ) x r ( x ) g ( x )
= x r ( x ) x n 1 / g ( x )
= r (1) ( x ) g ( x ) s (1) ( x )
r(x) --- s(x)
r(1)(x) --- s(1)(x)
x p( x ) g ( x ) s( x ) g ( x ) g ( x ) x s( x ) g ( x ) =?
x p( x ) g ( x ) s( x ) g ( x ) x s( x ) g ( x )
Figure 4.6 Syndrome circuit for the (7, 4) cyclic code generated by g(X) = 1 + X + X3.
Shift Input Register contents
0 0 0 (initial state)
1 0 0 0 0
2 1 1 0 0
3 1 1 1 0
4 0 0 1 1
5 1 0 1 1
6 0 1 1 1
7 0 1 0 1 (syndrome s)
8 - 1 0 0 (syndrome s(1))
9 - 0 1 0 (syndrome s(2))
xn-kr(x)/g(x) ≈ g1 g2 gn-k-1
sn-k-1
s0 s1 …
r(X)
Figure 4.7 An (n-k)-stage syndrome circuit with Received vector
input from the right end.
Cor : The contents of the registers form the syndrome s(n-k)(x) of r(n-k)(x),
which is the (n-k)-th cyclic shift of r(x)
Note :
1. xn-kr(x)/g(x) = [xn-kr(x)/xn+1]/g(x) = r(n-k)(x)/g(x) = s(n-k)(x)
2. r(x) = v(x) + e(x)
∴ s(x) = r(x)/g(x) = e(x)/g(x) xn-kr(x)
= Q(x)(xn+1) + R(x)
= Q(x)p(x)g(x) + q(x)g(x) + s(x)
= [Q(x)p(x) + q(x)]g(x) + s(x)
r(X) ri vector
Gate Buffer registers
Received
vector
Feedback connection
Gate
Gate
Syndrome register
s(x) --- r(x)
s(1)(x) --- r(1)(x)
ei
Error pattern detection circuit Gate
Syndrome modification
Figure 4.8 General cyclic code decoder with received polynomial r(X)
shifted into the syndrome register from the left end
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Example 4.9
Consider the decoding of the (7, 4) cyclic code generated by g(X) = 1 + X + X3.
This code has minimum distance 3 and is capable of correcting any single error
over a block of seven digits. There are seven single-error patterns. These seven
error patterns and the all-zero vector form all the coset leaders of the decoding
table. Thus, they form all the correctable error patterns. Suppose that the
received polynomial r(X) = r0 + r1X + r2X2 + r3X3 + r4X4 + r5X5 + r6X6 is shifted
into the syndrome register from the left end. The seven single-error patterns and
their corresponding syndromes are listed in Table 4.4.
TABLE 4.4 ERROR PATTERNS AND THEIR SYNDROMES WITH THE RECEIVED
POLYNOMIAL r(x) SHIFTED INTO THE SYNDROME REGISTER FROM THE LEFT END
Error pattern Syndrome Syndrome vector
e(X) s(X) (s0, s1, s2)
e6(X) = X6 s(X) = 1 + X2 (1 0 1)
e5(X) = X5 s(X) = 1 + X + X2 (1 1 1)
e4(X) = X4 s(X) = X + X2 (0 1 1)
e3(X) = X3 s(X) = 1 + X (1 1 0)
e2(X) = X2 s(X) = X2 (0 0 1)
e1(X) = X1 s(X) = X (0 1 0)
e0(X) = X0 s(X) = 1 (1 0 0)
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Buffer register
r(X) r’(X)
Multiplexer
Input Output
Gate
Gate
0 0 1
Gate
Figure 4.9 Decoding circuit for the (7, 4) cyclic code generated by
g(X) = 1 + X + X3.
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Syndrome Buffer register Correction
register Pointer
0
1 0 1 1 0 1 1
Initial 0 0 1
1st shift 1 1 0 1 1 0 1 1 0 1
2st shift 0 1 1 1 1 1 0 1 1 0
3rd shift 1 1 1 0 1 1 1 0 1 1
4th shift 1 0 1 1 0 1 1 1 0 1
1 0 0
0
1 Error corrected
0 1 0 1 1 1 0
5th shift 0 0 0
6th shift 0 0 0 0 0 1 0 1 1 1
0
Corrected word
7th shift 0 0 0 1 0 0 1 0 1 1
r(X) ri
Gate Buffer register r(X)
Received Corrected
vector Gate vector
Feedback connection
Note: Gate
<Type I> circular shift 後考量
<Type II> circular shift 前考量
Syndrome register
(Syndrome
modification)
Gate
ei
Error-pattern detection circuit
Figure 4.11 General cyclic code decoder with received polynomial r(X)
shifted into the syndrome register from the right end.
2006/11/22 Yuh-Ming Huang, Information Coding Lab., CSIE NCNU Cyclic_Code 44
Example 4.10
Again, we consider the decoding of the (7, 4) cyclic code generated by
g(X) = 1 + X + X3. Suppose that the received polynomial r(X) is shifted
into the syndrome register from the right end. The seven single-error
patterns and their corresponding syndromes are listed in Table 4.5.
We see that only when e(X) = X6 occurs, the syndrome is (0 0 1) after
the entire received polynomial r(X) has been shifted into the syndrome
register. If the single error occurs at the location Xi with i ≠ 6, the
syndrome in the register will not be (0 0 1) after the entire received
polynomial r(X) has been shifted into the syndrome register. However,
another 6 – i shifts, the syndrome register will contain (0 0 1). Based on
this fact, we obtain another decoding circuit for the (7, 4) cyclic code
generated by g(X) = 1 + X + X3, as shown in Figure 4.12. We see that
the circuit shown in Figure 4.9 and the circuit shown in Figure 4.12 have
the same complexity.
Gate
Gate
Gate
Figure 4.12 Decoding circuit for the (7, 4) cyclic code generated by
g(X) = 1 + X + X3.
2006/11/22 Yuh-Ming Huang, Information Coding Lab., CSIE NCNU Cyclic_Code 47