DPC With Overlap and Save Method
DPC With Overlap and Save Method
MULTIFUNCTION RADAR.
BY
DHIVYA.R
REG.NO. : 15703008
The existing methods used to generate Inphase (I) and Quadrature phase (Q)
components that are used to extract the target information from the reflected signals, uses
oscillator that has fixed frequency and mixer. The disadvantage of these methods is
whenever the input sampling frequency of the component is changed; the oscillator
(hardware) has to be changed. While the Digital Amplitude Phase Demodulation (DAPD)
that contains Direct Digital Synthesis (DDS) and a mixer can ameliorate such limitations.
DDS, otherwise known as Numerically Controlled Oscillator, uses phase accumulator,
which can generate various frequencies based on the value of the phase accumulator.
The I & Q signals which are then passed through the signal processing chain to
extract range, velocity and elevation information about the target. All the existing radars
are processor based those are limited for low and moderate frequency applications. While
the Field Programmable Gate Array (FPGA) based Signal processor can work under wide
range of frequencies including passband level. Thus FPGA based signal processor can be
useful in Space Time Adaptive Processing (STAP) applications.
Pulse compression is a method to discriminate two targets that are closer in range.
Doppler filtering is a method to extract the target information. The objective of the
present investigation is two fold: a) to generate I and Q components using DAPD, b) to
implement FPGA based signal processor by implementing Pulse compression and
Doppler filtering in it and to test the performance.
All these algorithms are implemented using XILINX software and tested in the
Virtex II FPGA kit.
ACKNOWLEDGEMENT
scientist ‘H’, Director LRDE, for giving me permission to carryout the project
scientists ‘B’ for providing guidance, suggestions and corrections, in every stage,
which made my project to come out with flying colors.I am also thankful to
environment to work.
members and the non-teaching staff for extending their support and co-operation
for the completion of my project.Last but not the least, I wish to thank all my
Chapter 3
Direct Digital Synthesis 22
3.1. Overview 22
3.2. DDS Advantages 22
3.3. Theory of Operation 23
3.4. Trends in Functional Integration 27
3.5. Calculating the Frequency Tuning Word 29
3.6. Understanding the Sample Output of a DDS Device 29
3.7. Jitter and Phase Noise Considerations in a DDS System 30
3.8. Direct Clocking of a DDS 31
3.9. DDS as a Clock Generator 31
3.10. DDS Vs Standard PLL 32
Chapter 4
Pulse Compression 34
4.1. Introduction 34
4.2. Concept of Operation 36
4.3. Types of Pulse Compression 37
4.3.1. Analog Pulse Compression 37
4.3.1.1. Correlation Processor 37
4.3.1.2. Stretch Processor 38
4.3.2. Digital Pulse Compression 38
4.3.2.1. Frequency Coding 39
4.3.2.2. Binary Phase Codes 40
4.3.2.3. Poly Phase Codes 42
4.3.3. Linear Frequency – Modulated Waveforms 44
4.3.3.1. Merits of Chirp 44
4.3.4. Pulse Compression Matched Filter 45
4.3.4.1. Pulse Compression Algorithm 45
4.3.4.2. Pulse Compression Implementation 46
Chapter 5
Doppler Filtering 47
5.1. Introduction 47
5.2. Doppler Effect 47
5.2.1. Doppler Filter Bank 48
5.3. Bandwidth of the Filters 49
5.4. Passband of the Filter Bank 50
5.5. Filtering Requirement 52
Chapter 6
System Requirements 53
6.1. The Hardware and Software Requirements 53
6.1.1. Hardware 53
6.1.2. Software 53
6.2. MATLAB 53
6.3. XILINX 54
Chapter 7
System Testing 56
Chapter 8
Results 57
Chapter 9
Conclusions 68
Chapter 10
Future Enhancements 69
References 70
List of Figures
List of Abbreviations
LIST OF ABBREVIATIONS
RF Radio Frequency
RADAR FUNDAMENTALS
1.1. Radar
The word “RADAR” is an acronym coined from the expression “RAdio Detection
And Ranging”. RADAR can detect the presence of target and measure its position, and it
can measure the velocity of the target.
Equipment that uses the principles of radar is called a radar system. Such a radar
system may be small enough to be installed in an automobile spotlight, such as a speed –
detection radar, or large enough to require one or more buildings to enclose a single
complete radar system.
Radar is an electromagnetic system for the detection and location of the reflecting
objects such as aircraft, ships, spacecrafts, people, and the natural environment. It
operates by radiating energy into space and detecting the echo signal reflected from the
object, or the target. The reflected energy that is returned to the radar not only indicates
the presence of a target, but by comparing the received echo signal with that was
transmitted, its location can be determined along with other target-related information. It
can operate in darkness, haze, fog, rain, and snow. Its ability to measure distance with
accuracy and in all weather is one of its most important attributes.
Electronically steerable phased array is of interest because they can provide agile,
rapid beam steering Potential for large peak and large average power. Each element can
have its own transmitter and receiver. The power aperture product can be large,
especially at lower frequencies.
The disadvantage of phased array radar is that it is complex and can be of high cost.
If the transmitter power is Pt and radiated by an isotropic antenna, the power density
at a distance R from the radar is equal to the radiated power divided by the surface area
4πR 2 of an imaginary sphere of radius R, or
Pt
Power density at range R from an isotropic antenna = (1.1)
4πR 2
Power density is measured in units of watts per square meter. Radars, however,
employ directive antennas to concentrate the radiated power Pt in a particular direction.
The gain of the antenna is measure of the increased power density in some direction as
compared to the power density that would appear in that direction from an isotropic
antenna. The maximum gain G of the an antenna may be defined as
Pt Gt
Power density at a range R from a directive antenna = (1.2)
4πR 2
The target intercepts a portion of the incident energy and scatters it in various
directions. It is only the power density scattered in the direction of the radar that is of
interest. The radar cross section of the target determines the power density returned to the
radar for a particular power density incident on the target. It is denoted by σ` and is often
called in short as target cross-section, radar cross section of target.
Pt Gt σ
Reradiated power density back at the radar = ° (1.3)
4πR 4πR 2
2
The radar cross section has units of area, but it can be misleading to associate the
radar cross section directly with the target physical size. Radar cross-section is more
dependent on target shape than on its physical size.
The radar antenna captures a portion of the echo energy incident on it. The power
received by the radar is given as the product of the incident power density times the
effective area Ae of the receiving antenna. The effective area is related to the physical
area A by the relationship Ae = ρ a A , where ρ a = antenna aperture efficiency. The
Pt Gt σ
Pr = ° ° Ae (1.4)
4πR 4πR 2
2
The maximum range of the radar Rmax is the distance beyond which the target cannot be
detected. It occurs when the received signal power equals the minimum detectable signal
S min . Substituting S min = Pr and rearranging
1
P GtA σ 4
Rmax = t 2 e (1.5)
(4π ) S min
This is the fundamental radar range equation. (It is also called, for simplicity, the
radar equation or range equation). The important parameters are the transmitting gain and
the receiving effective area. The transmitter power Pt has not been specified as either the
average or the peak power. It depends on how S min is defined. Here Pt denotes peak
power.
If the same antenna is used for both transmitting and receiving, as it usually is in
radar, antenna theory gives the relationship between the transmit gain G and the receive
effective area Ae
4πAe 4πρ a A
G= = (1.6)
λ2 λ2
c
Where λ= wavelength. (Wavelength λ = , where c=velocity of propagation and
f
f =frequency)
The most common radar signal, or waveform, is a series of short duration, somewhat
regular shaped pulses modulating a sine wave carrier. (This is called sometimes pulse
train). The range to a target is determined by the time TR it takes for the radar signal to
travel to the target and return back. Electromagnetic energy in free space travels with the
speed of light, which is c = 3 × 10 8 m / s . Thus the time for the signal to travel to a target
located at a range R and return back to the radar is 2R/c.the range to a target is then
cT R
R= (1.7)
2
The maximum unambiguous range beyond which targets are not expected often
determines the pulse repetition frequency. When echoes appear from beyond the
maximum unambiguous range, especially for some unusually large target or clutter
source or when anomalous propagation conditions occur to extend the normal range of
the radar beyond the horizon. Echo signal that arrive at a time later than the pulse
repetition period are called second time around echoes. They are also called multiple time
around echoes, particularly when they arrive from ranges greater than 2 Run . The apparent
range of these ambiguous echoes can result in error and confusion.
Changing the PRF of the radar can recognize ambiguous range echoes. When the
PRF is changed, the unambiguous echo remains at its true range. Ambiguous range
echoes, however, appear at different apparent ranges for PRF.
When a reflected radar signal is received from a radially moving target an apparent
shift in the RF transmitted frequency is measured. This frequency shift is then a measure
of the relative radial velocity of the target. For every half wavelength per second that a
target’s range decreases, the RF frequency phase of the received signal advances by the
equivalent of one cycle per second (one hertz). The formula for the Doppler shift is as
follows:
C = Speed of light
When the moving target’s direction is at an angle to a stationary radar’s beam, the
measured Doppler frequency must be corrected by the cosine of the angle that is formed
by the radar’s and target’s lines of direction. If the radar is airborne, the measured
Doppler frequency must be corrected by the cosine of the off-bore sight angle as well as
by the cosine of the angle that is due to the difference in altitude between the radar and
the target.
A Doppler filter bank is set of contiguous filters for detecting targets. A filter bank
has several advantages over the single filters.
Multiple moving targets can be separated from one another in a filter bank. This can
be particularly important when one of the echo signals is from undesired moving clutter,
such as rainstorm or birds with a non-zero Doppler ship. When the clutter and target echo
signal appear in different Doppler filters, the clutter echo need not interfere with the
detection of the desired moving target.
A measure of the targets radial velocity can be obtained from the filter number in
which detection occurs. It might be ambiguous, but a change in the prf can resolve the
ambiguity in the radial velocity, Just as changing the prf can resolve range ambiguities.
The narrow band Doppler filters exclude more noise than do the MTI delay line
cancellers by providing coherent integration.
A radar that increase its PRF high enough to avoid the problems of blind speed is
called pulse Doppler radar more precisely, a high PRF pulse Doppler radar is one with no
blind speeds within the Doppler space. In some situations, however, it may be beneficial
to operate at slightly lower PRF and accept both range and Doppler ambiguities. Such
radar is called a medium PRF pulse Doppler radar. Thus there are three different types of
pulse radars that use Doppler’s. They differ in their PRFs and the type of ambiguities
they are willing to tolerate. These are
2. The high PRF pulse Doppler with just the opposite many range
ambiguities and no Doppler ambiguities
3. The medium PRF pulse Doppler radar has both the Range and Doppler
ambiguity.
Radar can obtain a target location in range and azimuth, and sometimes elevation.
After several observations of the moving target over a period of time, the target
trajectory, or track, can be obtained.
The resolution capabilities of radar usually determine whether a target is considered
as a point scatter or a distributed target
• Range
The measurement of distance, or range, can be obtained from the round-trip time TR
required for a radar signal to travel to the target and back. The range r is given by
cT R
R= . In many radar applications the target range is the most significant
2
measurement that is made. No other sensor has been able to compete with radar for
determining range to distant target, especially in accuracy, ability to make a measurement
over very long or very short distances and under adverse weather conditions. Long-range
air surveillance radar might measure range to an accuracy of many tens of meters, but
accuracies of few centimeters are possible with precision systems. In most precise
systems, the accuracy of a range measurement is limited only by their accuracy with
which the velocity of propagation is known. The spectral bandwidth occupied by the
radar signal is fundamental resource required for accurate measurement. The greater the
bandwidth, the more accurate can be the range measurement.
• Angle Measurement
Almost all radars utilize the directive antennas with relatively narrow beam widths.
A directive antenna not only provide the large transmitting gain and large receiving
aperture need for detecting weak echo signals, but its narrow beam width allows the
targets direction to be determined accurately. It can do this by noting the direction the
antenna points when its received echo signal is maximum. Typical microwave radar
might have a beam width of one or a few degrees. The narrower the beam width, the
greater the mechanical and electrical tolerance that are required of the antenna.Angular
accuracy can be much better than the antenna beam width. Angle accuracy depends on
the electrical size of the antenna (size measured in wave lengths) with SNR typical of
those required for reliable detection, the angular location of a target can be determined to
about1/10th of beam width. The best precision monopulse tracking radars used for range
instrumentation can determine angle to 0.1mrad rms (0.006 degree) if the SNR is large
enough and if the proper efforts are taken to minimize errors.
• Radial Velocity
Where λ = wavelength. It can be shown from theoretical expressions that the radial
velocity accuracy derived from the Doppler frequency shift can be much better than that
found from the range rate, assuming the time between the two range measurements in the
range two method is same as the time duration of the Doppler frequency measurement.
• Symmetry
The response of the target to change in polarization of the radar signal can provide
a measure of the symmetry of the target. (The polarization of a radar signal is determined
by the orientation of the electric field). If a sphere were directly viewed by radar with a
rotating linearly polarized signal, there would be no change of the echo signal when the
polarization is changed.
Radar is the term used by radar engineers to denote unwanted echoes from the
natural environment. It implies that these unwanted echoes “clutter” the radar and make
difficult the detection of unwanted targets. Clutter includes echoes from land, sea,
weather (particularly rain), birds and insects. At the lower radar frequencies, echoes from
ionized meteor trails and aurora also can produce clutter large clutter echoes can mask
echoes from desired targets and limit radar capability. When clutter is much larger than
receiver noise, the optimum radar waveform and signal processing can be quite from that
employed when only receiver noise is the dominant limitations of sensitivity. Radar
echoes from the environment are not always undesired, reflection from storm clouds, for
example, can be a nuisance to a radar that must detect aircraft, storm clouds containing
rain are what radar meteorologist wants to detect in order to measure rain fall rate over a
large area.
Echoes from land and sea are examples are of surface clutter. Echoes from rain and
chaff are examples of volume clutter.
Radar has been employed to detect targets on the ground, on the sea, in air, in space,
and even below ground. The major areas of radar application are briefly described below.
• Military
• Remote Sensing
All radars are remote sensors: however, this term is used to imply the sensing of
the environment. Four important examples of remote sensing are 1.weather observation,
which is a regular part of TV weather reporting as well as a major input to national
weather prediction 2.planetary observation, such as the mapping of Venus beneath its
visually opaque clouds. 3. Short range below ground probing and 4. Mapping of sea ice
to route shipping in an efficient manner.
Radar have been employed around the world to safely control air traffic in the
vicinity of airports (air surveillance radar, or ASR), and en route from one airport to
another (air route surveillance radar, or ARSR) as well as ground traffic and taxing
aircraft on the ground (airport surface detection equipment, or ASDE).. The air traffic
control radar beacon system widely used for the control of air traffic, although not a
radar, originated from military and uses radar like technology.
CHAPTER 2
2.1. Introduction:
In the radar signal generator (RSG), the digital generation unit generates the
frequency modulated (chirp) very low IF for pulse compression. The modulation may be
Linear Frequency Modulation (LFM) or Non-linear Frequency Modulation (NLFM).
The very low IF (VLIF) at the RSG is 10 MHz and the bandwidth (BW) is 2.5 MHz.
Sampling is done by 20 MHz clock. DAPD removes the VLIF carrier and generates the I
and Q components digitally. The complete DAPD is done in RSG/RSR.
The 5 MHz VLIF signal is digitized at 20 Mega samples per second. The sampled
signal is filtered by an image rejection filter (low pass FIR filter) and decimated by 8 to
get the I and Q signal. If I(t) is the input signal to be sampled, then the sampled signal is
given by
If I(f) is the spectrum of I(t), then the spectrum of the sampled signal is given by
X(f) = K [I(f – mfs)] (2.10)
where fs = 20 MHz
The image filtered complex signal Y(n) has a sampling rate of 20MHz.The input real
signal I(t) is converted into complex signal Y(n) by the use of DDS. Y(n) is decimated by
8 to get z(n) = y(8n).The spectrum of z(n) is given by
Hence the demodulation to get I and Q signal is done by digital filtering and simple
decimation process. The resultant I and Q signals are not exactly orthogonal due to
residual image. The image rejection depends on the filter characteristics H(Ω).The I and
Q signals are further time multiplexed and sent to signal processor (SP) along with other
synchros for further processing.
Direct digital synthesis (DDS) is a technique for using digital data processing blocks as a
means to generate a frequency- and phase-tunable output signal referenced to a fixed-
frequency precision clock source. Based on the reference clock source (100 MHz), DDS
generates a 5 MHz sine waveform and cosine waveform.The DDS is simulated in
XILINX and the output is shown in waveform (1).
The sampled coefficients of each pulse (1001 coefficients) from the signal
generation block is multiplied with the sine waveform and cosine waveform output of the
DDS block to get the in phase (I) and quadrature phase (Q) components i.e. real and
imaginary signal.The output is shown in waveform (2).
The real and imaginary signal are passed through the low pass FIR filter in which
the FIR filter is loaded with the LPF coefficients. This co-efficients has the low pass filter
characteristics. The cut off frequency of the low pass filter is fc/2 MHz.The low pass FIR
filter output is shown in waveform (4).
The LPF coefficients (32 coefficients) are generated in MATLAB using the
“Remez algorithm”. B = REMEZ (N, F, A) returns a length N+1 linear phase (real,
symmetric coefficients) FIR filter which has the best approximation to the desired
frequency response described by F and A in the minimax sense. F is a vector of
frequency band edges in pairs, in ascending order between 0 and 1. 1 corresponds to the
Nyquist frequency or half the sampling frequency. A is a real vector the same size as F
which specifies the desired amplitude of the frequency response of the resultant filter B.
The desired response is the line connecting the points (F(k), A(k)) and (F(k+1), A(k+1))
for odd k; REMEZ treats the bands between F(k+1) and F(k+2) for odd k as "transition
bands" or "don't care" regions. Thus the desired amplitude is piecewise linear with
transition bands. The maximum error is minimized.The convolved output of the signal
and the LPF co-efficients is shown in Graph (2).
The implementation of low pass FIR filter is done in VHDL using Xilinx software.
Fundamentally, an FIR is a type of digital filter with a very simple structure. It is nothing
more than a chain of delay, multiply, and add stages. Each stage consists of an input and
output data path and a fixed coefficient (a number which serves as one of the
multiplicands in the multiplier section).
The FIR filter equation for the output y(n), in terms of the input x(n) for an FIR of
arbitrary length N is,
Application of the z-transform leads to the transfer function, H(z), of an N-tap FIR filter.
Increasing the number of taps in an FIR increases the sharpness. The response of the FIR
is completely determined by the coefficient values. By choosing the appropriate
coefficients it is possible to design filters with just about any response: lowpass,
highpass, bandpass, bandreject, allpass, and more.
Figure 2.5: An N-tap FIR Filter
2.3.4.Decimator
The image filtered complex signal Y(n) is then passed to the next stage for
decimation. Here the complex signal Y(n) is decimated by 8 to get Z(n).The function of a
decimator is to take data that was sampled at one rate and change it to new data sampled
at a lower rate. The data must be modified in such a way that when it is sampled at the
lower rate the original signal is preserved. A pictorial representation of the decimation
process is shown in Figure below.
Figure 2.6: A Basic Decimator
Notice that the decimator has two parts. An input section that samples at a rate of Fs and
an output section that samples at a rate of (1/m)Fs, where m is a positive integer greater
than 1. The structure of the basic decimator indicates that for every m input samples there
will be 1 output sample. Here the value of m is 8.The decimated output is shown in
waveform (5).
CHAPTER 3
3.1. Overview
Direct digital synthesis (DDS) is a technique for using digital data processing blocks
as a means to generate a frequency- and phase-tunable output signal referenced to a
fixed-frequency precision clock source. In essence, the reference clock frequency is
“divided down” in a DDS architecture by the scaling factor set forth in a programmable
binary tuning word. The tuning word is typically 24-48 bits long, which enables a DDS
implementation to provide superior output frequency tuning resolution.
Today’s cost-competitive, high-performance, functionally integrated, and small
package-sized DDS products are fast becoming an alternative to traditional frequency-
agile analog synthesizer solutions. The integration of a high-speed, high-performance,
D/A converter and DDS architecture onto a single chip (forming what is commonly
known as a Complete-DDS solution) enabled this technology to target a wider range of
applications and provide, in many cases, an attractive alternative to analog-based PLL
synthesizers. For many applications, the DDS solution holds some distinct advantages
over the equivalent agile analog frequency synthesizer employing PLL circuitry.
While the analog output fidelity, jitter and AC performance of this simplistic architecture
can be quite good, but it lacks tuning flexibility. The output frequency can only be
changed by changing the frequency of the reference clock or by reprogramming the
PROM. Neither of these options support high-speed output frequency hopping.
With the introduction of a phase accumulator function into the digital signal chain, this
architecture becomes a numerically controlled oscillator, which is the core of a highly
flexible DDS device. An N-bit variable-modulus counter and phase register is
implemented in the circuit before the sine lookup table, as a replacement for the address
counter. The carry function allows this function as a “phase wheel” in the DDS
architecture.
To understand this basic function, visualize the sine wave oscillation as a vector
rotating around a phase circle each designated point on the phase wheel corresponds to
the equivalent point on a cycle of a sine waveform. As the vector rotates around the
wheel, visualize that a corresponding output sine wave is being generated. One revolution
of the vector around the phase wheel, at a constant speed, results in one complete cycle of
the output sine wave. The phase accumulator is utilized to provide the equivalent of the
vector’s linear rotation around the phase wheel. The contents of the phase accumulator
correspond to the points on the cycle of the output sine wave. The number of discrete
phase points contained in the “wheel” is determined by the resolution, N, of the phase
accumulator. The output of the phase accumulator is linear and cannot directly be used to
generate a sine wave or any other waveform except a ramp.
Therefore, a phase-to amplitude lookup table is used to convert a truncated
version of the phase accumulator’s instantaneous output value into the sine wave
amplitude information that is presented to the D/A converter. Most DDS architectures
exploit the symmetrical nature of a sine wave and utilize mapping logic to synthesize a
complete sine wave cycle from ¼ cycle of data from the phase accumulator. The phase-
to-amplitude lookup table generates all the necessary data by reading forward then back
through the lookup table.
The phase accumulator is actually a modulus M counter that increments its stored
number each time it receives a clock pulse. The magnitude of the increment is determined
by a digital word M contained in a “delta phase register” that is summed with the
overflow of the counter. The word in the delta phase register forms the phase step size
between reference clock updates; it effectively sets how many points to skip around the
phase wheel. The larger the jump size, the faster the phase accumulator overflows and
completes its equivalent of a sine wave cycle. For an N=32-bit phase accumulator, an M
value of 0000…0001(one) would result in the phase accumulator overflowing after 232
reference clock cycles (increments). If the M value is changed to 0111…1111, the phase
accumulator will overflow after only 21 clock cycles, or two reference clock cycles. This
control of the jump size constitutes the frequency tuning resolution of the DDS
architecture.
Figure 3.10: Signal flow through the DDS architecture
The relationship of the phase accumulator and delta phase accumulator form the
basic tuning equation for DDS architecture:
FOUT = (M (REFCLK)) /2N (3.15)
Where: FOUT = the output frequency of the DDS
M = the binary tuning word
REFCLK = the internal reference clock frequency (system clock)
N = the length in bits of the phase accumulator
Changes to the value of M in the DDS architecture result in immediate and phase
continuous changes in the output frequency. In practical application, the M value, or
frequency tuning word, is loaded into an internal serial or byte-loaded register, which
precedes the parallel-output delta phase register. This is generally done to minimize the
package pin count of the DDS device. Once the buffer register is loaded, the parallel-
output delta phase register is clocked and the DDS output frequency changes. Generally,
the only speed limitation to changing the output frequency of a DDS is the maximum rate
at which the buffer register can be loaded and executed. Obviously, a parallel byte load
control interface enhances frequency-hopping capability.
One of the advantages to the digital nature of DDS architecture is that digital
functional blocks can readily be added to the core blocks to enhance the capability and
feature set of a given device. For general-purpose use, a DDS device will include an
integrated D/A converter function to provide an analog output signal. This “complete-
DDS” approach greatly enhances the overall usefulness and “user-friendliness”
associated with the basic DDS devices. The present state of the art for a complete-DDS
solution is at 300 MHz clock speeds with an integrated 12-bit D/A converter. Along with
the integrated D/A converter, DDS solutions normally contain additional digital blocks
that perform various operations on the signal path. These blocks provide a higher level of
functionality in the DDS solution and provide an expanded set of user-controlled
features. The individual functional blocks are described below:
• A programmable REFCLK Multiplier function include at the clock input, multiplies
the frequency of the external reference clock, thereby reducing the speed requirement
on the precision reference clock. The REFCLK Multiplier function also enhances the
ability of the DDS device to utilize available system clock sources.
• The addition of an adder after the phase accumulator enables the output sine wave to
be phase-delayed in correspondence with a phase tuning word. The length of the
adder circuit determines the number of bits in the phase tuning word, and therefore,
the resolution of the delay. In this architecture, the phase tuning word is 14-bits.
• An Inverse SINC block inserted before the D/A converter compensates for the
SIN(X)/X response of the quantized D/A converter output, and thereby provides a
constant amplitude output over the Nyquist range of the DDS device
• A digital multiplier inserted between the Sine look-up table and the D/A converter
enables amplitude modulation of the output sine wave. The width of the digital
multiplier word determines the resolution of the output amplitude step size.
• An additional high-speed D/A converter can be included to provide the cosine output
from the DDS. This allows the DDS device to provide I and Q outputs, which are
precisely matched in frequency, quadrature phase, and amplitude. The additional D/A
converter may also be driven from the control interface and used as a control DAC
for various applications.
• A high-speed comparator function can be integrated which facilitates use of the DDS
device as a clock generator. The comparator is configured to convert the sine wave
output from the DDS D/A converter into a square wave.
• Frequency/phase registers can be added which allow frequency and phase words to be
pre-programmed and their contents executed via a single control pin. This
configuration also supports frequency-shift keying (FSK) modulation with the single-
pin input programmed for the desired “mark” and “space” frequencies.
The growing popularity in DDS solutions is due to the fact that all of this performance
and functionality is available at a reasonable price and in a comparatively small package.
The following is the guideline for the level of performance available from the dual 12-
bit/100 MHz complete-DDS solution
-100 MHz external reference clock
- Frequency tuning word length = 12 bits
- Phase tuning word length = 12 bits which provides .0847 degrees of phase delay control
resolution.
- Output frequency bandwidth (assuming one-third of REFCLK rate) = 33.33 MHz
-Output amplitude control = zero output to full scale in 204 steps (12-bit control word)
The implication here is that whatever circuit is used to generate the system clock
it will always exhibit some finite amount of timing jitter due to thermal noise. Thus,
thermal noise is the limiting factor when it comes to minimizing timing jitter.
The second source of timing jitter is coupled noise. Coupled noise can be in the form of
locally coupled noise caused by crosstalk and/or ground loops within or adjacent to the
immediate area of the circuit. It can also be introduced from sources far removed from
the circuit. Interference that is coupled into the circuit from the surrounding environment
is known as EMI (electromagnetic interference). Sources of EMI may include nearby
power lines, radio and TV transmitters, and electric motors, just to name a few.
The output signal quality of a direct digital synthesizer is dependent upon the
signal quality of the reference clock that is driving the DDS. Important quality aspects of
the clock source, such as frequency stability (in PPM), edge jitter (in ps or ns), and phase
noise (in dBc/Hz) will be reflected in the DDS output. One quality, phase noise, is
actually reduced according to 20 LOG (Fout/Fclk).
Reference clock edge jitter has nothing to do with the accuracy of the phase increment
steps taken by the phase accumulator. These step sizes are fixed by the frequency
“tuning” word and are mathematically manipulated with excellent precision regardless of
the quality of the clock. In order for the digital phase step to be properly positioned in the
analog domain, two criteria must be met:
• Appropriate amplitude (this is the DAC’s job)
• Appropriate time (the clock’s job)
A clock generator should produce a precisely timed logic pulse train with very low
edge jitter and a fixed duty cycle. The logic output levels should be compatible with the
devices that it will be “clocking”. Precise timing implies a very high-Q oscillator; low
edge jitter implies high noise immunity. While these attributes are relatively easy to
accommodate for a single frequency, for example, a crystal clock oscillator. But it is hard
for a designer to accommodate the need for multiple clock frequencies that need to be
changed frequently or rapidly and that have no integer relationship with each other. This
is where the DDS shines! With a single precise pulse train that times the assembly of new
sine wave samples, the DDS can output 2N-1 discrete frequencies (where N is the DDS
resolution in bits). These frequencies range from dc to one-half the input clock frequency
at intervals of 1/2N.The DDS output is a sampled sine wave containing many extraneous
frequency components .The amount of jitter resulting from an unfiltered sampled sine
wave is equal to 1 input clock cycle.
Extremely fast frequency changes make a DDS thousands of times more agile than a
PLL. This makes DDS a natural choice for frequency- hopping and spread-spectrum.
• Frequency resolution is extraordinary! Up to one-millionth of a Hertz
• Fundamental output frequency span > 40 octaves (.000001 Hz to 150 MHz)
• Effortless ultra high-speed digital phase modulation (PSK) and FSK
• Perfect, exactly repeatable synchronization of multiple DDS’s (allowing quadrature
and other phase offset relationships to be easily accomplished)
Applications requiring any of the above traits should evaluate DDS as a possible
solution. (As an example, consider dielectrophoresis: This phenomenon is utilized in
micro-biology studies to separate, move and rotate individual cells or bacteria in a
polarized medium using non-uniform traveling fields, typically under a microscope. The
traveling waves are emitted from microelectrodes that are excited by synchronized
signals from two DDS's. Rotation and movement of particles is accomplished by
connecting the synchronized signals of relative differing phases to successive electrodes
(0o, 90 o , 180o, 270 o, etc.), which in turn generate the traveling field in which the
particles move. Differing particles are affected differently by various wavelength signals,
and as such, it is desirable to generate signals over a wide frequency range).
DDS, by virtue of its extremely wide output frequency span, phase offset
capability and precise synchronization, is an ideal vehicle to generate the synchronized
signals from 1 kHz to 50 MHz typically used in this technique. One major difference
between a PLL and a DDS is the PLL’s ability to lock its output to the input phase of a
reference clock. A standard PLL can easily lock its VCO to a 10 MHz input signal and
provided a phase locked 20 MHz output signal. The DDS can get extremely close to the
20 MHz output frequencies but requires an internal clock speed that is at least twice that
of the output frequency.
CHAPTER 4
PULSE COMPRESSION
4.1. Introduction
Range resolution is the ability to detect two targets in space that are close to each
other. If the transmitted pulse is wide enough to simultaneously dwell on both targets, the
returned signal will appear to the radar as single target. The key to solving this problem is
the realization that the range resolution of a radar does not necessarily depend on the
duration of the transmitted pulse; in fact, it depends on the bandwidth of the pulse. For a
simple rectangular pulse, the bandwidth is just 1/T, where T is the pulse duration.
However, by manipulating the amplitude and/or phase within the pulse, its bandwidth can
be altered without changing its duration. In other words, the radar resolution can be
changed independently of the average transmitted power. This manipulation of the
transmitted pulse is known as pulse coding, or in some cases, pulse modulation.
Long pulse Figure 4.11: Range resolution Short pulse
The echo received from two targets which are close to each other is shown in
Graph(3).The pulse compressed output is shown in Graph (4) ,in which two peaks are
recognized. Thus we infer that there are two targets in space close to each other.
The main disadvantage of pulse compression is the appearance of range side lobes
around the main signal peak, which have the effect of spreading out echoes from
surrounding range gates, and introducing range ambiguities. This effect can be minimized
by the use of complementary codes, which are carefully chosen pairs of codes whose
range side lobes cancel out under ideal conditions.
4.2 Concept of operation
The reference signal is a LFM waveform that has the same LFM slope as the
transmitted LFM signal. It exists over the duration of the radar “receive-window”, which
is computed from the difference between the radar maximum and minimum range.
There are three main digital pulse compression techniques namely frequency codes,
binary phase codes, and poly-phase codes. The pulse compression is based on the
autocorrelation function since in the absence of noise; the output of the matched filter is
proportional to the code autocorrelation. Given the autocorrelation function of a certain
code, the main lobe width (compressed pulse width) and the side lobe levels are the two
factors that need to be considered in order to evaluate the code’s pulse compression
characteristics.
0 1 2 3 4 5 6 7 8 9
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In this case, the rows are indexed from I= 1,2…N and the columns sub pulses and the
columns are used to denote the frequency. A “dot” indicates the frequency value
assigned to the associated sub pulse.
For a matrix of size N*N, there are a total of N! possible ways of assigning the
“dots”.The sequence of “dots” assignment for which the corresponding ambiguity
function approaches an ideal or a “thumback” response are called Costas codes. A near
thumback response was obtained by Costas using the following logic: only one frequency
per time slot (row) and per frequency slot (column). Therefore for an N*N matrix the
number of possible Costas codes is drastically less than N!.
Three-dimensional plots for the ambiguity function of Costas signals show the near
thumback response of the ambiguity function. All side lobes, except for few around the
origin, have amplitude 1/N. Few side lobes close to the origin have amplitude 2/N, which
is typical of Costas codes. The compression ratio of a Costas code is approximately N.
In this case, a relatively long pulse of width τ` is divided into N smaller pulses,
each is of width ∆τ = τ`/N. Then, the phase of each sub-pulse is randomly chosen as
either 0 or π radians relative to some CW reference signal. It is customary to characterize
a sub-pulse that has 0 phase (amplitude of +1volt) as either ”1” or “+”. Alternatively, a
sub-pulse with phase equal to π (amplitude of -1volt) is characterized by either “0” of “-”.
The compression ratio associated with binary phase code is equal to ξ = τ`/∆τ, and the
peak value is N times larger than that of the long pulse. The goodness of a compressed
binary phase code waveform depends heavily on the random sequence of the phase for
the individual sub-pulse.
One family of binary phase codes that produce compressed waveforms with constant
side lobe levels equal to unity is the Barker code. A barker code of length n is denoted as
Bn. There are only seven known Barker Codes that share this unique property. Since
there are only seven Barker Codes, they are not used when radar security is an issue.
+ + + - - + +
The most side lobe reduction offered by a Barker code is –22.3dB, which may not be
sufficient for the desired radar application. However, Barker codes can be combined to
generate much longer codes. In this case, a Bm code can be used within a Bn code (m
within n) to generate a code of length mn. The compression ratio for the combined Bmn
code is equal to mn.
The main drawback is that such codes are only known for limited values of M, and
finding additional codes with the minimum peak side lobe for any given length involves
an exhaustive search with a size growing exponentially with M.
Codes that use any harmonically related phases based on a certain fundamental phase
increment are called poly-phase codes. This coding technique is demonstrated using
Frank codes. In this case, a single pulse of width τ` is divided into N equal groups; each
group is subsequently divided into other N sub-pulses each of width ∆τ. Therefore, the
total number of sub-pulses within each pulse is N2, and the compression ratio is
ξ = N2 (4.20)
As before, the phase within each sub-pulse is held constant with respect to some CW
reference signal.
A frank code of N2 sub-pulses is referred to as an N-phase Frank code. The first step
in computing a frank code is to divide 360° by N, and define the result as the
fundamental phase increment ∆ϕ. More precisely,
∆ϕ = 360°/N (4.21)
Note that the size of the fundamental phase increment decreases as the number of
groups is increased, and because of phase stability, this may degrade the performance of
very long Frank codes. For example, a 4-phase frank code has N=4; and the fundamental
phase increment is ∆ϕ which is equal to 360°/4 = 90°.
The phase increments within each row represent a stepwise approximation of an up-
chirp LFM waveform. The phase increments for subsequent rows increase linearly
versus time. Thus, the corresponding LFM chirp slopes also increase linearly for
subsequent rows.
The main drawback is that the phase increments of the Frank code are higher in the
central part of the code and lower close to the code ends. Thus, band limiting results in
amplitude intensifying the ends of the code relative to the code center and thus yields a
decrease in main lobe width and higher side lobes.
The power of the pulse compression concept comes from the waveforms used.
We concentrate on a popular pulse compression waveform called the linear frequency
modulated (or chirp) pulse. The modulation within each pulse (in this case frequency
modulation) is the critical element of the pulse compression waveform. The modulation
provides the basis and power of the compression concept.
↑___ Convolution
↑___ Multiplication
Rcells
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CHAPTER 5
DOPPLER FILTERING
5.1 Introduction
There are two basic reasons for sensing Doppler frequencies. One is to separate,
resolve returns received simultaneously from different objects. The other is to determine
range rates. Sensing Doppler frequencies and detecting differences between them is done
with a bank of Doppler filters. One of the keys to understanding their operation is a good
understanding of the Doppler effect.
C = Speed of light.
A radar can detect the echoes from many different sources simultaneously, and in the
process sort them out on the basis of differences in Doppler frequency. This is done by
applying the received signal to a bank of filters commonly referred to as Doppler filters.
To minimize the signal to noise ratio occurring when adjacent filters straddle a
targets frequency, the center frequencies of the filters are spaced so the pass bands
overlap. Thus if a targets Doppler frequency gradually increases, an output is produced,
first, primarily from one filter, next more or less equally from that filter and the next filter
up the line, then primarily from that second filter and so on.
A narrow band filter achieves its selectivity by integrating the signals applied to it
over a period of time. The width of the band of frequencies passed by the filter depends
primarily upon the length of the integration time; tint .the relationship between the
bandwidth and the tint is learned from the spectrum of a sinusoidal signal of duration τ
(single pulse), which has a sin x/x shape. Each point on this plot corresponds to the
output the signal would produce from a narrow band filter that integrates the signal
throughout its entire duration. The number of pulses that must be integrated to achieve a
given bandwidth is equal to tint times the PRF. Hence the 3-db bandwidth of a filter
equals the PRF divided by the number of pulses integrated.
If the PRF is greater than the spread between the maximum positive and negative
Doppler frequencies for all significant targets, or if the radar is not pulsed, enough filters
must be included in the bank to bracket the anticipated Doppler frequencies. For example
if the PRF were 180 kilohertz, the maximum anticipated positive Doppler frequency 100
kilohertz, and the maximum anticipated negative Doppler frequency –30 kilohertz, then
the passband of the filter bank would have to be at least 100 + 30 = 130 kilohertz wide to
pass the return from all targets.
On the other hand, if the PRF is less than the anticipated spread in Doppler
frequencies, the passband of the bank should be made no greater than the PRF. The
reason is that the spectral lines of the pulsed signal occur at intervals equal to the PRF,
and it is desirable that any one target appears at only one point in filter banks passband.
Depending on the targets Doppler frequency, the spectral line falling within the
passband in this case may not be the target’s central one (carrier frequency). It may be
one of the lines (side band frequencies) above or below it. Since the lines are
harmonically related, which one it is doesn’t matter. The important point is that for each
target one and only one line falls within the passband. This requirement is satisfied when
the width of the passband equals fr.the Doppler filters making up the bank may be either
analog or digital.
Figure 5.18: Passband of the filter bank.
For analog filtering, the radar return is translated to a relatively low intermediate
radio frequency. Each filter typically uses one or more quartz crystals. Its response to an
incoming signal is analogous to that of a pendulum’s response to a succession of
impulses. For digital filtering, the IF output of the receiver is translated to video
frequencies by applying it to a pair of synchronous detectors, along with a reference
signal whose frequency corresponds to that of the transmitter.
The outputs of the detectors represent the inphase (I) and quadrature (Q)
components of the return. Quadrature components are needed to preserve the sense of the
Doppler frequencies.
The FFT is an algorithm, which vastly reduces the amount of processing necessary to
form a bank of digital filters than DFT. Its efficiency is achieved primarily by choosing
the parameters of the bank so that they are harmonically related and consolidating the
formation of the filters in to a single multiple step process. By making the number of
filters, N, equal to a power of two and the number of samples summed equal to N, further
processing is accomplished in log 2 N steps. The basic processing instruction for
performing the individual partial summation consisting of a phase rotation, a complex
addition and a complex subtraction is called the FFT butterfly. The Doppler filtering is
implemented in Xilinx using 16 point FFT. The output is shown in waveform (9).
CHAPTER 6
SYSTEM REQUIREMENTS
6.1.1 Hardware
6.1.2 Software
6.2 MATLAB
MATLAB is an interactive system whose basic data element is an array that does
not require dimensioning. This allows you to solve many technical computing problems,
especially those with matrix and vector formulations, in a fraction of the time it would
take to write a program in a scalar non-interactive language such as C or Fortran.
MATLAB provides a full programming language that enables us to write a series of
MATLAB statements into a file and then execute them with a single command. In this
project, the chirp signal generation, generation of low pass filter coefficients, pulse
compression and Doppler filtering is done using MATLAB. The output graphs are shown
in the result.
6.3 XILINX
The EDA Tool used for implementing this project is XILINX. As the size and
complexity of digital systems increases, more and more computer aided design tools are
being introduced into the hardware design process. The early paper and pencil design
methods have given way to sophisticated design entry, verification and automatic
hardware generation tools such as XILINX, Altera. In the design process much of the
work of transforming a design from one form to another is tedious and repetitive. Design
automation tools can help the designer with design entry, hardware generation, and
verification and design management. And Modelsim XE was used for the simulation,
Modeling and Testing.
Initially the basic components such as counters, D Flip-flops, ROM, multipliers,
shift registers are designed using VHDL. Then the Phase accumulator block of DDS is
built using the modulus-n counter, the sine/cosine lookup table is implemented using the
ROM. The implementation of DDS is done using VHDL in XILINX software.
The FIR filter is designed using VHDL in XILINX and is loaded with the
Lowpass filter coefficients generated using MATLAB, which obtains the characteristics
of a Lowpass filter. Thus the filter now acts as a Lowpass FIR filter. The multiplier
block, decimator block of DAPD is also implemented in XILINX and simulated and
tested using Modelsim XE.
The Pulse compression and Doppler filtering modules are also implemented in
XILINX and simulated and tested using Modelsim XE. The implementation of pulse
compression is done using 256-point FFT core and the test bench is written for the core to
work. The Doppler filtering is designed using the16-point FFT core and the test bench is
written for the same to work and simulated and tested using modelsim XE. The output
waveforms are shown in the result.
CHAPTER 7
SYSTEM TESTING
The DDS, DAPD, Pulse Compression and Doppler Filtering are tested in real time
using the Virtex-II FPGA kit. The testing is done by programming the flash PROM
available on the development kit with the design bit file generated by the EDA tool.
The Virtex-II Platform FPGA solution is the result of the largest silicon and software
R&D effort in the history of programmable logic, with the goal of revolutionizing the
design of complex single-chip sub-systems in terms of engineering productivity, silicon
efficiency, and system flexibility
The Virtex-II Platform FPGA family is a complete programmable solution that allows
digital system designers to rapidly implement a single-chip solution with density up to 10
million system gates, in weeks rather than months or years. The inherent flexibility of
Xilinx FPGA devices allows unlimited design changes throughout the development and
production phases of the system, with important benefits in improved productivity,
reduced design risk, and higher system flexibility. This further accelerates the industry
from custom ASICs to FPGAs in fields such as optical networking systems; gigabit
routers, wireless cellular base stations, modem arrays, and professional video broadcast
systems.The Virtex-II solution combines the most flexible FPGA architecture, advanced
process technology, powerful software synthesis technology, and robust IP library, to
provide the most complete system integration solution today. It incorporates all required
power supplies, various configuration mode pin interfaces, user IOs on separate
connectors. It also includes detachable features like digital inputs, outputs on LEDs,
matrix keyboard, 7 segment displays, Alpha-numeric LCD Display, RS232 interface,
making Virtex-II the ideal solution for tomorrow’s high-performance system designs.
8. RESULTS
Graph 1 : LFM Chirp signal
Graph 2: Filter output
Graph 3: Signal return from two targets
Graph 6: Doppler Filter Output: Two target with different range and velocity
Waveform 1: Direct Digital Synthesis (DDS) waveform
CONCLUSION
“Just as all things come to an end, so does this project, but the journey towards the
destination has all through, been an invaluable learning experience”. The primary
objective was to develop a FPGA based signal processor for multifunction RADAR. The
Design and Analysis of this project was done using various steps. First the VHDL code
was synthesized using the XILINX software. Next it is simulated using the Modelsim
XE.The real time testing was done using the Virtex-II FPGA kit.
Initially the Chirp signal was generated using MATLAB and the inphase (I) and
quadrature phase (Q) components were generated using DAPD or Digital I/Q
Demodulation. The required frequency to generate these components was generated
using the Direct Digital Synthesis (DDS).The implementation of DAPD and DDS was
done in XILINX and tested in Virtex-II FPGA kit.
The Pulse Compression, which is done to discriminate two targets that are closer
in range and Doppler Filtering, which is used to extract the target information, such as
range, velocity was implemented in XILINX and simulated using Modelsim XE.The
performance was tested using the Virtex-II FPGA kit.
CHAPTER 10
FUTURE ENHANCEMENTS
“The scope of betterment knows no bounds, and is based on the developer’s ability to
think in an innovative way”. In this project two signal processor functions, pulse
compression and Doppler filtering is implemented. The present work can be implemented
in the following areas
This is to normalize the Doppler filter output, which will avoid the signal processor
saturation.
This algorithm is to maintain the false alarm rate. Cell Averaging CFAR or Greatest
of CFAR etc can be used to maintain the false alarm rate. These algorithms are also used
to avoid clutter (which is the unwanted targets).
This is to avoid the jamming. Jamming is misguiding the radar by sending more
power through the side lobe. Here if signal processor finds any detection in side lobe the
detection will be rejected. We can put a null in that direction through side lobe
cancellation technique.
All the FPGA based signal processing algorithms can be used in STAP. STAP is a
technique used to avoid jamming and by using this technique we can customize the beam.
The beam can be put at any point, as we require.
REFERENCES