Data Del Sensor PDF
Data Del Sensor PDF
DS1621
Digital Thermometer and Thermostat
DESCRIPTION
The DS1621 digital thermometer and thermostat pro- User defined temperature settings are stored in non–
vides 9–bit temperature readings which indicate the volatile memory, so parts may be programmed prior to
temperature of the device. The thermal alarm output, insertion in a system. Temperature settings, and tem-
TOUT, is active when the temperature of the device perature readings are all communicated to/from the
exceeds a user–defined temperature TH. The output DS1621 over a simple 2–wire serial interface.
remains active until the temperature drops below user
defined temperature TL, allowing for any hysteresis
necessary.
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DS1621
A0
A1
A2 LOW TEMP TRIGGER, TL
SLOPE ACCUMULATOR
PRESET COMPARE
SET/CLEAR
LOW TEMPERATURE PRESET LSB
COUNTER
COEFFICIENT OSCILLATOR
INC
=0
TEMPERATURE REGISTER
STOP
=0
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DS1621
Since data is transmitted over the 2–wire bus MSB first, Thermostat Control
temperature data may be written to/read from the In its operating mode, the DS1621 functions as a ther-
DS1621 as either a single byte (with temperature reso- mostat with programmable hysteresis, as shown in Fig-
lution of 1°C), or as two bytes, the second byte contain- ure 3. The thermostat output updates as soon as a tem-
ing the value of the least significant (0.5°C)bit of the tem- perature conversion is complete.
perature reading, as shown in Table 1. Note that the
remaining 7 bits of this byte are set to all 0’s. When the DS1621’s temperature meets or exceeds the
value stored in the high temperature trip register (TH),
Note that temperature is represented in the DS1621 in the output becomes active, and will stay active until the
terms of a 1/2°C LSB, yielding the following 9–bit format: temperature falls below the temperature stored in the
low temperature trigger register (TL). In this way, any
MSB LSB amount of hysteresis may be obtained.
1 1 1 0 0 1 1 1 0 0 0 0 0 0 0 0
The active state for the output is programmable by the
user, so that an active state may either be a logic 1 (VDD)
T = –25°C
or a logic 0 (0V).
(COUNT_PER_C – COUNT_REMAIN)
TEMPERATURE = TEMP_READ – 0.25
COUNT_PER_C
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DS1621
OPERATION AND CONTROL where only one reading is needed at certain times, and
The DS1621 must have temperature settings resident in to conserve power, the one–shot mode may be used.
the TH and TL registers for thermostatic operation. A Note that the thermostat output (TOUT) will remain in the
configuration/status register is also used to determine state it was in after the last valid temperature conversion
the method of operation that the DS1621 will use in a cycle when operating in one–shot mode.
particular application, as well as indicating the status of
the temperature conversion operation.
2–WIRE SERIAL DATA BUS
The configuration register is defined as follows: The DS1621 supports a bi–directional two–wire bus and
data transmission protocol. A device that sends data
CONFIGURATION/STATUS REGISTER onto the bus is defined as a transmitter, and a device
receiving data as a receiver. The device that controls the
DONE THF TLF NVB 1 0 POL 1SHOT
message is called a “master”. The devices that are con-
trolled by the master are “slaves”. The bus must be con-
where
trolled by a master device which generates the serial
clock (SCL), controls the bus access, and generates the
DONE = Conversion Done bit. “1” = Conversion com-
START an d STOP conditions. The DS1621 operates as
plete, “0” = conversion in progress.
a slave on the two–wire bus. Connections to the bus are
THF = Temperature High Flag. This bit will be set to made via the open–drain I/O lines SDA and SCL.
“1” when the temperature is greater than or
equal to the value of TH. It will remain “1” until The following bus protocol has been defined (See Fig-
reset by writing 0 into this location or remov- ure 4):
ing power from the device. This feature pro-
vides a method of determining if if the • Data transfer may be initiated only when the bus is not
DS1621 has ever been subjected to temper- busy.
atures above TH while power has been
• During data transfer, the data line must remain stable
applied. whenever the clock line is HIGH. Changes in the data
TLF = Temperature Low Flag. This bit will be set to line while the clock line is high will be interpreted as
“1” when the temperature is less than or equal control signals.
to the value of TL. It will remain “1” until reset
by writing 0 into this location or removing Accordingly, the following bus conditions have been
power from the device. This feature provides defined:
a method of determining if if the DS1621 has
Bus not busy: Both data and clock lines remain HIGH.
ever been subjected to temperatures below
TL while power has been applied.
Start data transfer: A change in the state of the data
NVB = Nonvolatile memory busy flag. “1” = Write to line, from HIGH to LOW, while the clock is HIGH, defines
an E2 memory cell in progress, “0” = nonvola- a START condition.
tile memory is not busy. A copy to E2 may
take up to 10 ms. Stop data transfer: A change in the state of the data
POL = Output Polarity Bit. “1” = active high, “0” = line, from LOW to HIGH, while the clock line is HIGH,
active low. This bit is nonvolatile. defines the STOP condition.
1SHOT= One Shot Mode. If 1SHOT is “1”, the DS1621
Data valid: The state of the data line represents valid
will perform one temperature conversion
data when, after a START condition, the data line is
upon reception of the Start Convert T proto-
stable for the duration of the HIGH period of the clock
col. If 1SHOT is “0”, the DS1621 will continu-
signal. The data on the line must be changed during the
ously perform temperature conversions. This
LOW period of the clock signal. There is one clock pulse
bit is nonvolatile.
per bit of data.
For typical thermostat operation, the DS1621 will oper-
ate in continuous mode. However, for applications
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DS1621
Each data transfer is initiated with a START condition erate an extra clock pulse which is associated with this
and terminated with a STOP condition The number of acknowledge bit.
data bytes transferred between START and STOP
conditions is not limited, and is determined by the mas- A device that acknowledges must pull down the SDA
ter device. The information is transferred byte–wise and line during the acknowledge clock pulse in such a way
each receiver acknowledges with a ninth–bit. that the SDA line is stable LOW during the HIGH period
of the acknowledge related clock pulse. Of course,
Within the bus specifications a regular mode (100 KHz setup and hold times must be taken into account. A
clock rate) and a fast mode (400 KHz clock rate) are master must signal an end of data to the slave by not
defined. The DS1621 works in both modes. generating an acknowledge bit on the last byte that has
been clocked out of the slave. In this case, the slave
Acknowledge: Each receiving device, when must leave the data line HIGH to enable the master to
addressed, is obliged to generate an acknowledge after generate the STOP condition.
the reception of each byte. The master device must gen-
SDA
MSB
SLAVE
ADDRESS R/W
DIRECTION ACKNOWLEDGEMENT
BIT SIGNAL FROM
RECEIVER
ACKNOWLEDGEMENT
SIGNAL FROM
RECEIVER
SCL 1 2 6 7 8 9 1 2 3–8 8 9
ACK ACK
START STOP CONDITION
CONDITION REPEATED IF OR REPEATED
MORE BYTES ARE START CONDITION
TRANSFERRED
Figure 4 details how data transfer is accomplished on 2. Data transfer from a slave transmitter to a mas-
the two–wire bus. Depending upon the state of the R/W ter receiver. The first byte (the slave address) is
bit, two types of data transfer are possible: transmitted by the master. The slave then returns an
acknowledge bit. Next follows a number of data
1. Data transfer from a master transmitter to a bytes transmitted by the slave to the master. The
slave receiver. The first byte transmitted by the master returns an acknowledge bit after all received
master is the slave address. Next follows a number bytes other than the last byte. At the end of the last
of data bytes. The slave returns an acknowledge bit received byte, a ‘not acknowledge’ is returned.
after each received byte.
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DS1621
The master device generates all of the serial clock SLAVE ADDRESS
pulses and the START and STOP conditions. A A control byte is the first byte received following the
transfer is ended with a STOP condition or with a START condition from the master device. The control
repeated START condition. Since a repeated byte consists of a four bit control code; for the DS1621,
START condition is also the beginning of the next this is set as 1001 binary for read and write operations.
serial transfer, the bus will not be released. The next three bits of the control byte are the device
select bits (A2, A1, A0). They are used by the master
The DS1621 may operate in the following two modes: device to select which of eight devices are to be
accessed. These bits are in effect the three least signifi-
1. Slave receiver mode: Serial data and clock are cant bits of the slave address. The last bit of the control
received through SDA and SCL. After each byte is byte (R/W) defines the operation to be performed. When
received, an acknowledge bit is transmitted. START set to a one a read operation is selected, and when set to
and STOP conditions are recognized as the begin- a zero a write operation is selected. Following the
ning and end of a serial transfer. Address recogni- START condition, the DS1621 monitors the SDA bus
tion is performed by hardware after reception of the checking the device type identifier being transmitted.
slave address and direction bit. Upon receiving the 1001 code and appropriate device
2. Slave transmitter mode: The first byte is received select bits, the slave device outputs an acknowledge
and handled as in the slave receiver mode. How- signal on the SDA line.
ever, in this mode, the direction bit will indicate that
the transfer direction is reversed. Serial data is
transmitted on SDA by the DS1621 while the serial
clock is input on SCL. START and STOP conditions
are recognized as the beginning and end of a serial
transfer.
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SEND A “STANDALONE” COMMAND (START/STOP CONVERT)
DS1621
SCL
A C7 C6 C5 C4 C3 C2 C1 C0 A
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S 1 0 0 1 A2 A1 A0 W P
SDA
SCL
S 1 0 0 1 A2 A1 A0 W A C7 C6 C5 C4 C3 C2 C1 C0 A D7 D6 D5 D4 D3 D2 D1 D0 A P
SDA
START ADDRESS BYTE DS1621 COMMAND BYTE DS1621 DATA BYTE DS1621 STOP
ACK ACK ACK
SCL
S 1 0 0 1 A2 A1 A0 W A C7 C6 C5 C4 C3 C2 C1 C0 A D7 D6 D5 D4 D3 D2 D1 D0 A D7 D6 D5 D4 D3 D2 D1 D0 A P
SDA
START ADDRESS BYTE DS1621 COMMAND BYTE DS1621 MSBYTE DS1621 LSBYTE DS1621 STOP
ACK ACK ACK ACK
READ FROM A SINGLE–BYTE REGISTER (CONFIGURATION, SLOPE, COUNTER)
SCL
S 1 0 0 1 A2 A1 A0 W A C7 C6 C5 C4 C3 C2 C1 C0 A R 1 0 0 1 A2 A1 A0 Rd A D7 D6 D5 D4 D3 D2 D1 D0 N P
2–WIRE SERIAL COMMUNICATION WITH DS1621 Figure 5
SDA
START ADDRESS BYTE DS1621 COMMAND BYTE DS1621 REPEATED ADDRESS DS1621 DATA BYTE MASTERSTOP
ACK ACK START BYTE ACK NACK
SCL
S 1 0 0 1 A2 A1 A0 W A C7 C6 C5 C4 C3 C2 C1 C0 A R 1 0 0 1 A2 A1 A0 Rd A D7 D6 D5 D4 D3 D2 D1 D0 A
SDA
START ADDRESS BYTE DS1621 COMMAND BYTE DS1621 REPEATED ADDRESS DS1621 MSBYTE MASTER
ACK ACK START BYTE ACK ACK
SCL
D7 D6 D5 D4 D3 D2 D1 D0 N P
SDA
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DS1621
NOTES:
1. In continuous conversion mode, a Stop Convert T command will halt continuous conversion. To restart, the Start
Convert T command must be issued. In one–shot mode, a Start Convert T command must be issued for every
temperature reading desired.
2. Writing to the E2 typically requires 10ms at room temperature. After issuing a write command, no further writes
should be requested for at least 10 ms.
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DS1621
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DS1621
* This is a stress rating only and functional operation of the device at these or any other conditions above those
indicated in the operation sections of this specification is not implied. Exposure to absolute maximum rating
conditions for extended periods of time may affect reliability.
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DS1621
NOTES:
1. All voltages are referenced to ground.
2. I/O pins of fast mode devices must not obstruct the SDA and SCL lines if VDD is switched off.
4. ICC specified with VCC at 5.0V and SDA, SCL = 5.0V, 0°C to 70°C.
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DS1621
6. A device must internally provide a hold time of at least 300 ns for the SDA signal (referred to the VIH MIN of the
SCL signal) in order to bridge the undefined region of the falling edge of SCL.
7. The maximum tHD:DAT has only to be met if the device does not stretch the LOW period (tLOW) of the SCL signal.
8. A fast mode device can be used in a standard mode system, but the requirement tSU:DAT >250 ns must then be
met. This will automatically be the case if the device does not stretch the LOW period of the SCL signal. If such
a device does stretch the LOW period of the SCL signal, it must output the next data bit to the SDA line tR
MAX+tSU:DAT = 1000+250 = 1250 ns before the SCL line is released.
10. Writing to the nonvolatile memory should only take place in the 0°C to 70°C temperature range.
11. See typical curve for specification limits outside 0°C to 70°C range. Thermometer error reflects sensor accuracy
as tested during calibration.
TIMING DIAGRAM
SDA
tBUF
tLOW
tR tF tHD:STA tSP
SCL
tHD:STA
tSU:STO
tSU:STA
tHD:DAT tHIGH tSU:DAT
STOP START REPEATED
START
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DS1621
2
ERROR (deg. C)
1
UPPER LIMIT
SPECIFICATION
–2
–3
TEMPERATURE (deg. C)
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