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Memory Interfacing

This document describes using a 74LS138 3-to-8 line decoder chip to decode address lines for accessing memory. It shows the chip's input and output pins and how different input combinations activate different output lines, allowing 8 memory locations to be selected from 3 address lines. The chip is used to read and decode address lines for interfacing with memory.

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Manish Kumar Naik
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40 views

Memory Interfacing

This document describes using a 74LS138 3-to-8 line decoder chip to decode address lines for accessing memory. It shows the chip's input and output pins and how different input combinations activate different output lines, allowing 8 memory locations to be selected from 3 address lines. The chip is used to read and decode address lines for interfacing with memory.

Uploaded by

Manish Kumar Naik
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
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8085 Memory Interface

NAND or Decoder

3
74LS138 3-to-8 Line Decoder
Inputs Outputs

E1 E2 E3 C B A 0 1 2 3 4 5 6 7
1 x x x x x 1 1 1 1 1 1 1 1
x 1 x x x x 1 1 1 1 1 1 1 1
x x 0 x x x 1 1 1 1 1 1 1 1
0 0 1 0 0 0 0 1 1 1 1 1 1 1
0 0 1 0 0 1 1 0 1 1 1 1 1 1
0 0 1 0 1 0 1 1 0 1 1 1 1 1
0 0 1 0 1 1 1 1 1 0 1 1 1 1
0 0 1 1 0 0 1 1 1 1 0 1 1 1
0 0 1 1 0 1 1 1 1 1 1 0 1 1
0 0 1 1 1 0 1 1 1 1 1 1 0 1
0 0 1 1 1 1 1 1 1 1 1 1 1 0

4
Memory interface

5
Reading and decoding address lines

Address Range?
6

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