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Parallel Subtractor

A parallel subtractor is a digital circuit that can subtract binary numbers greater than one bit in length by operating on corresponding bit pairs simultaneously. It performs subtraction by adding the minuend to the 2's complement of the subtrahend. The 2's complement is obtained by inverting the bits of the subtrahend and adding 1 to the least significant bit pair. A parallel subtractor can be implemented using a combination of half and full subtractors, all full subtractors, or all full adders with the subtrahend input in its complement form.

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Parineeti Khan
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25 views

Parallel Subtractor

A parallel subtractor is a digital circuit that can subtract binary numbers greater than one bit in length by operating on corresponding bit pairs simultaneously. It performs subtraction by adding the minuend to the 2's complement of the subtrahend. The 2's complement is obtained by inverting the bits of the subtrahend and adding 1 to the least significant bit pair. A parallel subtractor can be implemented using a combination of half and full subtractors, all full subtractors, or all full adders with the subtrahend input in its complement form.

Uploaded by

Parineeti Khan
Copyright
© © All Rights Reserved
Available Formats
Download as DOCX, PDF, TXT or read online on Scribd
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Parallel Subtractor –

A Parallel Subtractor is a digital circuit capable of finding the arithmetic difference of two binary
numbers that is greater than one bit in length by operating on corresponding pairs of bits in
parallel. The parallel subtractor can be designed in several ways including combination of half
and full subtractors, all full subtractors or all full adders with subtrahend complement input.

this circuit performs the subtraction operation by considering the principle that the addition of
minuend and the complement of the subtrahend is equivalent to the subtraction process.

We know that the subtraction of A by B is obtained by taking 2’s complement of B and adding it
to A. The 2’s complement of B is obtained by taking 1’s complement and adding 1 to the least
significant pair of bits.

Hence, in this circuit 1’s complement of B is obtained with the inverters (NOT gate) and a 1 can
be added to the sum through the inputThe operations of both addition and subtraction can be
performed by a one common binary adder. Such binary circuit can be designed by adding an Ex-
OR gate with each full adder as shown in below figure. The figure below shows the 4 bit parallel
binary adder/subtractor which has two 4 bit inputs as A3A2A1A0 and B3B2B1B0.

The mode input control line M is connected with carry input of the least significant bit of the
full adder. This control line decides the type of operation, whether addition or subtraction.

When M= 1, the circuit is a subtractor and when M=0, the circuit becomes adder. The Ex-OR
gate consists of two inputs to which one is connected to the B and other to input M. When M =
0, B Ex-OR of 0 produce B. Then full adders add the B with A with carry input zero and hence an
addition operation is performed.
When M = 1, B Ex-OR of 0 produce B complement and also carry input is 1. Hence the
complemented B inputs are added to A and 1 is added through the input carry, nothing but a
2’s complement operation. Therefore, the subtraction operation is performed.

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