Scribd
Upload
353 views

Experiment 5: NAND and NOR Implementation: The NAND Gate Are Shown Below in Figure

This document describes an experiment on implementing Boolean functions using NAND and NOR gates. It provides objectives, required components, theory on NAND and NOR gate operations, and a two-step procedure for two-level NAND and NOR implementations. The lab practice section directs students to implement example Boolean functions F1 and F2 using NAND and NOR gates respectively, and verify the implementations using truth tables. Finally, students are given a logic diagram and directed to determine the Boolean function F and its truth table.

Uploaded by

Tayyab
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
353 views

Experiment 5: NAND and NOR Implementation: The NAND Gate Are Shown Below in Figure

This document describes an experiment on implementing Boolean functions using NAND and NOR gates. It provides objectives, required components, theory on NAND and NOR gate operations, and a two-step procedure for two-level NAND and NOR implementations. The lab practice section directs students to implement example Boolean functions F1 and F2 using NAND and NOR gates respectively, and verify the implementations using truth tables. Finally, students are given a logic diagram and directed to determine the Boolean function F and its truth table.

Uploaded by

Tayyab
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
You are on page 1/ 5

Module: Logic Design Lab

Name: ...................................
University no:………………………..
Group no: …………………………….
Lab Partner Name: Mr. Mohamed El-Saied
Experiment 5: NAND and NOR Implementation

Objective:
 Discuss how NAND gates can be used to perform the AND, OR and NOT logic operations.
 Discuss how NOR gates can be used to perform the AND, OR and NOT logic operations.
 How to implement a Boolean function and verifying its logic using only NAND/NOR logic gates.
Components Required:
 Mini Digital Logic Trainer.
 IC Type 7400 Quadruple 2-input NAND gates.
 IC Type 7402 Quadruple 2-input OR gates.
 IC Type 7404 Hex Inverters
 Switches for inputs and
 LED displays for outputs.
Theory:
Digital circuits are constructed with NAND and NOR gates rather than with AND and OR gates. NAND and
NOR gates are easier to fabricate with electronic components. They are most widely used in all IC digital
families. So any Boolean function can be implemented with NAND/NOR gates alone. Thus these gates are
called “universal” gates.
a. NAND Implementation:
The logic operations AND, OR and NOT can be obtained with NAND gates as shown in figure (1).

Figure (1) Logic operations with NAND gates


There are two equivalent graphic symbols for the NAND gate are shown below in figure (2)

Figure (2) two graphic symbols for the NAND gate

1
Two-level NAND Implementation procedure:
To obtain the equivalent NAND logic diagram for a Boolean function do the following:
1. Simplify and write the function in sum of products form (if not).
2. Draw the logic diagram.
3. Change AND gates with NAND gates.
4. Adjust the NOT gates with OR gates to form inverted-OR gates. Add a NOT gate if there is a single
literals.
5. Change the invert-OR to NAND gate.

b. NOR Implementation:
The logic operations AND, OR and NOT can be obtained with NOR gates as shown in figure (3).

Figure (3) Logic operations with NOR gates


There are two equivalent graphic symbols for the NOR gate are shown below in figure (4)

Figure (4) two graphic symbols for the NOR gate

Two-level NOR Implementation procedure:


To obtain the equivalent NOR logic diagram for a Boolean function do the following:
1. Simplify and write the function in product of sums form (if not).
2. Draw the logic diagram.
3. Change OR gates to NOR gates.
4. Adjust the NOT gates with AND gates to form inverted-AND gates. Add a NOT gate if there is a single
literals.
5. Change the invert-AND to NOR gate.

2
Part A: Lab Practice
1. Given the Boolean function: F1(x,y,z) = Σ (1, 2, 3, 4, 5, 7)
Procedure:
- Implement the Boolean function F1 with NAND gates.
- Obtain the truth table for F1 from the original circuit.
- Use datasheets of (NAND and NOT) IC’s to assign pin numbers to all inputs and all outputs of the gates.
- Use IC’s and breadboard to connect the NAND implementation for F1with the x, y and z inputs to three
switches (push button) and output F1 to an indicator lamp (LED).
- Wire the ICs to ground 0V and power supply +5 V. Turn on the power of trainer.
- Test the equivalent circuit for all input patterns and record the corresponding outputs in the truth table.
Results:
Step 1 Step 2

Step 3 Step 4

Step 5 Express F1 with NAND gates:

Inputs Output (F1) from


A B C Original circuit NAND circuit
0 0 0
0 0 1
0 1 0
0 1 1
1 0 0
1 0 1
1 1 0
1 1 1
Conclusion:
Since the outputs from original and NAND implementations are matched. Hence, the NAND gate
implementation behaves like the original circuit of the Boolean function.

3
2. Given the Boolean function: F2(x,y,z) = xy+x z
Procedure:
- Implement the Boolean function F2 with NOR gates.
- Obtain the truth table for F2 from the original circuit.
- Use datasheets of (NOR and NOT) IC’s to assign pin numbers to all inputs and all outputs of the gates.
- Use IC’s and breadboard to connect the NOR implementation for F2with the x, y and z inputs to three
switches (push button) and output F2 to an indicator lamp (LED).
- Wire the ICs to ground 0V and power supply +5 V. Turn on the power of trainer.
- Test the equivalent circuit for all input patterns and record the corresponding outputs in the truth table.
Results:
Step 1 Step 2

Step 3 Step 4

Step 5 Express F2 with NOR gates:

Inputs Outputs from


A B C Original circuit NOR circuit
0 0 0
0 0 1
0 1 0
0 1 1
1 0 0
1 0 1
1 1 0
1 1 1
Conclusion:
Since the outputs from original and NOR implementations are matched. Hence, the NOR gate
implementation behaves like the original circuit of the Boolean function.

4
Module: Logic Design Lab
Name: ...................................
University no:………………………..
Group no: …………………………….
Lab Partner Name: Mr. Mohamed El-Saied

Part B: Lab. Exercise:


Students are directed to do the following exercise.

Given the following logic diagram:

a. Obtain the Boolean function F of the circuit.

b. Obtain the truth table of the Boolean function.


Inputs (F)
A B C
0 0 0
0 0 1
0 1 0
0 1 1
1 0 0
1 0 1
1 1 0
1 1 1

You might also like