Scribd
Upload
1K views5 pages

Antenna Effect in VLSI Design Solutions

The document discusses the antenna effect, which is plasma-induced gate oxide damage during MOS IC manufacturing that can cause yield and reliability issues. The antenna effect occurs when floating conductive layers like polysilicon and metal collect charges from plasma during etching, which can permanently damage transistors if discharged randomly. Methods to reduce the antenna effect include adding metal jumpers, dummy transistors, and embedding reverse-biased protection diodes to drain charges harmlessly.

Uploaded by

studius1
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
1K views5 pages

Antenna Effect in VLSI Design Solutions

The document discusses the antenna effect, which is plasma-induced gate oxide damage during MOS IC manufacturing that can cause yield and reliability issues. The antenna effect occurs when floating conductive layers like polysilicon and metal collect charges from plasma during etching, which can permanently damage transistors if discharged randomly. Methods to reduce the antenna effect include adding metal jumpers, dummy transistors, and embedding reverse-biased protection diodes to drain charges harmlessly.

Uploaded by

studius1
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
  • Introduction to Antenna Effect
  • Antenna Ratio and Antenna Effect Example
  • Methods to Reduce Antenna Effect
  • Comparison of Antenna Effect Solutions

MSPDCoE-Antenna Effect

By
Nirmal Kumar G B

Sankalp Semiconductor Confidential


Antenna Effect
Antenna Effect
It is an plasma induced gate-oxide damage that can potentially cause yield and reliability problems during
manufacture of MOS integrated circuits.
 Antenna effect occurs during manufacturing process

 Antennae are floating conduction layers without shielding layer of oxide -effects poly and metal layers

 The random discharge of the floating node could permanently damage the transistor

 Modern wafer processing uses Plasma Etch or Dry Etch.

 Several unwanted things happen just because of Plasma Etching and one of them is Charging Damage

 Plasma charging damage refers to the unintended high-field stressing of the gate-oxide in MOS during plasma
processing.
 Both electrons and positive ions from plasma are impinging on the exposed conductor during processing.

 Depending on charge balance condition, the electron flux might


not equal to ion flux and hence a net positive or negative charge
collection rate exists.
 If the length of conductor is so long, the collected net charges are
channeled to the gate where it is neutralized by current tunneling
across gate oxide and this phenomenon is called Antenna Effect.

Contact Us
mspdcoe@san Question of the week
[Link] What is plasma? List some advantages and disadvantages of plasma etching.

Sankalp Semiconductor Confidential 1


Antenna Ratio and Antenna Effect Example
Classical Definition of Antenna Ratio (AR)
Antenna Ratio is defined as ratio of total area and/or perimeter of conducting layer attached to gate to gate area

Example for Antenna Effect

In the above example, charges are accumulated on poly gate since M1 left floating until M2 is fabricated and there is chance
Contact Us of gate-oxide breakdown if M1 routing length is sufficiently long. A long floating interconnect can act as a temporary
capacitor collecting charges from plasma Etching.
mspdcoe@san
Question of the week
[Link]
List few measures to reduce Antenna Effect.

Sankalp Semiconductor Confidential 2


Methods to Reduce Antenna Effect
Metal Jumpers
 Break signal wires and route to upper metal layers by jumper insertion

 All metal being etched is not connected to a gate until the last metal layer is etched
Fig 1: Metal Jumpers

Dummy transistors
 Addition of extra gates will reduce the capacitance ratio Fig2: Diode Insertion
 PFETs more susceptible than NFETs
Embedded Protection Diode
 Connect reverse biased diodes to the gate of transistor

 During normal circuit operation, the diode does not affect functionality
Diode Insertion after placement and route
 Connected of diodes only to those layers with antenna violations
Contact Us
 One diode can be used to protect all input ports that are connected to the same output ports
mspdcoe@san
Question of the week
[Link]
Which type of diode is used to prevent antenna effect?. Why?

Sankalp Semiconductor Confidential 3


Comparison of Antenna Effect solutions
Comparison of Proposed solutions

Summary
 PID can have little-no dependence on AR

 Ratio of gate capacitance to the antenna capacitance is a more important PID determinant

 PFETs can be more susceptible to PID than NFETs


Contact Us  Dynamic diode insertion after placement and route is best technique to reduce antenna effect
mspdcoe@san  Modern CAD tools do not incorporate true measure of antenna effect
[Link]

Sankalp Semiconductor Confidential 4

You might also like