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Cs2202 ANNA UNIV Question Paper 1

This document is a question paper for a third semester exam in Computer Science and Engineering. It contains 15 multiple choice and numerical answer questions assessing students' knowledge of digital principles and systems design topics. Questions cover Boolean logic, logic gates, binary arithmetic, encoders, decoders, flip-flops, counters, parity checkers and sequential/combinational circuits. Students are instructed to answer all questions in the paper over its three hour duration for a maximum score of 100 marks.

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2K views3 pages

Cs2202 ANNA UNIV Question Paper 1

This document is a question paper for a third semester exam in Computer Science and Engineering. It contains 15 multiple choice and numerical answer questions assessing students' knowledge of digital principles and systems design topics. Questions cover Boolean logic, logic gates, binary arithmetic, encoders, decoders, flip-flops, counters, parity checkers and sequential/combinational circuits. Students are instructed to answer all questions in the paper over its three hour duration for a maximum score of 100 marks.

Uploaded by

kunaraj
Copyright
© Attribution Non-Commercial (BY-NC)
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
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Reg. No.

Question Paper Code : T3027

B.E./B.Tech. DEGREE EXAMINATION, NOVEMBER/DECEMBER 2009

Third Semester

Computer Science and Engineering

CS 2202 — DIGITAL PRINCIPLES AND SYSTEMS DESIGN

(Common to Information Technology)

(Regulation 2008)

Time : Three hours Maximum : 100 Marks

Answer ALL Questions

PART A — (10 × 2 = 20 Marks)

1. Draw the logic diagram for the Boolean expression ((A + B) C )′D using
NAND gates.

2. Perform subtraction using 1’s complement (11010)2 – (10000)2.

3. Perform 9’s and 10’s compliment subtraction between 18 and –24.

4. Draw the logic diagram for half adder.

5. What is the difference between decoder and demultiplexer?

6. What is programmable logic array? How does it differ from ROM?

7. Write down the difference between sequential and combinational circuits.

8. What is race around condition?

9. What is meant by lockout condition?

10. What are the steps for design of asynchronous sequential circuit?
PART B — (5 × 16 = 80 Marks)

11. (a) Simplify the following Boolean expression using Quine McCluskey
method :

F = ∑ m ( 0, 9, 15, 24, 29, 30) + d ( 8, 11, 31) . (16)

Or

(b) (i) Implement Boolean expression for EXOR gate using NAND and
NOR gates. (8)

(ii) Prove that ( AB + C + D )(C ′ + D )(C ′ + D + E ) = ABC + D . (4)

(iii) Using 2’s complement perform (42)10 – (68)10. (4)

12. (a) (i) Explain the gray code to binary converter with the necessary
diagram. (10)

(ii) Design a half subtractor circuit. (6)

Or

(b) With neat diagram explain BCD subtractor using 9’s and 10’s
complement method. (16)

13. (a) Explain with necessary diagram a BCD to 7 segment display decoder.
(16)

Or

(b) (i) Write the comparison between PROM, PLA, PAL. (6)

(ii) Design a BCD to excess-3 code converter and implement using


PLA. (10)

14. (a) Design and implement a Mod-5 synchronous counter using JK flip-flop.
Draw the timing diagram also. (16)

Or

(b) (i) Explain the working of master slave JK flip-flop. (10)

(ii) Draw the diagram for a 3 bit ripple counter. (6)

2 T 3027
15. (a) (i) Design a comparator. (6)

(ii) Design a non sequential ripple counter which will go through the
states 3, 4, 5, 7, 8, 9, 10, 3, 4 .................. draw bush diagram also.
(10)

Or
(b) (i) Design a parity checker. (6)
(ii) Design a sequential circuit with JK flip-flop. (10)

0|1

————––––——

3 T 3027

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