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Lecture 11

1. A clamper is a circuit composed of a diode, resistor, and capacitor that shifts a waveform to a different DC level without changing the appearance of the input signal. 2. The circuit works by charging the capacitor through the diode to a voltage determined by the surrounding network when the diode is on, and having the capacitor hold this voltage when the diode turns off. 3. Analyzing a clamper circuit involves examining how the input signal biases the diode, assuming the capacitor charges instantly, and that it maintains the established voltage level. Maintaining awareness of the diode polarity and defined V0 level is important.

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sayed Tamir jan
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28 views

Lecture 11

1. A clamper is a circuit composed of a diode, resistor, and capacitor that shifts a waveform to a different DC level without changing the appearance of the input signal. 2. The circuit works by charging the capacitor through the diode to a voltage determined by the surrounding network when the diode is on, and having the capacitor hold this voltage when the diode turns off. 3. Analyzing a clamper circuit involves examining how the input signal biases the diode, assuming the capacitor charges instantly, and that it maintains the established voltage level. Maintaining awareness of the diode polarity and defined V0 level is important.

Uploaded by

sayed Tamir jan
Copyright
© © All Rights Reserved
Available Formats
Download as PDF, TXT or read online on Scribd
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CLAMPERS

97

A clamper is a network constructed of diode, a resistor and a capacitor


th t shifts
that hift a waveform
f t a different
to diff t dc
d level
l l without
ith t changing
h i the th
appearance of the applied signal.
CLAMPERS
98

Step 1: start the analysis by examining the response of the portion


of the input
p signal
g that will bias the diode.
Step2: During the period that the diode is in the “on” state, assume
that the capacitor will charge up instantaneously to a voltage level
determined by the surrounding network.
network
Step3: Assuming that during the period when the diode is in the
“off”
state the
h capacitor
i holds
h ld on to its
i established
bli h d voltage
l l l
level.
Step4: Throughout the analysis maintain a continual awareness of
the location and defined ppolarityy for V0 to ensure that the pproper
p
levels are obtained.
Step5: Check that the total swing of the output matches that of the
input.
input
CLAMPERS
99

Diode “on” and the capacitor charging to V volts.


CLAMPERS
100

Sketching vo for the network


Example 2.22
101

Determine the V0 for the network.

Applied signal and network


Example 2.22
102
Example 2.23:Repeat Example 2.22 using a practical Si diode 103
Clamping Networks 104
Clamping Networks 105

Clamping network with a sinusoidal input.


Home Work
106

Text Book:

End Problems: 37 to 41

Reference Book (Sedra/Smith)

Exercises: 3.23
End Problems: 3.92 to 3.105

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