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Comm 523: Cad: VHDL Lab - Modelsim Introduction

This document provides instructions for installing and using ModelSim software to simulate VHDL designs. It outlines downloading and installing ModelSim, creating a new project, adding VHDL files to the project, compiling the design, and simulating the design. The key steps are creating a project, adding VHDL files, compiling for errors, and simulating to view input/output waveforms and test the design.

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58 views

Comm 523: Cad: VHDL Lab - Modelsim Introduction

This document provides instructions for installing and using ModelSim software to simulate VHDL designs. It outlines downloading and installing ModelSim, creating a new project, adding VHDL files to the project, compiling the design, and simulating the design. The key steps are creating a project, adding VHDL files, compiling for errors, and simulating to view input/output waveforms and test the design.

Uploaded by

bittibssi
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
You are on page 1/ 11

10/12/2016

COMM 523: CAD


VHDL Lab ModelSim Introduction

Ahmed Hamza
Integrated Circuits Laboratory
Ain Shams University
Cairo, Egypt

Outline
Installing ModelSim
Creating a New Project
Adding VHDL Files to the Project
Compiling the Design
Simulating the Design

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I NSTALLING M ODELS IM

Installing ModelSim
Download ModelSim Student edition:
http://www.mentor.com/company/higher_ed/mo
delsim-student-edition
Follow the installation Steps

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C REATING A N EW P ROJECT

Creating a New Project


To create a new project: File New Project.
Enter the name & location of the project in the
dialog box.

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A DDING VHDL F ILES


TO THE P ROJECT

Adding VHDL Files to the Project (1)


Choose: Create New File.
Enter the name of the file (ex: inv.vhd) & select
the type of the file (VHDL) in the dialog box.

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Adding VHDL Files to the Project (1)


You will notice a new file added to the project.
Add your code to the file

Double Click on the created file to edit

Note: If the above window didnt appear, click on View then


Project
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Adding VHDL Files to the Project (2)


From File New Source VHDL
An untitled file will appear allowing you to write &
save your code.

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Adding VHDL Files to the Project (3)


You may also add an existing file to your project.
In the project window, right click Add to Project
Existing File. Then Browse to your file.

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C OMPILING THE D ESIGN

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Compiling the Design


To compile the Design: right click on the file
Compile Compile Selected

Then, the Transcript Window shows successful


compilation/errors
Double click on the error to view it.

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S IMULATING THE D ESIGN

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Simulating The Design


After successful Compilation, we will simulate our
design.
From Simulate Start Simulation
A new Window appears, choose your file under
Work.

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Simulating The Design


The following Window appears, showing the
inputs & outputs of your design

Note: If the above window didnt appear, click on


View then Objects & Wave.
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Simulating The Design


In the Objects Window, select the inputs &
outputs right Click add Wave

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Simulating The Design


In the Wave Window, right click on the input
Force & enter its value

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Simulating The Design


Then, click on the Run symbol

You should see the waveform in the wave Window

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Simulating The Design


You may also apply a clock to your input with a
specific period, duty cycle,

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T HANKS

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