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Test 1

The document contains two questions regarding analog electronics circuits. Question 1 involves calculating the DC voltages and voltage gains of a two-stage amplifier. Question 2 involves calculating the input high cutoff frequency of a common-emitter amplifier.

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Mustafidzul Mustapha
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159 views3 pages

Test 1

The document contains two questions regarding analog electronics circuits. Question 1 involves calculating the DC voltages and voltage gains of a two-stage amplifier. Question 2 involves calculating the input high cutoff frequency of a common-emitter amplifier.

Uploaded by

Mustafidzul Mustapha
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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Download as DOCX, PDF, TXT or read online on Scribd
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CONFIDENTIAL EE/APR 2017/ELE426

FACULTY OF ELECTRICAL ENGINEERING


UNIVERSITI TEKNOLOGI MARA
TEST 1

COURSE : ANALOG ELECTRONICS II


COURSE CODE : ELE426
TEST : APRIL 2017
TIME : 1 HOUR 30 MINUTES

INSTRUCTIONS TO CANDIDATES

1. This question paper consists of TWO (2) questions.

2. Do not bring any material into the test room.

3. Answer All Questions in English

FILL IN THE FOLLOWING PARTICULARS

NAME : _________________________________________________

UiTM ID : _________________________________________________

GROUP : _________________________________________________

LECTURER : ZULKIFLI ABD. MAJID

PROGRAMME CODE EE241/AS251


COURSE CODE ELE426
COGNITIVE
QUESTION CO PO MARKS
LEVEL
1 2 CO1 PO2 15
2 3 CO2 PO2 15
TOTAL 30

DO NOT TURN THIS PAGE UNTIL YOU ARE TOLD TO DO SO


This test paper consists of 2 printed pages excluding front page

Hak Cipta Universiti Teknologi MARA CONFIDENTIAL


CONFIDENTIAL EE/APR 2017/ELE426

QUESTION 1

Fig. Q1 shows a direct coupled two-stage amplifier. If VT=25mV and 1 = 2 = 125,


determine (i) d.c. voltages for both stages (ii) voltage gain of each stage and overall voltage
gain.

Figure Q1
Solution:

(i) D.C. voltages:


First stage:
2 22
D.C. voltage across R2, 2 = = 12 = 2.16 (This is the d.c.
1 +2 100 + 22
voltage at the base VB of transistor Q1.)
D.C. voltage at the emitter, 1 = 2 1 = 2.16 0.7 = 1.46
1.46
D.C. emitter current, 1 = 1 = 4.7 = 0.31
4
D.C. collector current, 1 = 1 = 0.31
D.C. voltage at collector,
1 = 1 3 = 12 (0.31 22) = 5.18

Second stage:
D.C. base voltage, 2 = 1 = 5.18
D.C. emitter voltage, 2 = 1 2 = 5.18 0.7 = 4.48
4.48
D.C. emitter current, 2 = 2 = 10 = 0.448
6
D.C. voltage at collector,
2 = 2 5 = 12 (0.448 10) = 7.52

(ii) Voltages Gain:


First stage:
25 25
a.c. emitter resistance, 1 = = 0.31 = 80.6, 2 = = 0.448 = 55.8
1 2

Input impedance of the second stage, 2 = 2 2 = 125 55.8 = 7k
Total a.c. collector load, = 3 2 = 22 7 = 5.31
5.31
, 1 = = = 66
1 80.6
Second stage:
a.c. collector load, = 5 = 10k
5 10
, 2 = = = 179
2 55.8

, = 1 2 = 66 179 = 11,814

Hak Cipta Universiti Teknologi MARA CONFIDENTIAL


CONFIDENTIAL EE/APR 2017/ELE426

QUESTION 2

Calculate the input high cutoff frequency for the common-emitter amplifier presented in
Figure Q2. This amplifier has only a portion of the emitter resistance bypassed, to provide
greater flexibility to the designer. Assume that a 2N2857 transistor is used, so that = 100,
= 10 , = 116 , = 0.94 pF, = 0.89 pF, = 0.3, and = 0.75.

State any assumption used.

Figure Q2

Solution:

We first solve for the DC bias point of the amplifier and find, that:
1.9 , 1.2 , 2.8 , and 2.4 .

Using these values, we calculate the small-signal parameters:



= 10.8 , = = = 1.1 , = = 92 /,

= = 12.6 , and = = 0.7 .

( )
Midband gain, +
= 8.9
Input impedance, = [ + ( + 1) ] = 1.6

Input attenuation factor, = + = 0.89


Overall voltage gain,
= = 7.9

Miller input capacitance, = (1 ) = 6.2


This capacitor shows up from the base of the transistor to ground and is not in parallel
with , because of the unbypassed emitter resistance. Assuming for the moment that
we can ignore , we forge ahead with the calculation.

The resistance seen by CMin,

= +
= [ + ( + 1) ] = 187
1
= 2 = 137 .

Hak Cipta Universiti Teknologi MARA CONFIDENTIAL

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