Robert Reay 13. A New Graduate’s Guide to the It wasn’t that long ago that armed with a couple of engineering degrees and a snappy new suit, I walked headlong into disaster: my first technical interview. The interview was with a well-known Silicon Valley integrated circuit manufacturer, and I had no idea what was in store for me. After flailing through six one-hour grueling technical sessions and my first power lunch, I remember stumbling to my car while visions of pn junc- tions, amplifiers, TTL gates, and flaming airplanes in a deadly tailspin swam though my brain. What went wrong? I didn’t go into the interview unprepared. I attended the “how to inter- view” classes held by the career placement center. The center’s staff had helped me create a resumé with plenty of style and power adjectives. I was forced to watch the videotape of my practice interview in hopes that my awkward hand gestures and use of the deadly “you know” and “uh” might improve. My girlfriend (now my wife) had picked out the tie. I had five years of engineering classes and lab experience, and had spent the last two learning about analog IC design. I had torn apart my Apple I computer, designed and built my own stereo amplifier, and knew where the power-on button of a Tektronix 547 oscilloscope was located. ‘What went wrong? The people in the career planning office had taught me about the generic interview, my professors had taught me about ana- log circuit design, but it was up to me to learn how to combine the two. It took a couple of days of “on the interview training,” before I finally got the hang of it, and the interviews became easier. Now that I am sitting on the other side of the interviewing table, I find that most students still find themselves in the position I was in 10 years ago. The first interview is tough, and the last is easy. So here are some tips that [ hope will make your first interview as good as your last, All it takes is a little preparation, knowing what to expect during the interview, and being able to solve a handful of basic analog circuit problems. Preparation Be prepared to answer this question intelligently: what do you want to o? It is surprising how many students fumble for answers when asked this question. I have actually heard students say “uh, graduate” and “get a Analog Interview 219‘ANew Graduate’s Guide to the Analog Interview job.” Wrong. A well-thought-out answer with a dash of enthusiasm will go a long way towards getting an offer letter. As an interviewer, I would like to hear something like, “I want to join your company so I can sit at the feet of the gurus of analog integrated circuit design,” but since this has yet to happen, I would settle for someone who says he has a keen interest in analog design and is willing to work hard. All good interviewers will ask you to describe something that you have done before, so learn one circuit or system very well. It could be from a senior project, classwork, a final exam, or simply a late-night home-brew circuit hack. Have your classmates or an advisor pepper you with ques- tions about the circuit. “What is the bandwidth? How did you compensate this node? What is the function of this transistor?" I like to ask the fol- lowing question during an interview: draw me the schematic of any am- plifier that you have designed and tell me about it.I then see how far the student can go in describing the circuit. The idea is to put the student at ease by having him describe a circuit that he is familiar with, while T find out how well he really understands the circuit. If you describe a design or research project on your resumé, you better know it backward and forward. I occasionally interview a student whose resumé claims he has worked on a very challenging project, but he is unable to answer even the most basic technical questions about it. Adding a flashy project to your resumé may get you noticed, but if you are not prepared to discuss the project's technical details in depth, itis the quick- est route to a rejection letter. If you don’t thoroughly understand some- 2, leave it off the resumé. Before you go to the interview, find out what the company does. Find a data book or other literature that describes the company’s products. By becoming familiar with the product line, you will be able to anticipate what technical questions you will get, and be able to ask some inspired questions. For example, when a classmate of mine was about to interview at a satellite communications company, he spent an entire day in the Stanford library reading all of the IEEE journal articles that the com- pany’s famous chief scientist had written, During the interview, my class- mate was asked how he would design a certain system, so he said, “Well, at first glance I would probably do it like this... ,” then went on to de- scribe everything he had read in the chief scientist's articles. Of course my classmate came out of the interview looking like a genius and got the offer. Know ahead of time what salary you want. Go to the career placement center and get a salary survey of students in your field with the same de~ gree. It is best to know what you are worth so you can negotiate the salary you want in the beginning. Once you start working it is too late. Prepare a set of questions that you will ask the interviewer. What is the worst and best part of his job? How does he like the company? What is the most difficult circuit he has designed? Design some questions so you get a feel for what itis like to work at that company, and whether or not, you will be able to work with these people 8+ hours a day.Robert Reay Finally, keep in mind that most managers think that enthusiasm, will- ingness to work hard, good communication skills, and amiable demeanor are much more important than the ability to solve a handful of tricky cir- cuit problems. So when you interview, relax. Try to convey your love for analog design, your willingness to work hard, and try to stay cool. And please, remember not to call the interviewer “dude.” (That actually hap- pened more than once.) The Interview Most companies go through a three-step interview process. The first step is a quick on-campus interview to make sure that you are really in the electrical engineering program, you can speak in complete sentences, and you can answer some basic circuit questions. If you don’t look like a complete bum, show an interest in analog design, and can recite Ohm’s Law from memory, you can usually make it past this interview. ‘The second interview is over the phone with the hiring manager. He wants to make sure that is worth the time and effort to bring you into the plant for the final interview. The phone interview usually consists of ask- ing what classes you took, asking you to describe the project listed on the resumé, then a series of simple circuit questions. ‘The third and most important interview is at the factory. The hiring manager will generally warm you up with a cup of coffee, a plant tour, and a description of the work the group is doing. Then all hell breaks loose. You will have several one-hour technical interviews with different engineers, a lunch interview where the technical staff tries to determine your compatibility with the group while you bravely try to describe pn junction theory and chew at the same time, followed by an afternoon of more technical interviews. If you have an advanced degree, you will usu- ally be required to give a lecture to the technical staff as well ‘The term “technical interview” doesn’t tell the whole story; “technical grilling” is more appropriate. After the usual introductions and discussion of your career goals, etc, the grilling will begin. If the interviewer is 200d, he will have you describe the circuit or system listed on your re- sumé, which you will ace because you came prepared. Then the inter- viewer will pull out his favorite technical questions. These are usually designed to test your basic knowledge of circuit design, and more impor- tantly, they allow the interviewer to evaluate your approach to solving problems that you have not seen before. ‘Some interviewers will have you solve the problems on paper, others ona marker board on the wall, but in either case, you will be required to think on your feet. Remember that the interviewer is looking at your ap- proach to solving the problem and doesn’t always expect you to solve it completely. When trying to solve a new problem, resist the temptation to start writing equations right away. Stop and think about what is really 221‘ANew Graduate’s Guide to the Analog Interview happening in the circuit. Try to reason out the function of different sec- tions of the circuit and decide what parts you do and don’t understand. Try to describe out loud what you are thinking, For instance, “If this node g0es up, then that node goes down, so the circuit is using negative feed- back.” Once you understand how the circuit works, and you have a plan of attack, then you can pull out the equations. Remember that it is always much better to say that you don’t under- stand something than to guess. You'll never get hired if a manager thinks you are trying to b.s. your way through a problem. Rather, tell the inter- viewer what you do know, and what you don’t understand. Tell him what you will need to know in order to solve the problem. Try to jot down some notes about each question that you are asked. If ‘you weren't able to solve it completely, try to finish it at home. You will ibe surprised at how many times the same circuit problem comes up at different interviews. When I was interviewing, I heard some questions so many times that I had to force myself to prevent the answer from sound- ing like a tape recording. (#1 question: What are the components of the threshold voltage for a MOS transistor?) Make sure that you get a list of the people that interviewed you and a business card from each one. It is always a good idea to write all the in- terviewers thank you notes a couple of days after the interview, as it pro- vides an easy way of reminding them of who you are and that you really want a job. Even if you don’t get a job offer, they may provide valuable contacts in the future Sample Interview Questions Interview questions come in all shapes and forms. I had to complete a 10- page exam for one interview. The first problem was trivial and each one got progressively harder, with the last one being mind-numbing. The in- terviewer used the exam to keep track of how well each university was preparing its students, and as a reference to remember each student. (Results: #1 UC Berkeley) Some companies, like Hewlett-Packard, like to ask tough questions that are not related to your field of expertise just to watch you sweat. I had this question while interviewing for a circuit de- sign job: “You have a beaker of water with diameter x, water depth y, and ‘you stir the water at a constant rotational velocity. How high does the water move up the sides of the beaker? I'll give you any equation you need to know.” But you'll find that most questions are simple and keep appearing over and over. Here is a sample of common interview questions that I have accumulated over the years from my friends in the analog business (yes, the answers are in the back):Robert Reay QL. If you put a 0-t0-5-voltstep voltage referenced to ground into the circuits shown in Figures 13-1A and 13-1B, sketch the wave forms you would expect to see at the outputs. tke i mY alo a ce Figure 13-1. o— A vo —t Vo ‘hee B Q2. As the base emitter voltage of the bipolar transistor QI in Figure 13-2 is increased from OY, sketch the voltage at the output node. =v Figure 13-2. 1k vo Vin a Q3. ‘Two loudspeakers with a passive input filter are shown in Figures 133A and 13-3B. Which one is the woofer, and which one is the tweeter? Figure 13-3. — —___I__| 223‘A New Graduate’s Guide to the Analog Interview Q4._ In Figure 13-4, the diode and transistor are a matched pair. If the forward voltage of the diode is 0.7V, what is the approximate collector current in the transistor Q1? Iw Figure 13-4. 11.3k 1k Ql DI QS. A constant-current lo is fed into the diode connected-transistor QI shown in Figure 13-5. What happens to the output voltage Vo as temperature is increased? i Figure 13-5, lo Vo Ql Q6. The ideal op amps of Figures 13-6A and 13-6B are connected with feedback resistors R1 and R2. What is the closed-loop DC gain of each configuration? Re ; Figure 13-6, Mal Vo Vo 224Robert Reay Q7. Assume that the op amps of Figures 13-6A and 13-6B have finite gain A,. Now what is the closed-loop DC gain’? Q8. The capacitor of Figure 13-7 is connected with two ideal MOS switches. Switches Tl and 2 are alternately turned on with a frequency f. What is the average current flowing from node 1 to node 2? What is the equivalent impedance from node I to node 2? TI 12 vl rh, py v2 Figure 13-7. + Q9. The regulator of Figure 13-8 has an input voltage of 8V, a bias resistor R1 of 1002, and 10mA flowing through the 6V zener diode. Calculate the value of beta of the NPN transistor QI if the load current is 100mA. QUO. Assume that the diode DI of Figure 13-9 is ideal, Sketch the wave form of Vo. D1 na A 120sin ot 10k Vo y Figure 13-9, 10:1 Tums Ratio‘ANew Graduate’s Guide to the Analog Interview QUI. The bipolar transistor of Figure 13-10 is biased so the voltage across R, is 260mV. A small AC signal is applied to the input node. Qualitatively describe what the voltage at the output looks like. Calculate the AC gain. Vec Figure 13-10. ¥ RI 260m =°Vout Vin al R2 QI2. A two-pole amplifier is found to have an open-loop DC gain of 100dB, a gain-bandwidth product of 1OMHz, and 45° of phase margin. Sketch the Bode plot for the open-loop amplifier, show- ing the gain, phase, and location of the poles. Q13. The Darlington pair of NPN transistors QI and Q2 in Figure 13-11 each have a current gain of 8. What is the approximate total current gain of the pair? Vee Figure 13-11. RUS hy low a a2 R3 QU4. The drain current of the JFET shown in Figure 13-12 is 2.5mA. when Vgs is set to -2.5V, and 2.7mA when Vgs is -2.4V. Caleu- late the pinch-off voltage and the drain-source saturation current.us. Q16. Qu7. Quis. Qu. Q20. Robert Reay Vec 12. Yio Figure 18 Vos A.CMOS amplifier consisting of PMOS device QI and NMOS device Q2 is shown in Figure 13-13. Assuming that they both have the same gate oxide thickness, what is the approximate gain of the amplifier? Veco Figure 13-13, Ql wa-9 Vo vin EE a2 w= 12 ‘You are probing a square wave pulse in the lab that has a rise time of Sns and a fall time of 2ns. What is the minimum band- Width of the oscilloscope needed to view the signal? ‘What is the thermal rms noise voltage of a 1k resistor at 300K? A transistor dissipates 25 W in an ambient temperature of 25°C. Given that the thermal resistance of the transistor is 3°C/W and the maximum junction temperature is 150°C, what is the thermal resistance of the heat sink required? Draw the equivalent circuit of an exclusive-nor gate using only inverters, nand, and nor gates. (Hey, even analog guys need to know some digital stuff.) ‘You are offered the following jobs; which one do you take? a. Hacking C++ code for Windows b. A windsurf instructor at Club Med in the Canary Islands c. A roadie for the upcoming Rolling Stones tour d An analog design engineer 227‘ANew Graduate's Guide to the Analog Interview 228 Figure 13-14, Figure 13-15. Answers to Sample Interview Questions Qu. Remember that the voltage across a capacitor cannot change instan- taneously, and the time constant is 1/RC, as shown in Figure 13-14. ~6ms ~6mS <4 4 A B Q2. The output voltage has three distinct regions as shown in Figure 13-15: QI off, Ql in the linear region, and QI saturated. Vo off +5V Q3. Qa. Qs. Q6. $< vin -6V Assuming that the filter prevents high frequencies from reaching the woofer, and low frequencies from reaching the tweeter, A is the woofer, and B is the tweeter. The current through the diode = (12 ~ 0.7)/11.3k = ImA. If the diode and QI are a matched pair, then the circuit is a current mirror with the collector current equal to ImA. With a constant collector current, the output voltage will show a slope of ~-2 mV/°C. Figure A has an inverting gain of -R2/R1 and B has a noninvert- ing gain of (1 + RUR2). Figure A has an inverting gain of 1/(1/Ao + RI/Ao ~ RU/R2). Figure B has a noninverting gain of (R2 + RI)/{(R2 + RI/Ao +R2).Qs. Q10. Qu. Qn. a1. Qua. Qis. Robert Reay For every clock cycle, a small amount of charge = C(V1 - V2) is transferred to and from the capacitor. Therefore, the average current is i = q/time or i = Cf,(V1 - V2). The equivalent imped- ance is AVA = /Cf,, ‘The current in the resistor is (8 - 6)/100 = 20mA. If the zener requires 10mA to sustain 6V, then the base current of Ql is, 20mA - 10mA = 10mA. The transistor is then operating with a beta of (le/lb— 1) = (100mA/10mA ~ 1) = 9. With a 10:1 turns ratio, the peak voltage on the secondary side of the transformer is 12V as shown in Figure 13-16. On the positive half cycle, the diode is not conducting so the output voltage is divided in half. On the negative half cycle, the ideal diode con- ducts so that the full voltage appears at V,. Figure 13-16. — ev mo aw — 12v If the input voltage is a small-signal sine wave, then the output voltage is an amplified sine wave of opposite polarity. If the output impedance of QI >> RL, then the gain of the circuit is to first order the g., of QI times the load resistance, Ay =~ ga, * Ry: With g,, = I/V, the gain can be rewritten to Ay =-I, R/V. Recognizing that J, R, = 260mV, the equation becomes Ay = ~260mV/V, oF Ag = -260mV/26mV = -10. The first pole = 100Hz, the second = 10Mhz. as shown in Figure 13-17, Current gain = B (B + 1) Knowing that Ip = loss (1 - V/V, Set up simultaneous equa- tions and solve for Ipss = 9.8mA and V, = -2.45V. The gain = (g,, n-channel/g,, p-channel). Since g,,=2(K'/2* WIL * Id)!* and the mobility of the N-channel is approximately 3 times that of the P-channel and Id is the same for both transis- tors, the gain = (3 * 12)!2/9)!2 = 12.‘ANew Graduate’s Guide to the Analog Interview 230 Figure 13-17. Figure 13-18, A +! LH 0—4] | Qi6. Qu7. us. Qs. Q20. The time that it takes an RC circuit to go from 10% to 90% of its final value is At = In9 * RC. If the bandwidth of the ‘scope BW = YexRC, then the bandwidth BW = In 9/(2x * At) = In9/(2x * 2ns) = 174MHz. Choose a 200MHz or faster ’scope. To reduce errors, choose a ‘scope 3 times faster than the calculated value, or 600MHz. ‘The average noise voltage squared, V? = 4kTR Af, so V~ 4nV/(H2)". ‘The required @ = (150° - 25°)/25 W = 5°/W. Since the package has a thermal resistance of 3°C/W, the heat sink must be a mini- mum of 8 = (5°C/W - 3°C/W) = 2°C/W. ‘The equation for an exclusive-or gate is Y = ab! + ba’. This can be rewritten as Y = ((ab’) (ba’). The logic diagram is shown in pyNUMBER CORRECT 6-10 1-15 16-19 20 Robert Reay RECOMMENDATION Become a bond trader. Buy a copy of Gray and Meyer. Memorize it. Not bad; call up National Semiconductor. You have a future as an analog engineer. Give me a call. I know a great boardsailing spot where we can sail and discuss job opportunities. 231