Chapter Modifed
Chapter Modifed
CHAPTER-1
MOTHERBOARD & ITS COMPONENT SPECIFIC OBJECTIVES
1.1 CPU Concept like address lines, data lines, internal registers.
1.2 Modes of operation of CPU Real mode, IA-32 mode, IA-32 Virtual Real Mode.
1.3 Process Technologies, Dual Independent Bus Architecture, Hyper Threading
Technologies & its requirement.
1.4 Processor socket & slots.
1.5 Chipset basic, chipset Architecture, North / South bridge & Hub Architecture.
1.6 Latest chipset for PC
1.7 Overview & features of PCI, PCI X, PCI express, AGP bus.
1.8 Logical memory organization conventional memory, extended memory, expanded
memory.
1.9 Overview & features of SDRAM, DDR, DDR2, DDR3.
1.10 Concept of Cache memory:
1.11 L1 Cache, L2 Cache, L3 Cache, Cache Hit & Cache Miss.
1.13 BIOS Basics & CMOS Set Up.
1.14 Motherboard Selection Criteria.
Bytes 1,099,511,627,776
KiB 1,073,741,824
MiB 1,048,576
GiB 1024
TiB 1
The data bus and address bus are independent, and chip designers can use whatever
size they want for each. Usually, however, chips with larger data buses have larger
address buses. The sizes of the buses can provide important information about a chips
relative power, measured in two important ways. The size of the data bus indicates the
chips information-moving capability, and the size of the address bus tells you how
much memory the chip can handle.
Data Bus:
As name tells that it is used to transfer data within Microprocessor and
Memory/Input or Output devices. It is bidirectional as Microprocessor requires to send
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Computer Architecture and Maintenance (G-Scheme-2014) 3
or receive data. The data bus also works as address bus when multiplexed with lower
order address bus. Data bus is 8 Bits long. The word length of a processor depends on
data bus, thats why Intel 8085 is called 8 bit Microprocessor because it have an 8 bit
data bus.
To increase the amount of data being sent (called bandwidth) by increasing either
the cycling time or the number of bits being sent at a time, or both. Over the years,
processor data buses have gone from 8 bits wide to 64 bits wide. The more wires you
have, the more individual bits you can send in the same interval. All modern
processors from the original Pentium and Athlon through the latest Core i7, AMD FX
83xx series, and even the Itanium series have a 64-bit (8-byte)-wide data bus. Therefore,
they can transfer 64 bits of data at a time to and from the motherboard chipset or
system memory.
Wider the bus more is the speed ie 64-bit-wide buses. Also in newer processors
is the use of multiple separate buses for different tasks. Traditional processor design
had all the data going through a single bus, whereas newer processors have separate
physical buses for data to and from the chipset, memory, and graphics card slot(s).
Control Bus:
Microprocessor uses control bus to process data, that is what to do with the
selected memory location. Some control signals are Read, Write and Opcode fetch etc.
Various operations are performed by microprocessor with the help of control bus. This
is a dedicated bus, because all timing signals are generated according to control signal.
Functions of Buses
The functions of buses can be summarized as below:
1. Data sharing - All types of buses found on a computer must be able to transfer
data between the computer peripherals connected to it.
The data is transferred in in either serial or parallel, which allows the exchange of
1, 2, 4 or even 8 bytes of data at a time. (A byte is a group of 8 bits). Buses are
classified depending on how many bits they can move at the same time, which
means that we have 8-bit, 16-bit, 32-bit or even 64-bit buses.
2. Addressing - A bus has address lines, which match those of the processor. This
allows data to be sent to or from specific memory locations.
3. Power - A bus supplies power to various peripherals that are connected to it.
Index register
A hardware element which holds a number that can be added to (or, in some cases,
subtracted from) the address portion of a computer instruction to form an effective
address. Also known as base register. An index register in a computer's CPU is a
processor register used for modifying operand addresses during the run of a program.
Protected 64-bit
Submode N/A
Virtual real compatibility
32-bit 64-bit
OS Required 16-bit
32-bit 64-bit
32-bit 64-bit
Software 16-bit
16-bit 32-bit
32-bit 64-bit
Memory Address Size 24-bit
24-bit 32-bit
32-bit 32-bit
Default Operand Size 16-bit
16-bit 32-bit
32/16-bit 64-bit
Register Width 16-bit
16-bit 32-16-bit
Real Mode
Real mode is sometimes called 8086 mode because it is based on the 8086 and
8088 processors. The original IBM PC included an 8088 processor that could execute 16-
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bit instructions using 16-bit internal registers and could address only 1 MB of
memory using 20 address lines. All original PC software was created to work with this
chip and was designed around the 16-bit instruction set and 1 MB memory model. For
example, DOS and all DOS software, Windows 1.x through 3.x, and all Windows 1.x
through 3.x applications are written using 16-bit instructions. These 16-bit OSs and
applications are designed to run on an original 8088 processor.
Later processors such as the 286 could run the same 16-bit instructions as the
original 8088, but much faster. In other words, the 286 was fully compatible with the
original 8088 and could run all 16-bit software just the same as an 8088, but, of course,
that software would run faster. The 16-bit instruction mode of the 8088 and 286
processors has become known as real mode. All software running in real mode must use
only 16-bit instructions and live within the 20-bit (1 MB) memory architecture it
supports. Software of this type is usually single-taskingthat is, only one program can
run at a time. No built-in protection exists to keep one program from overwriting
another program or even the OS in memory. Therefore, if more than one program is
running, one of them could bring the entire system to a crashing halt.
Knowing that new OSs and applicationswhich take advantage of the 32-bit
protected modewould take some time to develop, Intel wisely built a backward-
compatible real mode into the 386. That enabled it to run unmodified 16-bit OSs and
applications. It ran them quite wellmuch more quickly than any previous chip. For
most people, that was enough. They did not necessarily want new 32-bit software; they
just wanted their existing 16-bit software to run more quickly. Unfortunately, that
meant the chip was never running in the 32-bit protected mode, and all the features of
that capability were being ignored.
When a 386 or later processor is running DOS (real mode), it acts like a Turbo
8088, which means the processor has the advantage of speed in running any 16-bit
Note : any program running in a virtual real mode window can access up to only 1MB
of memory, which that program will believe is the first and only megabyte of memory
in the system. In other words, if you run a DOS application in a virtual real window, it
will have a 640 KB limitation on memory usage. That is because there is only 1 MB of
total RAM in a 16-bit environment, and the upper 384KB is reserved for system use.
The virtual real window fully emulates an 8088 environment, so that aside from speed,
the software runs as if it were on an original real modeonly PC. Each virtual machine
gets its own 1 MB address space, an image of the real hardware basic input/output
system (BIOS) routines, and emulation of all other registers and features found in real
mode.
Virtual real mode is used when you use a DOS window to run a DOS or
Windows 3.x 16-bit program. When you start a DOS application, Windows creates a
virtual DOS machine under which it can run.
Note : All Intel and Intel-compatible (such as AMD and VIA/Cyrix) processors power
up in real mode. If you load a 32-bit OS, it automatically switches the processor into 32-
bit mode and takes control from there.
Although 16-bit DOS and standard DOS applications use real mode, special
programs are available that extend DOS and allow access to extended memory (over
1 MB). These are sometimes called DOS extenders and usually are included as part of
any DOS or Windows 3.x software that uses them. The protocol that describes how to
make DOS work in protected mode is called DOS protected mode interface (DPMI).
Windows 3.x used DPMI to access extended memory for use with Windows 3.x
applications. It allowed these programs to use more memory even though they were
still 16-bit programs. DOS extenders are especially popular in DOS games because they
enable them to access much more of the system memory than the standard 1 MB that
most real mode programs can address. These DOS extenders work by switching the
processor in and out of real mode. In the case of those that run under Windows, they
use the DPMI interface built into Windows, enabling them to share a portion of the
systems extended memory.
IE-32e compatibility mode enables 32-bit and 16-bit applications to run under a 64-
bit OS. Unfortunately, legacy 16-bit programs that run in virtual real mode (that is,
DOS programs) are not supported and will not run, which is likely to be the biggest
problem for many users, especially those that rely on legacy business applications or
like to run very old games. Similar to 64-bit mode, compatibility mode is enabled by
the OS on an individual code basis, which means 64-bit applications running in 64-bit
mode can operate simultaneously with 32-bit applications running in compatibility
mode.
What we need to make all this work is a 64-bit OS and, more importantly, 64-bit
drivers for all our hardware to work under that OS. Although Microsoft released a 64-
bit version of Windows XP, few companies released 64-bit XP drivers. It wasnt until
Windows Vista and especially Windows 7 x64 versions were released that 64-bit
drivers became plentiful enough that 64-bit hardware support was considered
mainstream.
Note : Microsoft uses the term x64 to refer to processors that support either AMD64 or
EM64T because AMD and Intels extensions to the standard IA32 architecture are
practically identical and can be supported with a single version of Windows.
Note: Early versions of EM64T-equipped processors from Intel lacked support for the
LAHF and SAHF instructions used in the AMD64 instruction set. However,Pentium 4
and Xeon DP processors using core steppings G1 and higher completely support these
The physical memory limits for Windows XP and later are shown in the table below:
Windows Version Memory Limit
8 Enterprise/Professional 512 GB
8 128 GB
7 Profession/Ultimate/Enterprise 192 GB
XP Professional 128 GB
XP Home 4 GB
The major difference between 32-bit and 64-bit Windows is memory support
specifically, breaking the 4 GB barrier found in 32-bit Windows systems. 32-bit versions
of Windows support up to 4 GB of physical memory, with up to 2 GB of dedicated
memory per process. 64-bit versions of Windows support up to 512 GB of physical
memory, with up to 4 GB for each 32-bit process and up to 8 TB for each 64-bit process.
Support for more memory means applications can preload more data into memory,
which the processor can access much more quickly.
64-bit Windows runs 32-bit Windows applications with no problems, but it does
not run 16-bit Windows, DOS applications, or any other programs that run in virtual
real mode. Drivers are another big problem. 32-bit processes cannot load 64-bit
dynamic link libraries (DLLs), and 64-bit processes cannot load 32-bit DLLs. This
essentially means that, for all the devices you have connected to your system, you need
both 32-bit and 64-bit drivers for them to work. Acquiring 64-bit drivers for older
devices or devices that are no longer supported can be difficult or impossible. Before
installing a 64-bit version of Windows, be sure to check with the vendors of your
internal and add-on hardware for 64-bit drivers.
Although vendors have ramped up their development of 64-bit software and
drivers, you should still keep all the memory size, software, and driver issues in mind
when considering the transition from 32-bit to 64-bit technology. The transition from
Summary
Real Mode
Like 8086/88 processor
Use only 16 bit features
Operates in DOS operation system
Use only 8086 instruction set
Uses 16-bit base and offset registers
Access only 1Mb of physical memory
All IA-32 processor initialize into real mode
Concept of segmentation is used.
Protected Mode
Uses full 32bit feature of the processor
Process 32 bit instruction
Can access upto 4Gb of memory
Uses 32 bit internal registers
Used by windows , Linux , Os2 operating system
Concept paging is used
Process technologies
Fig.
Advantages of DIB
1.Faster cache Access
2.Improves Band Width
3.Bot busses are accessed simultaneously hence through put is improved
4.Allow Multiple simultaneous cache request.
Although the sharing of some processor components means that the overall
speed of an HT-enabled system isnt as high as a processor with as many physical cores
would be, speed increases of 25% or more are possible when multiple applications or
multithreaded applications are being run.
Multicore Technology
Both AMD and Intel introduced the first dual-core x86-compatible desktop
processors in May 2005. AMDs initial entry was the Athlon 64 X2, whereas Intels first
dual-core processors were the Pentium Extreme Edition 840 and the Pentium D. The
Extreme Edition 840 was notable for also supporting HT Technology, allowing it to
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Computer Architecture and Maintenance (G-Scheme-2014) 17
appear as a quad-core processor to the OS. These processors combined 64-bit
instruction capability with dual internal coresessentially two processors in a single
package. These chips were the start of the multicore revolution, which has continued
by adding more cores along with additional extensions to the instruction set. Intel
introduced the first quad-core processors in November 2006, called the Core 2 Extreme
QX and Core 2 Quad. AMD subsequently introduced its first quad-core desktop PC
processor in November 2007, called the Phenom.
Note: There has been some confusion about Windows and multi-core or Hyper-
Threaded processors. Windows XP and later Home editions support only one physical
CPU, whereas Windows Professional, Business, Enterprise, and Ultimate editions
support two physical CPUs. Even though the Home editions support only a single
physical CPU, if that chip is a multicore processor with HT Technology, all the physical
and virtual cores are supported. For example, if you have a system with a quad-core
processor supporting HT Technology, Windows Home editions will see it as eight
processors, and all of them will be supported. If you had a motherboard with two of
these CPUs installed, Windows Home editions would see the eight physical/virtual
cores in the first CPU, whereas Professional, Business, Enterprise, and Ultimate
editions would see all 16 cores in both CPUs.
Multi-core
processors are
designed for users
who run multiple
programs at the
same time or who
use multithreaded
applications,
which pretty
much describes
all users these
days. A
multithreaded
application can
run different parts
of the program,
known as threads, at the same time in the same address space, sharing code and data. A
multithreaded program runs faster on a multicore processor or a processor with HT
Technology enabled than on a single-core or non-HT processor.
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The diagram below illustrates how a single-core processor (left) and a dual-core
processor (right) handle multitasking:
CPU Socket
Common sockets have retention clips that apply a constant force, which must be
overcome when a device is inserted. For chips with a large number of pins, either zero
insertion force (ZIF) sockets or land grid array (LGA) sockets are used instead. These
designs apply a compression force once either a handle (for ZIF type) or a surface plate
(LGA type) is put into place. This provides superior mechanical retention while
avoiding the risk of bending pins when inserting the chip into the socket.
CPU sockets are used in desktop and server computers. As they allow easy
swapping of components, they are also used for prototyping new circuits. Laptops
typically use surface mount CPUs, which need less space than a socketed part.
Function
A CPU socket is made of plastic, a lever or latch, and metal contacts for each of
the pins or lands on the CPU. Many packages are keyed to ensure the proper insertion
of the CPU. CPUs with a PGA (pin grid array) package are inserted into the socket and
the latch is closed. CPUs with an LGA package are inserted into the socket, the latch
plate is flipped into position atop the CPU, and the lever is lowered and locked into
place, pressing the CPU's contacts firmly against the socket's lands and ensuring a good
connection, as well as increased mechanical stability.
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15.html
Processor Slot
A slot is a computer processor connection designed to make upgrading the
processor much easier, where the user would only have to slide a processor into a slot.
A slot is another name for an expansion slot such as a ISA, PCI, AGP slot, or memory
slots.
The other form that processors take is a chip soldered on to a card, which then connects
to a motherboard by a slot similar to an expansion slot. The picture slows a slot for a
Pentium 3 processor.
Intel and AMD have created a set of socket and slot designs for their processors. Each
socket or slot is designed to support a different range of original and upgrade
processors. Table 3.18 shows the designations for the various 486 and newer processor
sockets/slots and lists the chips designed to plug into them.
Sockets 1, 2, 3, and 6 are 486 processor sockets and are shown together in Figure so you
can see the overall size comparisons and pin arrangements between these sockets.
Sockets 4, 5, 7, and 8 are Pentium and Pentium Pro processor sockets and are shown
together in Figure so you can see the overall size comparisons and pin arrangements
between these sockets. More detailed drawings of each socket are included throughout
the remainder of this section with thorough descriptions of the sockets.
When the Socket 1 specification was created, manufacturers realized that if users
were going to upgrade processors, they had to make the process easier. The socket
manufacturers found that 100 lbs. of insertion force is required to install a chip in a
standard 169-pin screw Socket 1 motherboard. With this much force involved, you
easily could damage either the chip or the socket during removal or reinstallation.
Because of this, some motherboard manufacturers began using low insertion force (LIF)
sockets, which required only 60 lbs. of insertion force for a 169-pin chip. With the LIF or
standard socket, I usually advise removing the motherboardthat way you can
support the board from behind when you insert the chip. Pressing down on the
motherboard with 60100 lbs. of force can crack the board if it is not supported
properly. A special tool is also required to remove a chip from one of these sockets. As
you can imagine, even the low insertion force was relative, and a better solution was
needed if the average person was ever going to replace his CPU.
Manufacturers began using ZIF sockets in Socket 1 designs, and all processor
sockets from Socket 2 and higher have been of the ZIF design. ZIF is required for all the
higher-density sockets because the insertion force would simply be too great otherwise.
ZIF sockets almost eliminate the risk involved in installing or removing a processor
because no insertion force is necessary to install the chip and no tool is needed to
extract one. Most ZIF sockets are handle-actuated: You lift the handle, drop the chip
into the socket, and then close the handle. This design makes installing or removing a
processor an easy task.
Socket 1
The original OverDrive socket, now officially called Socket 1, is a 169-pin PGA
socket. Motherboards that have this socket can support any of the 486SX, DX, and DX2
processors and the DX2/OverDrive versions. This type of socket is found on most 486
systems that originally were designed for OverDrive upgrades. Figure shows the
pinout of Socket 1.
Socket 2
When the DX2 processor was released, Intel was already working on the new
Pentium processor. The company wanted to offer a 32-bit, scaled-down version of the
Pentium as an upgrade for systems that originally came with a DX2 processor. Rather
than just increasing the clock rate, Intel created an allnew chip with enhanced
capabilities derived from the Pentium.
The chip, called the Pentium OverDrive processor, plugs into a processor socket with
the Socket 2 or Socket 3 design. These sockets hold any 486 SX, DX, or DX2 processor,
as well as the Pentium OverDrive. Because this chip is essentially a 32-bit version of the
(normally 64-bit) Pentium chip, many have taken to calling it a Pentium-SX. It was
available in 25/63MHz and 33/83MHz versions. The
first number indicates the base motherboard speed; the
second number indicates the actual operating speed of the
Pentium OverDrive chip. As you can see, it is a clock-multiplied
chip that runs at 2.5 times the motherboard speed. Figure
shows the pinout configuration of the official Socket 2 design.
Socket 3
Because of problems with the original Socket 2 specification and the enormous
heat the 5V version of the Pentium OverDrive processor generates, Intel came up with
an improved design. This processor is the same as the previous Pentium OverDrive
processor, except that it runs on 3.3V and draws a maximum 3.0 amps of 3.3V (9.9
watts) and 0.2 amp of 5V (1 watt) to run the fana total of 10.9 watts. This
configuration provides a slight margin over the 5V version of this processor. The fan is
easy to remove from the OverDrive processor for replacement, should it ever fail.
Intel had to create a new socket to support both the DX4 processor, which runs on 3.3V,
and the 3.3V Pentium OverDrive processor. In addition to the 3.3V chips, this new
socket supports the older 5V SX, DX, DX2, and even the 5V
Pentium OverDrive chip. The design, called Socket 3, is the
most flexible upgradeable 486 design. Figure shows the
pinout specification of Socket 3.
Notice that Socket 3 has one additional pin and several others plugged in compared
with Socket 2. Socket 3 provides for better keying, which prevents an end user from
accidentally installing the processor in an improper orientation. However, one serious
problem exists: This socket can't automatically determine the type of voltage that is
provided to it. You will likely find a jumper on the motherboard near the socket to
enable selecting 5V or 3.3V operation.
Caution
Because this jumper must be manually set, a user could install a 3.3V processor in this
socket when it is configured for 5V operation. This installation instantly destroys the
chip when the system is powered on. So, it is up to the end user to ensure that this
socket is properly configured for voltage, depending on which type of processor is
installed. If the jumper is set in 3.3V configuration and a 5V processor is installed, no
harm will occur, but the system will not operate properly unless the jumper is reset for
5V.
Socket 4
Socket 4 is a 273-pin socket designed for the original Pentium processors. The original
Pentium 60MHz and 66MHz version processors had 273 pins and plugged into Socket
4. It is a 5V-only socket because all the original Pentium processors run on 5V. This
socket accepts the original Pentium 60MHz or 66MHz processor and the OverDrive
processor. Figure . shows the pinout specification of Socket 4.
Although both processors run on 5V, the original Pentium processor was created
with a circuit size of 0.8 micron, making that processor much more power-hungry than
the 0.6-micron circuits used in the OverDrive and the other Pentium processors.
Shrinking the circuit size is one of the best ways to decrease power consumption.
Although the OverDrive processor for Pentium-based systems draws less power than
the original processor, additional clearance might have to be allowed for the active
heatsink assembly that is mounted on top. As in other OverDrive processors with built-
in fans, the power to run the fan is drawn directly from the chip socket, so no separate
power-supply connection is required. Also, the fan is easy to replace should it ever fail.
Socket 5
When Intel redesigned the Pentium processor to run at 75MHz, 90MHz, and
100MHz, the company went to a 0.6-micron manufacturing process and 3.3V operation.
This change resulted in lower power consumption: only 3.25 amps at 3.3V (10.725
watts). Therefore, the 100MHz Pentium processor used far less power than even the
original 60MHz version. This resulted in lower power consumption and enabled the
extremely high clock rates without overheating.
The Pentium 75 and higher processors actually have 296 pins, although they plug
into the official Intel Socket 5 design, which calls for a total of 320 pins. The additional
pins are used by the Pentium OverDrive for Pentium processors. This socket has the
320 pins configured in a staggered PGA, in which the individual pins are staggered for
tighter clearance.
The Pentium OverDrive for Pentium processors has an active heatsink (fan) assembly
that draws power directly from the chip socket. The chip requires a maximum 4.33
amps of 3.3V to run the chip (14.289 watts) and 0.2 amp of 5V power to run the fan (one
watt), which results in a total power consumption of 15.289 watts. This is less power
than the original 66MHz Pentium processor requires, yet it runs a chip that is as much
as four times faster!
Socket 6
The last 486 socket was designed for the 486 DX4 and the 486 Pentium OverDrive
processor. Socket 6 was intended as a slightly redesigned version of Socket 3 and had
an additional 2 pins plugged for proper chip keying. Socket 6 has 235 pins and accepts
only 3.3V 486 or OverDrive processors. Although Intel went to the trouble of designing
this socket, it never was built or implemented in any systems. Motherboard
manufacturers instead stuck with Socket 3.
Socket 7 is essentially the same as Socket 5 with one additional key pin in the opposite
inside corner of the existing key pin. Socket 7, therefore, has 321 pins total in a 37x37
SPGA arrangement. The real difference with Socket 7 is not with the socket itself, but
with the companion voltage regulator module (VRM) circuitry on the motherboard that
must accompany it.
The VRM is either a small circuit board or a group of circuitry embedded in the
motherboard that supplies the proper voltage level and regulation of power to the
processor.
The main reason for the VRM is that Intel and AMD
wanted to drop the voltages the processors would use
from the 3.3V or 5V supplied to the motherboard by the
power supply. Rather than require custom power
AMD, along with Cyrix and several chipset manufacturers, pioneered an improvement
or extension to the Intel Socket 7 design called Super Socket 7 (or Super7), taking it
from 66MHz to 95MHz and 100MHz. This enabled faster Socket 7type systems to be
made, supporting processors up to 500MHz, which are nearly as fast as some of the
newer Slot 1 and Socket 370type systems using Intel processors. Super7 systems also
have support for the AGP video bus, as well as Ultra DMA hard disk controllers and
advanced power management.
Socket 8
Socket 8 is a special SPGA socket featuring a whopping 387 pins! This was specifically
designed for the Pentium Pro processor with the integrated L2 cache. The additional
pins are required by the P6 processor bus. Figure. shows the Socket 8 pinout.
In November 1998, Intel introduced a new socket for P6 class processors. The socket
was called Socket 370 or PGA-370 because it has 370 pins and originally was designed
for lower-cost PGA versions of the Celeron and Pentium III processors. Socket 370 was
originally designed to directly compete in the lower-end system market along with the
Super7 platform supported by AMD and Cyrix. However, Intel later used it for the
Pentium III processor. Initially all the Celeron and Pentium III processors were made in
SECC or SEPP format. These are essentially circuit boards containing the processor and
separate L2 cache chips on a small board that plugs into the motherboard via Slot 1.
This type of design was necessary when the L2 cache chips were made a part of the
processor but were not directly integrated into the processor die. Intel did make a
multiple-die chip package for the Pentium Pro, but this proved to be a very expensive
way to package the chip, and a board with separate chips was cheaper, which is why
the Pentium II looks different from the Pentium Pro.
Starting with the Celeron 300A processor introduced in August 1998, Intel began
combining the L2 cache directly on the processor die; it was no longer in separate chips.
With the cache fully integrated into the die, there was no longer a need for a board-
mounted processor. Because it costs more to make a Slot 1 board or cartridge-type
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processor instead of a socketed type, Intel moved back to the socket design to reduce
the manufacturing costespecially with the Celeron, which at that time was competing
on the low end with Socket 7 chips from AMD and Cyrix.
Starting in October 1999, Intel also introduced Pentium III processors with integrated
cache that plug into Socket 370. These use a packaging called flip chip pin grid array
(FC-PGA), in which the raw die is mounted on the substrate upside down. The slot
version of the Pentium III was more expensive and no longer necessary because of the
on-die L2 cache.
Note that because of some voltage changes and one pin change, many original Socket
370 motherboards do not accept the later FC-PGA Socket 370 versions of the Pentium
III and Celeron. Pentium III processors in the FC-PGA form have two RESET pins and
require VRM 8.4 specifications. Prior motherboards designed only for the older
versions of the Celeron are referred to as legacy motherboards, and the newer
motherboards supporting the second RESET pin and VRM 8.4 specification are referred
to as flexible motherboards. Contact your motherboard or system manufacturer for
information to see whether your socket is the flexible version. Some motherboards,
such as the Intel CA810, do support the VRM 8.4 specifications and supply proper
voltage, but without Vtt support the Pentium III processor in the FC-PGA package will
be held in RESET#. The last versions of the Pentium III and Celeron III use the Tualatin
core design, which also requires a revised socket to operate. Motherboards that can
handle Tualatin-core processors are known as Tualatin-ready and use different chipsets
from those not designed to work with the Tualatin-core processor. Companies that sell
upgrade processors offer products that enable you to install a Tualatin-core Pentium III
or Celeron III processor into a motherboard that lacks built-in Tualatin support.
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Installing a Pentium III processor in the FC-PGA package into an older motherboard
is unlikely to damage the motherboard. However, the processor itself could be
damaged. Pentium III processors in the 0.18-micron process operate at either 1.60V or
1.65V, whereas the Intel Celeron processors operate at 2.00V. The motherboard could
be damaged if the motherboard BIOS fails to recognize the voltage identification of the
processor. Contact your PC or motherboard manufacturer before installation to ensure
compatibility.
A motherboard with a Slot 1 can be designed to accept almost any Celeron, Pentium II,
or Pentium III processor. To use the socketed Celerons and Pentium III processors,
several manufacturers have made available a low-cost slot-to-socket adapter sometimes
called a slot-ket. This is essentially a Slot 1 board containing only a Socket 370, which
enables you to use a PGA processor in any Slot 1 board. A typical slot-ket adapter is
shown in the "Celeron" section later in this chapter.
Socket 423
Socket 423 is a ZIF-type socket introduced in November 2000 for the original Pentium
4. Figure . shows Socket 423.
Socket 423 uses a unique heatsink mounting method that requires standoffs attached
either to the chassis or to a special plate that mounts underneath the motherboard. This
was designed to support the weight of the larger heatsinks required for the Pentium 4.
Because of this, many Socket 423 motherboards require a special chassis that has the
necessary additional standoffs installed. Fortunately, the need for these standoffs was
eliminated with the newer Socket 478 for Pentium 4 processors.
Socket 478
Socket 478 is a ZIF-type socket for the Pentium 4 and Celeron 4 (Celerons based on the
Pentium 4 core) introduced in October 2001. It was specially designed to support
additional pins for future Pentium 4 processors and speeds over 2GHz. The heatsink
mounting is different from the previous Socket 423, allowing larger heatsinks to be
attached to the CPU. Figure. shows Socket 478.
Socket 478 processors use five VID pins to signal the VRM built into the motherboard
to deliver the correct voltage for the particular CPU you install. This makes the voltage
selection completely automatic and foolproof. A small
triangular mark indicates the pin-1 corner for proper
orientation of the chip.
Socket A has 462 pins and 11 plugs oriented in an SPGA form (see Figure). Socket A
has the same physical dimensions and layout as Socket 370; however, the location and
placement of the plugs prevent Socket 370 processors from being inserted. Socket A
supports 31 voltage levels from 1.100V to 1.850V in 0.025V increments, controlled by
the VID0-VID4 pins on the processor. The automatic
voltage regulator module circuitry typically is embedded
on the motherboard.
After the introduction of Socket A, AMD moved all Athlon (including all Athlon XP)
processors to this form factor, phasing out Slot A. In addition, for a time AMD also sold
a reduced L2 cache version of the Athlon called the Duron in this form factor. In 2005,
AMD discontinued the Athlon XP and introduced the AMD Sempron in both Socket A
and Socket 754 form factors. The first Athlon 64 processors also used Socket 754, but
most current Athlon 64 processors now use Socket 939.
Caution
Just because a chip can plug into a socket doesn't mean it will work. The newer Athlon
XP and Socket A Sempron processors require different voltages, BIOS, and chipset
support than earlier Socket A Athlon and Duron processors. As always, make sure
your motherboard supports the processor you intend to install.
Socket 603 is used with the Intel Xeon processor in DP (dual processor) and MP
(multiple processor) configurations. These are typically used in motherboards designed
for use in network file servers. Figure shows Socket 603.
Socket 754
Figure 3.26 Socket 754. The large cutout corner at the lower
left indicates pin 1.
Socket 939 is used with the Socket 939 versions of the AMD
Athlon 64, 64 FX, and 64 X2 (see Figure). It's also used by
some recent versions of the AMD Opteron processor for
workstations and servers. Motherboards using this socket
support conventional unbuffered DDR SDRAM modules
in either single- or dual-channel mode, rather than the
server-oriented (more expensive) registered modules
required by Socket 940 motherboards. Sockets 939 and 940
have different pin arrangements and processors for each and
are not interchangeable.
Figure. Socket 940. The cutout corner and triangle at the lower left
indicate pin 1.
Socket T
LGA uses gold pads (called lands) on the bottom of the substrate to replace the pins
used in PGA packages. In socketed form, it allows for much greater clamping forces
and therefore greater stability and improved thermal transfer (better cooling). LGA is
really just a recycled version of what was previously called LCC (leadless chip carrier)
packaging. This was used way back on the 286 processor in '84, which had gold lands
around the edge only (there were far fewer pins back then). In other ways LGA is
simply a modified version of ball grid array (BGA), with gold lands replacing the
solder balls, making it more suitable for socketed (rather than soldered) applications.
The early LCC packages were ceramic, whereas the first Pentium II LGA packages
were plastic, with the package soldered to a cartridge substrate. These days (and for the
future) the LGA package is organic and directly socketed instead. On a technical level,
the Pentium 4 LGA chips combine several packaging technologies that have all been
used in the past, including organic land grid array (OLGA) for the substrate and
controlled collapse chip connection (C4) flip-chip for the actual
processor die (see Figure ).
Figure. Socket T. The release lever on the left is used to raise the
clamp out of the way to permit the processor to be placed over
the contacts.
In the second quarter of 2006, AMD introduced processors that use a new socket, called
Socket M2 (see Figure ). AMD intends for M2 to be the eventual replacement for the
confusing array of Socket 754, Socket 939, and Socket 940 form factors it uses for the
Athlon 64, Athlon 64 FX, Athlon 64 X2, Opteron, and Socket 754 AMD Sempron
processors.
Processor Slots
After introducing the Pentium Pro with its integrated L2 cache, Intel discovered that
the physical package it chose was very costly to produce. Intel was looking for a way to
easily integrate cache and possibly other components into a processor package, and it
came up with a cartridge or board design as the best way to do this. To accept its new
cartridges, Intel designed two types of slots that could be used on motherboards.
Slot 1 is a 242-pin slot designed to accept Pentium II, Pentium III, and most Celeron
processors. Slot 2, on the other hand, is a more sophisticated 330-pin slot designed for
the Pentium II Xeon and Pentium III Xeon processors, which are primarily for
workstations and servers. Besides the extra pins, the biggest difference between Slot 1
and Slot 2 is the fact that Slot 2 was designed to host up to four-way or more processing
in a single board. Slot 1 allows only single or dual processing functionality.
Note that Slot 2 is also called SC330, which stands for slot connector with 330 pins. Intel
later discovered less-expensive ways to integrate L2 cache into the processor core and
no longer produces Slot 1 or Slot 2 processors. Both Slot 1 and Slot 2 processors are now
obsolete, and many systems using these processors have been retired or upgraded with
socket-based motherboards.
Slot 1, also called SC242 (slot connector 242 pins), is used by the SEC design that is used
with the cartridge-type Pentium II/III and Celeron processors (see Figure).
Slot 2 (SC330)
The Pentium II Xeon and Pentium III Xeon processors are designed in a cartridge
similar to, but larger than, that used for the standard Pentium II/III. Figure. shows the
Xeon cartridge.
Reference : http://www.quepublishing.com/articles/article.aspx?
p=482324&seqNum=6
ChipSelect Basic
Q.What is Chipset?
Ans. A number of integrated circuits designed to perform one or more related
functions. For example, one chipset may provide the basic functions of a modem while
another provides the CPU functions for a computer. Newer chipsets generally include
functions provided by two or more older chipsets. In some cases, older chipsets that
required two or more physical chips can be replaced with a chipset on one chip. The
term is often used to refer to the core functionality of a motherboard.
On a PC, it consists of two basic parts -- the northbridge and the southbridge. All of
the various components of the computer communicate with the CPU through the
chipset.
The northbridge connects directly to the processor via the front side bus (FSB). A
memory controller is located on the northbridge, which gives the CPU fast access to the
memory. The northbridge also connects to the AGP or PCI Express bus and to the
memory itself.
Purpose of Chipset
A bus is simply a circuit that connects one part of the motherboard to another. The
more data a bus can handle at one time, the faster it allows information to travel. The
speed of the bus, measured in megahertz (MHz), refers to how much data can move
across the bus simultaneously.
Bus speed usually refers to the speed of the front side bus (FSB), which connects the
CPU to the northbridge. FSB speeds can range from 66 MHz to over 800 MHz. Since the
CPU reaches the memory controller though the northbridge, FSB speed can
dramatically affect a computer's performance.
The back side bus connects the CPU with the level 2 (L2) cache, also known as
secondary or external cache. The processor determines the speed of the back side
bus.
The memory bus connects the northbridge to the memory.
Prepared By Prof. Manoj.kavedia (9860174297 9324258878 ) (www.kavediasir.yolasite.com)
Computer Architecture and Maintenance (G-Scheme-2014) 41
The IDE or ATA bus connects the southbridge to the disk drives.
The AGP bus connects the video card to the memory and the CPU. The speed of
the AGP bus is usually 66 MHz.
The PCI bus connects PCI slots to the southbridge. On most systems, the speed
of the PCI bus is 33 MHz. Also compatible with PCI is PCI Express, which is
much faster than PCI but is still compatible with current software and operating
systems. PCI Express is likely to replace both PCI and AGP busses.
The faster a computer's bus speed, the faster it will operate -- to a point. A fast bus
speed cannot make up for a slow processor or chipset.
Fig.
Intel Hub Architecture (also called as AHA - Accelerated Hub Architecture)
Intel introduced this hub architecture starting with the 820 chipset. The hub
architecture divides control between a memory controller hub (MCH) that supports
memory and AGP and an I/O controller hub (ICH) that supports PCI, USB, sound, IDE
and LAN. The word hub in Intel Hub Architecture refers to the north and south
bridges in a chipset. Intel has replaced those two terms with the word hub.
Intel's architecture for the 8xx family of chipsets, starting with the 820. It uses a
memory controller hub (MCH) that is connected to an I/O controller hub (ICH) via a
266 MB/sec bus. The MCH chip supports memory and AGP, while the ICH chip
provides connectivity for PCI, USB, sound, IDE hard disks and LAN.
Fig.
Because of the high-speed channel between the sections, the Intel Hub Architecture
(IHA) is much faster than the earlier Northbridge/Southbridge design, which hooked
all low-speed ports to the PCI bus. The IHA also optimizes data transfer based on data
type.
Accelerated Hub Architecture (AHA) (also called Intel Hub Architecture) is an
Intel 800-series chipset design that uses a dedicated bus to transfer data between the
two mainprocessor chips instead of using the Peripheral Component Interconnect (PCI)
bus, which was used in previous chipset architectures. The Accelerated Hub
Architecture provides twice the bandwidth of the traditional PCI bus architecture at
266 MB per second. The Accelerated Hub Architecture consists of
a memory controller hub and an input/output (I/O) controller hub (a controller directs
or manages access to devices).
The memory controller hub provides the central processing unit
(CPU) interface, the memory interface, and the accelerated graphics port (AGP)
interface. The memory controller hub supports single or dual processors with up to
1 GB of memory. The memory controller hub also allows for simultaneous processing,
which enables more life-like audio and video capabilities.
The I/O controller hub provides a direct connection from the memory to the I/O
devices, which includes any built-in modem and audio controllers, hard drives,
Universal Serial Bus (USB) ports, and PCI add-in cards. The I/O controller hub also
includes the Alert on LAN (local area network) feature that sounds an alert when
software failures or system intrusion occurs.
http://www.techwarelabs.com/reviews/motherboard/albatron_px845pev/
Example
82810 Graphics Memory 421 Ball Grid Array (BGA)
Controller Hub
82801 Integrated Controller 241 Ball Grid Array (BGA)
Hub
82802 Firmware Hub 32-pin PLCC or 40-pin TSOP
The 82810 chip features a "Hardware Motion Compensation" to improve soft DVD
video and digital video out port for digital flat panel monitors. The graphics controller
is a version of Intel's new model 752. Optional, the chip set can be equipped with a
display cache of 4MB RAM to be used for "Z-buffering".
This "south bridge", the 82801 (ICH), employs an accelerated hub to give a direct
connection from the graphics and memory to the integrated AC97 (Audio-Codec)
controller, the IDE controllers, the dual USB ports, and the PCI bus. This promises
increased I/O performance.
The 82802 Firmware Hub (FWH) stores system BIOS and video BIOS in a 4 Mbit
EEPROM. In addition, the 82802 contains a hardware Random Number Generator
(RNG), which (perhaps and in time) will enable better security, stronger encryption,
and digital signing in the Internet.
AC97
The Integrated Audio-Codec 97 controller enables software audio and modem by using
the processor to run sound and modem software. It will require software, but using this
you need no modem or soundcard.
This feature is smart if you do not use audio or modem on a regular basis. It adds a
heavy work to the CPU, which has to act as a modem and as a sound card beside its
regular tasks.
Component Description
DMI The south bridge is a chip on the motherboard. If we want to
look at one of the latest models, we could take the south
bridge, which is designed for motherboards with Pentium 4
processors. The south bridge incorporates a number of
different controller functions, it looks after the transfer of data
to and from the hard disk and all the other 1/0 devices, and
passes this data into the link channel which connects to the
north bridge. It contains the following components and
functions as shown in Table.
PCi-Express Hi-speed bus for I/O adapters.
PCi port Standard I/O bus.
Serial Sata Controller for up to four SATA hard disks.
Matrix Storage Advanced Host Controller Interface for RAID0 and 1 on the
same drives. Including support for Native Command Queuing
and hot plug drive swaps.
Ultra Ata/100 Controller for PATA devices like hard disks, DVI and CD-
Prepared By Prof. Manoj.kavedia (9860174297 9324258878 ) (www.kavediasir.yolasite.com)
Computer Architecture and Maintenance (G-Scheme-2014) 46
drives.
USB Port Hi-speed (JSB 2.0 ports.
7.1 Channel audio Option for integrated sound device with
Dolby Digital and UTS.
AC97 Modem Integrated modem.
Ehternet Integrated 10/100 Mbs network controller.
North Bridge
The northbridge or host bridge was one of the two chips in the core logic chipset on
a PC motherboard, used to managedata communications between a CPU and a
motherboard. It is supposed to be paired with a second support chip known as
a southbridge.
The northbridge was historically one of the two chips in the core logic chipset on a PC
motherboard, the other being thesouthbridge. Increasingly these functions became
integrated into the CPU chip itself, beginning with memory and graphics controllers.
For Intel Sandy Bridge and AMD Accelerated Processing Unit processors introduced in
2011, all of the functions of the northbridge reside on the CPU. When a separate
northbridge is employed in older Intel systems, it is named memory controller
hub (MCH) or integrated memory controller hub (IMCH) if equipped with an integrated
VGA.
http://www.karbosguide.com/books/pcarchitecture/chapter22.htm
http://www.karbosguide.com/books/pcarchitecture/chapter26.htm
The Northbridge is the portion of the chipset HUB that connects faster I/O buses (for
example, an AGP bus) to the system bus. Northbridge SI also bigger looking then
The Northbridge and the Southbridge are known as the chipset on the motherboard.
These set of chips collectively control the memory cache, external bus, and some
peripherals. There is a fast end of the hub, and there is a slow end of the hub. The fast
end of the hub is the Northbridge, containing the graphics and memory controller
connecting to the system bus. The slower end of the hub is the Southbridge, containing
the I/O controller hub.
http://en.kioskea.net/contents/403-pci-bus
Q.What is PCI and States its History
Ans. Short for Peripheral Component Interconnect, PCI was introduced by Intel in
1992, revised in 1993 to version 2.0, and later revised in 1995 to PCI 2.1 and is as an
expansion to the ISA bus. The PCI bus is a 32-bit (133MBps) computer bus that is also
available as a 64-bit bus and was the most commonly found and used computer bus in
computers during the late 1990's and early 2000's. Unlike, ISA and earlier expansion
cards, PCI follows the PnP specification and therefore does not require any type of
jumpers or dip switches. Below is an example of what the PCI slot looks like on a
motherboard.
Conventional PCI (PCI is from Peripheral Component Interconnect, part of the PCI
Local Bus standard), often shortened to just PCI, is a local computer bus for attaching
hardware devices in a computer. The PCI bus supports the functions found on a
processor bus, but in a standardized format that is independent of any particular
processor; devices connected to the PCI bus appear to the processor to be connected
directly to the processor bus, and are assigned addresses in the processor's address
space
The first version of conventional PCI found in consumer desktop computers was a 32-
bit bus operating at 33 Mhz and 5 V signaling, although the PCI 1.0 standard provided
for a 64-bit variant as well. Version 2.0 of the PCI standard introduced 3.3 V slots,
which are physically distinguished by a flipped physical connector (relative to their 5 V
predecessors) to preventing accidental insertion of older cards. Universal cards, which
Conventional PCI and PCI-X are sometimes called parallel PCI in order to distinguish
them technologically from their more recent successor PCI Express, which adopted a
serial, lane-based architecture. Conventional PCI's heyday in the desktop computer
market was approximately the decade 1995-2005. PCI and PCI-X have become obsolete
for most purposes, however, they are still common on modern desktops for the
purposes of backwards compatibility and the low relative cost to produce. Many kinds
of devices previously available on PCI expansion cards are now commonly integrated
onto motherboards or available serial bus and PCI Express versions.
Connector
At least 3 or 4 PCI connectors are generally present on motherboards and can generally
be recognised by their standardized white color.
The PCI interface exists in 32 bits with a 124-pin connector, or in 64 bits with a 188-pin
connector. There are also two signalling voltage levels:
The 64-bit PCI connectors offer additional pins and can accommodate 32-bit PCI cards.
There are 2 types of 64-bit connectors:
Features of ISA
They are two capabilities that handle data: 8-bit ISA and ISA-16 bits.
Are physically different expansion slots, the 8 bits is smaller than 16 bits.
The 16-bit ISA slot also supports 8 bit ISA devices, but not vice versa.
They have a transfer rate of up to 20 Mbytes / s (MB / s).
They have a working internal speed of 4.77 MHz, 6 MHz, 8 MHz and 10 MHz
It has a feature called "bus master" or bus-level control, which allows you to
work directly with the RAM.
ISA could be considered an expansion slot of the second generation.
This type of expansion slots generate a bottleneck having the higher speed
microprocessor.
Feature of PCI
Extremely high-speed data transfer: 32-bit wide data transfer at the rate 33 MI-h
gives a maximum throughput of 132 Mega bytes per second. Data transfer at the
rate 66 MHz with 64 bit wide data is now being offered.
Plug and play facility: This circumvents the need for an explicit address for a
plug in board. A PCI board inserted in any PCI slot is automatically detected and
the required 110 and memory resources are allotted by the system. Thus, there is
no risk of clash of resources.
New approach: It moves peripherals off the 1/0 bus and places them closer to the
system processor bus, thereby providing faster data transfer between the
processor and peripherals.
Processor independence: The PCI local bus fulfills the need for a local bus
standard that is not directly dependent on the speed and structure of the
processor bus, and that is both reliable and expandable. It is for the first time in
PC industry that a common bus, independent of microprocessor and
manufacturer, has been adopted.
Full multi-master capability :This allows any PCI master to communicate
directly with other PC master/slave.
Specifications of PCI
These specifications represent the most common version of PCI used in normal PCs.
33.33 MHz clock with synchronous transfers.
Peak transfer rate of 133 MHz per second for 32-bit bus width (33.33 Mhz x32 bits
divide(/) 8 bits/byte =133 MB/s)
Peak transfer rate of 266 MB/s for 64-bit bus width
PCI-Express, on the other hand, uses a serial interconnect along a switched bus
dedicated exclusively to that slot. In this respect, and most others, it uses radically new
architecture, having little to do with old PCI. Furthermore, PCI-Express has the unique
capability of multiplying up individual data "lanes", to produce aggregate
interconnects that can deliver up to 16 times the bandwidth of a single lane. This is why
you will always see PCI-Express slots referred to as "PCI-Express*4" or "PCI-
Express*16" etc.
It can run at clock speeds of 33 or 66 MHz. At 32 bits and 33 MHz, it will yield a
throughput rate of 133 MBps which is too slow to cater for the latest frame
grabbers especially as even this is shared with other PCI devices.
As it happens, once most programs are open and running, they use very few
resources. When these resources are kept in cache, programs can operate more quickly
and efficiently. All else being equal, cache is so effective in system performance that a
computer running a fast CPU with little cache can have lower benchmarks than a
system running a somewhat slower CPU with more cache. Cache built into the CPU
itself is referred to as Level 1 (L1) cache. Cache that resides on a separate chip next to
the CPU is called Level 2 (L2) cache. Some CPUs have both L1 and L2 cache built-in
and designate the separate cache chip as Level 3 (L3) cache.
Cache that is built into the CPU is faster than separate cache, running at the
speed of the microprocessor itself. However, separate cache is still roughly twice as fast
as Random Access Memory (RAM). Cache is more expensive than RAM, but it is well
worth getting a CPU and motherboard with built-in cache in order to maximize system
performance.
Operation
Let us suppose that the system has cache of three levels (level means that overall
cache memory is split into different hardware segments which vary in their processing
speed and memory). From RAM data is transferred into cache of 3 rd level (L3 cache). L3
cache is a segment of overall cache memory. L3 cacheis faster than RAM but slower
then L2 cache. To further fasten up the process cache of second order L2 cache are used.
They are located at immediate vicinity of processor. But in some of the modern
processors L2 cache is inbuilt making the process faster. It should be noted that it is not
necessary that a system has 3 levels of cache; it might have 1 or 2 level of cache. At the
core level is cache of first level that is L1 cache memory. The commonly used
commands/instructions/data is stored in this section of memory. This is built in the
processor itself. Thus this is fastest of all the cache memory.
Q.What is Cache State its Purpose?Describe type of cache ? State advantage of cache
Ans.The cache is a smaller, faster memory which stores copies of the data from the
most frequently used main memory locations. As long as most memory accesses are to
cached memory locations, the avenge latency of memory accesses will be closer to the
cache latency than to the latency of main memory.
When the processor needs to read from or write to a location in main memory, it first
checks whether a copy of that data is in the cache. If so, the processor immediately
reads from or writes to the cache, which is much faster than reading from or writing to
main memory.
The CPU
uses cache
memory to store
instructions that
are repeatedly
required to run
programs,
improving overall
system speed. The
advantage of
cache memory is
that the CPU does
Level-1
Also called as L1 cache, primary cache, internal cache, or system cache. When
referring to computer processors, L1 cache is cache that is built into the processor and is
the fastest and most expensive cache in the computer. The L1 cache stores the most
critical files that need to be executed and is the first thing the processor looks when
performing an instruction
Ll, or primary cache, is a small, high-speed cache incorporated right onto the
processors chip. The Li cache typically ranges in size from 8KB to 64KB and uses the
high-speed SRAM (static RAM) instead of the slower and cheaper DRAM (dynamic
RAM) used for main memory. Using memory cache to hold memory values, or the
most recently used data and instructions means the processor can retrieve the data
from the cache instead of the systems main memory, which is much slower than the
cache memory.
Level 2
L2 is also commonly referred to as secondary cache or external cache. Unlike
Layer 1 cache, L2 cache was located on the motherboard on earlier computers, although
with newer processors it is found on the processor chip. When L2 cache is found on the
processor, if the cache is also on the motherboard, it is more properly known as L3
cache.
Tip: The L2 cache is on the same processor chip and uses the same die as the CPU,
however, it is still not part of the core of the CPU.
L2,. or secondary cache, is memory between the RAM and the CPU (but not on
the CPU chip itself and is bigger than the primary cache (typically 64KB to 2MB). L2
ATC (Advanced Transfer Cache) uses micro-architectural improvements, which
provide a higher data bandwidth interface between the L2 cache and the processor
core, and is completely scaleable with the processor core frequency. The L2 cache is
also a unified, non-blocking cache, which improves performance over cache-on-
motherboard solutions through a dedicated 64-bit
cache
Level-3
L3 Cache is Cache found on the motherboard instead of the processor on earlier
computers. With today's computers this type of cache is a cache that is found on the
same chip and die as the processors. In the below picture of the Intel Core i7-3960X
Processor die, is an example of a processor chip containing six cores (CPUs) and the
shared L3 Cache. As can be seen in the picture, the L3 cache is shared between all cores
(CPUs) and is very large in comparison to what an L1 or L2 cache would be on the
same chip because it is cheaper although slower.
Since more manufacturers are beginning to include L2 cache into their
architectures, L3 cache is slowly replacing the L2 cache function the extra cache built
into the motherboards between the CPU and the main memory (old L2 cache
definition) is now being called the L3 cache.
Some manufacturers have proprietary L3 cache designs already, but most desktop and
notebook computers do not offer this feature yet. Micron has developed a chip set with
8MB of on-chip DRAM in the north bridge chip that acts as an L3 cache, but offering an
L3 cache as standard equipment is still a future prospect.
Advantage of Cache
The cache memory enhances the speed of system or improving performance.
Cache memory reduces a traditional system bottleneck.
As the cache memory lies on the same chip (For LI cache) the access time is very
small.
* The initial level of storage on a processor are the registers. The registers are where the
actually processing input and output takes place.
* L1 cache Then the level 1 cache comes next. It is logically the closest high speed
memory to the CPU core / registers. It usually runs at the full speed (meaning the same
as the CPU core clockspeed). L1 often comes in size of 8kB, 16kB, 32kB, 64kB or 128kB.
But, it is very high speed even though the amount is relatively small.
* L2 cache The next level of cache is L2, or level 2. Nowadays L2 is larger than L1 and
it often comes in 256kB, 512kB and 1,024MB amounts. L2 often runs at 1/4, 1/2 or full
speed in relation to the CPU core clockspeed.
* L3 cache Level 3 cache is something of a luxury item. Often only high end
workstations and servers need L3 cache. Currently for consumers only the Pentium 4
Extreme Edition even features L3 cache. L3 has been both on-die, meaning part of the
CPU or external meaning mounted near the CPU on the motherboard. It comes in
many sizes and speeds.
Level 2 Cache
In an actual Pentium class (Socket 7) system, the L2 cache is mounted on
the motherboard, which means it runs at motherboard speed (66 MHz, or 15 ns in this
example).
All modern processors have integrated L2 cache that runs at the same speed as the
processor core, which is also the same speed as the L1 cache. The screenshot below
illustrates the cache types and sizes in the AMD A10-5800Kprocessor, as reported by
CPU-Z.
The AMD A10-
5800K processor is a quad-
core processor with L1 and
L2 cache.
Level 3 Cache
Most late-model mid-range
and high-performance
processors also contain a
third level of cache known
as L3 cache. In the past,
relatively few processors
had L3 cache, but it is
becoming more and more
common in newer and
Q.What is SDRAM
Ans. Synchronous dynamic random access memory (SDRAM) is dynamic random
access memory (DRAM) with an interface synchronous with the system bus carrying
data between the CPU and the memory controller hub. SDRAM has a rapidly
responding synchronous interface, which is in sync with the system bus. SDRAM waits
for the clock signal before it responds to control inputs.
SDRAM preceded double data rate (DDR). The newer interface of DRAM has a double
data transfer rate using both the falling and rising edges of the clock signal. This is
called dual-pumped, double pumped or double transition. There are three significant
characteristics differentiating SDRAM and DDR:
1. The main difference is the amount of data transmitted with each cycle, not the
speed.
2. SDRAM sends signals once per clock cycle. DDR transfers data twice per clock
cycle. (Both SDRAM and DDR use the same frequencies.)
3. SDRAM uses one edge of the clock. DDR uses both edges of the clock.
SDRAM has a 64-bit module with long 168-pin dual inline memory modules (DIMMs).
SDRAM access time is 6 to 12 nanoseconds (ns). SDRAM is the replacement for
dynamic random access memory (DRAM) and EDO RAM. DRAM is a type of random
access memory (RAM) having each bit of data in an isolated component within an
integrated circuit. Older EDO RAM performed at 66 MHz.
Detailed Explanation
With older clocked electronic circuits, the transfer rate was one per full cycle of
the clock signal. This cycle is called rise and fall. A clock signal changes two times per
transfer, but the data lines change no more than one time per transfer. This restriction
can cause integrity (data corruption and errors during transmission) when high
bandwidths are used. SDRAM transmits signals once per clock cycle. The newer DDR
transmits twice per clock cycle.
SDRAM is improved DRAM with a synchronous interface waiting for a clock
pulse before it responds to data input. SDRAM uses a feature called pipelining, which
accepts new data before finishing processing previous data. A delay in data processing
is called latency.
DRAM technology has been used since the 1970s. In 1993, SDRAM was implemented
by Samsung with model KM48SL2000 synchronous DRAM. By 2000, DRAM was
replaced by SDRAM. In the beginning SDRAM was slower than burst EDO DRAM
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Computer Architecture and Maintenance (G-Scheme-2014) 73
because of the extra logic features. But the benefits of SDRAM allowed more than one
set of memory, which increased the bandwidth efficiency.
With the introduction of DDR, SDRAM quickly began to fade out of use because
DDR was cheaper and
more cost effective. The
SDRAM used a 168-pin
while the DDR module
used a 184-pin. SDRAM
modules used a voltage of
3.3V and DDR used 2.6V,
producing less heat.
Features of SDRAM
Ans. In computing, a computer bus operating with double data rate (DDR) transfers
data on both the rising and falling edges of the clock signal.This is also known as
double pumped, dual-pumped, and double transition. The term toggle mode is used in
the context of NAND flash memory.
The simplest way to design a clocked electronic circuit is to make it perform one
transfer per full cycle (rise and fall) of a clock signal. This, however, requires that the
This technique has been used for microprocessor front side busses, Ultra-3 SCSI,
graphics RAM (the AGP bus and GDDR), main memory (both RDRAM and DDR1
through DDR4), and the HyperTransport bus on AMD's Athlon 64 processors. It is
more recently being used for other systems with high data transfer speed
requirements as an example, for the output of analog-to-digital converters (ADCs).
The 184-pin DDR RAM dual in-line memory modules (DIMMS) only work properly in
a motherboard designed for their use. While this RAM comes in various speeds,
installing a version faster than a motherboard can support is a waste of money, since it
will only run as fast as the motherboard permits. It is visually differentiated from
SDRAM in that SDRAM is a 168-pin DIMM with a double notch at the bottom along
the pins one notch just off-center, the other offside. The 184-pin DDR SDRAM has a
single off-center notch.
DDR RAM is generally made for processors 1GHz and faster. Designations like PC1600
DDR SDRAM and PC2100 DDR SDRAM coincide with particular FSB and CPU speeds.
RAM manufacturers use different schemes to designate processor speed, and the
various technicalities in RAM designations and standards can be confusing. Computer
users should check their motherboard manual to see what RAM type is compatible
with their system before purchasing memory.
DDR-1 SDRAM
While the access latency of DRAM is fundamentally limited by the DRAM array,
DRAM has very high potential bandwidth because each internal read is actually a row
of many thousands of bits. To make more of this bandwidth available to users, a double
data rate interface was developed. This uses the same commands, accepted once per
cycle, but reads or writes two words of data per clock cycle. The DDR interface
accomplishes this by reading and writing data on both the rising and falling edges of
the clock signal. In addition, some minor changes to the SDR interface timing were
made in hindsight, and the supply voltage was reduced from 3.3 to 2.5 V. As a result,
DDR SDRAM is not backwards compatible with SDR SDRAM.
DDR SDRAM (sometimes called DDR1 for greater clarity) doubles the minimum read
or write unit; every access refers to at least two consecutive words.
Typical DDR SDRAM clock rates are 133, 166 and 200 MHz (7.5, 6, and 5 ns/cycle),
generally described as DDR-266, DDR-333 and DDR-400 (3.75, 3, and 2.5 ns per bit).
Corresponding 184-pin DIMMs are known as PC-2100, PC-2700 and PC-3200.
Features of DDR-1
DDR2 SDRAM
Typical DDR2 SDRAM clock rates are 200, 266, 333 or 400 MHz (periods of 5, 3.75, 3
and 2.5 ns), generally described as DDR2-400, DDR2-533, DDR2-667 and DDR2-800
(periods of 2.5, 1.875, 1.5 and 1.25 ns). Corresponding 240-pin DIMMS are known as
PC2-3200 through PC2-6400. DDR2 SDRAM is now available at a clock rate of 533 MHz
generally described as DDR2-1066 and the corresponding DIMMs are known as PC2-
8500 (also named PC2-8600 depending on the manufacturer).
Note that because internal operations are at 1/2 the clock rate, DDR2-400 memory
(internal clock rate 100 MHz) has somewhat higher latency than DDR-400 (internal
clock rate 200 MHz).
Features of DDR-2
DDR3 continues the trend, doubling the minimum read or write unit to 8 consecutive
words. This allows another doubling of bandwidth and external bus rate without
having to change the clock rate of internal operations, just the width. To maintain 800
1600 M transfers/s (both edges of a 400800 MHz clock), the internal RAM array has to
perform 100200 M fetches per second.
Again, with every doubling, the downside is the increased latency. As with all DDR
SDRAM generations, commands are still restricted to one clock edge and command
latencies are given in terms of clock cycles, which are half the speed of the usually
quoted transfer rate (a CAS latency of 8 with DDR3-800 is 8/(400 MHz) = 20 ns, exactly
the same latency of CAS2 on PC100 SDR SDRAM).
DDR3 memory chips are being made commercially, and computer systems using them
were available from the second half of 2007, with significant usage from 2008 onwards.
Initial clock rates were 400 and 533 MHz, which are described as DDR3-800 and DDR3-
1066 (PC3-6400 and PC3-8500 modules), but 667 and 800 MHz, described as DDR3-1333
and DDR3-1600 (PC3-10600 and PC3-12800 modules) are now common
Features of DDR-3
DDR4 SDRAM
DDR4 SDRAM is the successor to DDR3 SDRAM. It was revealed at the Intel
Developer Forum in San Francisco in 2008, and is due to be released to market during
2011. The timing has varied considerably during its development - it was originally
expected to be released in 2012, and later (during 2010) expected to be released in 2015,
before samples were announced in early 2011 and manufacturers began to announce
that commercial production and release to market was anticipated in 2012. DDR4 is
expected to reach mass market adoption around 2015, which is comparable with the
approximately 5 years taken for DDR3 to achieve mass market transition over DDR2.
DDR4 will not double the internal prefetch width again, but will use the same 8n
prefetch as DDR3. Thus, it will be necessary to interleave reads from several banks to
keep the data bus busy.
Types of Memory
SRAM: Static random access memory uses multiple transistors, typically four to
six, for each memory cell but doesn't have a capacitor in each cell. It is used
primarily for cache.
DRAM: Dynamic random access memory has memory cells with a paired
transistor and capacitor requiring constant refreshing.
FPM DRAM: Fast page mode dynamic random access memory was the original
form of DRAM. It waits through the entire process of locating a bit of data by
column and row and then reading the bit before it starts on the next bit.
Maximum transfer rate to L2 cache is approximately 176 MBps.
EDO DRAM: Extended data-out dynamic random access memory does not wait
for all of the processing of the first bit before continuing to the next one. As soon
as the address of the first bit is located, EDO DRAM begins looking for the next
bit. It is about five percent faster than FPM. Maximum transfer rate to L2 cache is
approximately 264 MBps.
SDRAM: Synchronous dynamic random access memory takes advantage of the
burst mode concept to greatly improve performance. It does this by staying on
the row containing the requested bit and moving rapidly through the columns,
reading each bit as it goes. The idea is that most of the time the data needed by
the CPU will be in sequence. SDRAM is about five percent faster than EDO RAM
and is the most common form in desktops today. Maximum transfer rate to L2
cache is approximately 528 MBps.
DDR SDRAM: Double data rate synchronous dynamic RAM is just like
SDRAM except that is has higher bandwidth, meaning greater speed. Maximum
transfer rate to L2 cache is approximately 1,064 MBps (for DDR SDRAM 133
MHZ).
RDRAM: Rambus dynamic random access memory is a radical departure from
the previous DRAM architecture. Designed by Rambus, RDRAM uses a Rambus
Conventional or Base
32M
memory: The original PC- 1 6 M /4 G
XT type system was
designed to use 1MB of
EX T EN D E D
memory space in RAM. M e mo r y
space called Conventional Memory, which at the first PC was introduced was 512K.
The other 512K was reserved for the use by the system itself including the mother
board and adapter boards plugged into the system slots.
IBM decided after introducing the system in that only 384K was needed for the
reserved uses , and company began marketing PCs with 640K of users memory. Thus
640K became the standard for memory that can be used by the DOS for running the
program and is often called as memory barrier.
First 640KB becomes the standard memory that can be used by DOS for running
programs. This is also called as the base memory. After 640 K, some area is reserved
for the use of graphics boards, other adapters and ROM BIOS of motherboard.
Extended memory can also be accessed directly by DOS programs running in protected
mode using VCPI or DPMI, two (different and incompatible) methods of using
protected mode under DOS.
Extended memory should not be confused with expanded memory, an earlier method
for expanding the IBM PC's memory capacity beyond 640 kB (655,360 bytes) using an
expansion card with bank switched memory modules. Because of the available support
for expanded memory in popular applications, device drivers were developed that
emulated expanded memory using extended memory. Later two additional methods
were developed allowing direct access to a small portion of extended memory from
real mode. These memory areas are referred to as the high memory area (HMA) and
the upper memory area (UMA; also referred to as upper memory blocks or UMBs).
There are several versions of EMS. The original versions, called EMS 3.0 and 3.2, enable
programs to use an additional 8MB of memory, but for data only. An improved version
Expanded memory is slow and clumsy for the system to use and generally obsolete
(outdated) now days. But some of the antique software still require EMS memory. 386
and higher systems can create expanded memory out of extended memory out of
extended memory by using a driver called EMM386.EXE. This software was
designed with 8-bit system because they do not have capability to access extended
memory. This software is load through the Autoexec.bat file.
Until the release of Microsoft Windows 3.0 in 1990, expanded memory was the
preferred way to add memory to a PC. The alternative method, called extended memory,
was less flexible and could be used only by special programs such as RAM disks.
Windows 3.0 and all later versions of Windows, however, contain an extended memory
manager that enables programs to use extended memory without interfering with one
another. In addition, Windows can simulate expanded memory for those programs that
need it (by using the EMM386.EXE driver).
RAM-disks
A disk cache is a program to speed up disk access by storing the most frequently use
information in the computer's memory and reading ahead from the disk in
anticipation. With floppy disks, the time saved can be spectacular. Writes are almost
always performed to the disk to prevent loss of data in case of power failure. Example:
PC-CACHE, as supplied with PC-Tools. A shareware product is EMMCACHE.
Print spoolers
A print spooler utilises the computer's memory as a high speed buffer so that a fast
computer is not slowed down by a slow printer. For example you can print a 100 page
database report and then load a spread sheet program, print reports and graphs, then
use your wordprocessor while the database report is still printing. Print spoolers that
use extended memory usually come with the memory card. The AST SUPERSPL is a
good example of a spooler with lots of options. A shareware product is EXTSPL.
Expanded memory is addressed from within the lower 1MB space, usually above 640K.
POST - Test the computer hardware and make sure no errors exist before loading
the operating system. Additional information on the POST can be found on
our POST and Beep Codes page.
Bootstrap Loader - Locate the operating system. If a capable operating system is
located, the BIOS will pass control to it.
BIOS drivers - Low level drivers that give the computer basic operational control
over your computer's hardware.
The BIOS provides those instructions. Some of the other common tasks that the BIOS
performs include:
A power-on self-test (POST) for all of the different hardware components in the
system to make sure everything is working properly
Activating other BIOS chips on different cards installed in the computer - For
example, SCSI and graphics cards often have their own BIOS chips.
Providing a set of low-level routines that the operating system uses to interface
to different hardware devices - It is these routines that give the BIOS its name.
They manage things like the keyboard, the screen, and the serial and parallel
ports, especially when the computer is booting.
Managing a collection of settings for the hard disks, clock, etc.
The BIOS is special software that interfaces the major hardware components of
your computer with the operating system. It is usually stored on a Flash memory chip
on the motherboard, but sometimes the chip is another type of ROM.
When you turn on your computer, the BIOS does several things. This is its usual
sequence:
1. Check the CMOS Setup for custom settings
2. Load the interrupt handlers and device drivers
3. Initialize registers and power management
4. Perform the power-on self-test (POST)
5. Display system settings
6. Determine which devices are bootable
7. Initiate the bootstrap sequence
There are a wide variety of motherboards available today. When selecting a new mobo
for your homebuilt computer, many things have to be taken into consideration,
including:
Form Factor. The form factor is a set of standards that include the size and shape
of the board, the arrangement of the mounting holes, the power interface, and
Cost. Even if you are on a budget, the motherboard is not the place to cut corners. Try a
less fancy case, instead. A good motherboard is more important than neon lights. But at
the same time, the fact that one mobo costs twice as much as another doesn't mean it is
twice as good. By searching newsgroups and reading hardware reviews, you're likely
to find some inexpensive boards that perform as well as (or even better than) boards
costing a great deal more.
Intel Socket 2011Intels most recent LGA socket. Used mostly by gamers for six
core i7 processors.
Intel Socket 1366Workstation class computer using the i7 core or the Xenon
3XXX series. Has the pins on the motherboard.
Intel Socket 1156The average consumer socket for i3, i5, and i7 processors.
Intel Socket 1155A newer version of the socket 1156. Although it supports
everything the 1156 does, it adds additional support for
SATA III.
Intel Socket 775 Intels first LGA socket. Still a very popular socket. The first
with the CPU pins on the motherboard.
Intel Socket 771 The first Intel socket which allows for the use of dual
processors. Used only for server applications.
AMD Socket AMDs latest consumer socket. Same as AM2+ but uses only
AM3 DDR3 memory.
AMD Socket The most common AMD socket. Supports both AM2 and
AM2+ AM3 processors.
AMD Socket F The latest server socket by AMD. The first socket by AMD
with the pins on the motherboard instead of on the CPU.
Motherboards are usually listed with the socket type as one of the specifications. CPUs
are listed with the type of socket they require. Therefore, picking a motherboard which
will work with a particular CPU mostly consists of checking on the sockets. When in
doubt, it is best to check with the manufacturer of the motherboard in order to see
which processors are compatible with it.
Form Factor
Accelerated Graphics Port) A high-speed 32-bit port from Intel for attaching a display
adapter to a PC. It provides a direct connection between the card and memory, and
only one AGP slot is on the motherboard. AGP was introduced as a higher-speed
alternative to PCI display adapters, and it freed a PCI slot for another peripheral
device. The brown AGP slot is slightly shorter than the white PCI slot and is located
about an inch farther back. AGP was superseded by PCI Express.
Feature of AGP
Peak Bandwidth 4x the PCI bus, and higher sustained rates via sideband
and pipelining.
Direct Memory Execute of textures.
Reduced Contention with the CPU and 1/0 devices for bus and memory
access. The PCI bus serves disk controllers, LAN chips, and possibly video
capture. AGP operates concurrently with and independent from, most
transactions on PCI. Further, CPU accesses to system RAM can proceed
concurrently with the graphics chips AGP RAM reads, because of so-
called out-of-order and queuing hardware support in the chip set, So
inspite of bean- access from the graphics chip, there should be no audio
breakup or other CPU degradation.
An extra port to the graphics chip for memory access, so it can
concurrently read textures from AGP memory while reading/writing Z-
values and pixels from local memory.
Allowing the CPU to write directly to shared system AGP memory when
it needs to provide graphics data, such as commands or animated textures.
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Computer Architecture and Maintenance (G-Scheme-2014) 97
Generally the CPU can more quickly access main memory than it can
graphics local memory via AGP, and certainly faster than via the PCI bus.
Important: AGP and PCI slots are different sizes. Therefore, AGP cards can only be
placed in AGP slots and PCI cards will only fit in PCI slots.
DIME short for Direct Memory Execute, DIME allows for video card to use
some of the main memory for texture memory with 3D graphics.
Usually video cards have 4 MB of RAM, some have 8 MB of RAM, but
DIME allows for 12, 16, or even more memory to be used by allocating
some of the main system memory.
Pipelining As you should know from reading Hennessy and Patterson's 'great'
Computer Architecture book, pipelining is an implementation
technique whereby multiple instructions are overlapped in execution.
A pipeline is just like an assembly line. There are various different steps
(pipe stage or pipe segments) that contribute to the end result. Each of
these steps are done in parallel. The opposite of a pipelined architecture
is a sequential architecture, in which steps are completed sequentially or
one after another, not in parallel.
Sideband the AGP bus uses sideband signals to send addressing information
addressing separately from data. This technique allows addresss informaton to be
presented to the bus concurrent with a data transaction. The result is a
more efficient use of the AGP bus for data transfers. With sideband
addressing, AGP utilized 8 extra "sideband lines" which allow the
graphics controller to issue new addresses and requests
simulataneously while data continues to move from previous requests
on the main 32 data/address wires.
Bandwidth the amount of data a network can transport in a certain period of time -
it is the capacity for the rate of transfer, which is usually expressed in
bits per second.
CMOS Setup
Additional - Information
System Architecture
Microprocessor 8088
Clock speed 4.77MHz
Bus type ISA (Industry Standard Architecture)
Bus width 8-bit
Interrupt levels 8 (6 usable)
Type Edge-triggered
Shareable No
DMA channels 4 (3 usable)
Bus masters supported No
Upgradeable processor complex No
Memory Architechture
Standard on system board 256KB or 640KB
Maximum on system board 256KB or 640KB
Maximum total memory 640KB
Memory speed (ns) and type 200ns Dynamic RAM chips
System board memory-socket type 16-pin DIP
Number of memory-module sockets 36 (4 banks of 9)
Memory used on system board 36 64KB 1-bit DRAM chips in 4 banks of 9, or 2
banks of 9
256KB 1-bit and 2 banks of 9 64KB 1-bit chips
Memory cache controller No
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Computer Architecture and Maintenance (G-Scheme-2014) 102
Wait states:
System board 1
Adapter 1
Standard Feature
ROM size 40KB or 64KB
ROM shadowing No
Optional math coprocessor 8087
Coprocessor speed 4.77MHz
Standard graphics None standard
RS232C serial ports 1 (some models)
UART chip used NS8250B
Maximum speed (bits per second) 9,600bps
Maximum number of ports supported 2
Pointing device (mouse) ports None standard
Parallel printer ports 1 (some models)
Bidirectional No
Maximum number of ports supported 3
CMOS real-time clock (RTC) No
CMOS RAM None
Expansion Slot
Total adapter slots 8
Number of long/short slots 6/2
Number of 8-/16-/32-bit slots 8/0/0
Available slots (with video) 4
System Architecture
Microprocessor 80286
Clock speed 6MHz or 8MHz
Bus type ISA (Industry Standard Architecture)
Bus width 16-bit
Interrupt levels 16 (11 usable)
Type Edge-triggered
Shareable No
DMA channels 8 (7 usable)
Bus masters supported Yes
Upgradeable processor complex No
Memory Architecture
Standard on system board 512KB
Maximum on system board 512KB
Maximum total memory 16MB
Memory speed (ns) and type 150ns Dynamic RAM chips
System board memory-socket type 16-pin DIP
Number of memory-module sockets 18 or 36 (2 or 4 banks of 18)
Memory used on system board 36 128KB 1-bit DRAM chips in 2 banks of
18, or
18 256KB 1-bit chips in one bank
Memory cache controller No
Wait states:
System board 1
Adapter 1
Standard Features
ROM size 64KB
ROM shadowing No
Optional math coprocessor 80287
Expansion Slots
Total adapter slots 8
Number of long and short slots 8/0
Number of 8-/16-/32-bit slots 2/6/0
Available slots (with video) 5
Q.Differences Between PC/XT and AT Systems
Ans.
Systems that feature an 8-bit memory bus are called PC/XT systems after the pioneering
IBM PC and IBM PC/XT. As you can see in Table 2.2, the differences between these
systems and descendents of the IBM AT (16-bit memory bus and above) are significant.
All modern systems fall into the AT category.
Table . Differences Between PC/XT and AT Systems
System Attributes
PC/XT Type 8-Bit 16-, 32-, 64-Bit AT Type
Supported processors All x86 or x88 286 or higher
Processor modes Real Real, Protected, Virtual Real[2]
Software supported 16-bit only 16- or 32-bit[2]
Bus slot width 8-bit 16-, 32-[1], and 64-bit[4]
Slot type ISA only ISA, EISA[1], MCA, PC Card, Cardbus[3], VL-
Bus[3], PCI[3], AGP[4]
Hardware interrupts 8 (6 usable) 16 (11 usable)