How does the 4-bit synchronous BCD counter work?

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How does the 4-bit synchronous BCD counter work?

I can't understand why there is an OR-gate and why the first AND-gate is connected to
Q3 complement ?

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3 Answers

Ron Garrett, High speed electronic digital design. RF experienced and an

amateur radio operator. First article assembly ...
Written Dec 27, 2015
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Without the components you mentioned, the 4-bit counter will count to 16, making it
a hex counter. This combinatorial logic resets the counter when the count reaches Related Questions
"1001" which is BCD "9". Of course, being synchronous, the counter transitions from
"1001" to "0000" on the next rising clock edge. How do I design a 4 bit even synchronous counter
190 Views View Upvotes Answer requested by Aya Mostafa using flip flops?

What are the steps to make 4 bit BCD subtractor

using IC 7483 on a PCB?
Related Questions More Answers Below

Can a 0-9 counter works as a BCD counter?

How do I design a 4 bit even synchronous counter using flip flops?
What is a synchronous counter?
What are the steps to make 4 bit BCD subtractor using IC 7483 on a PCB?
How do I use a 4-bit Johnson counter for BCD
Can a 0-9 counter works as a BCD counter? counting?

What is a synchronous counter? How do we use a 2:1 multiplexer to make a 4 bit

How do I use a 4-bit Johnson counter for BCD counting? binary adder?

How do I make a 4 bit full adder using 74ls83 IC?

Harun iljak, PhD Electrical Engineering & Signal Processing, Assume that a 4-bit counter is holding the count
International Burch University (2015) 0100. What will the count be after 10 pulses?
Written Dec 27, 2015 Upvoted by Shashi Kiran, E&C engineer

First of all, note that J and K are short-circuited, so it's a T flip flop actually. Where do we need to convert gray codes into BCD
codes?
Now, the logic before the inputs of the last flip flop: it is QA QD + QA QB QC so it's
What are the aspects of a synchronous counter?
going to be a one twice: once when QA QB QC is true (which reads 0111=7) and once
when QA QD is true, which will occur at 1001=9. What does this mean? When 0111 is
reached, the or gate will let a logical one enter the last flip flop and change its output

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How does the 4-bit synchronous BCD counter work? - Quora 26/4/17, 9*42 pm

to 1 (remember, it's a T flip flop), getting you to 1000. OK, that's something we'd
expect from any counter, BCD or not. However, the fun part comes once the state is
1001, i.e. 9. The or gate will once again let a logical one pass to the flip flop input and
toggle its output back to 0, making the counter loop back to 0000.

OK, it's not clear from here it's going to loop back to 0000, but it's most certainly
going to lose the one at QD . The one on the QA will be toggled to zero anyway
because the first FF is hard-wired to logical one, so now our logic just needs to prevent
the second flip flop from turning to 1, because we want it to stay a 0 in order to have a
0000 and start everything all over again. That's where that first AND gate you asked
about jumps in. When QD is 1, its complementary output disables the second flip flop
from toggling. That's not disrupting normal counting, since QD will keep the value 1
only for 1000=8 and 1001=9, where QB is not changing. In order to prevent it from

going to 1010=10, we lock it with that complementary Q D and an AND gate.
493 Views View Upvotes

Loring Chien, electrical engineer for 40 years, Sr. Member IEEE

Written Dec 28, 2015

The dierence between a synchronous counter and an asynchronous counter is that

the synchronous counter has a single clock that connects to the edge triggereed clock
of every flip flop so that they change simultaneously.

A asynch counter has a clock input that drives only the lowest bit flip flop and the
output of each stage clocks the next stage.

In the synch version the combinatorial logic is to ensure that the correct next state is
loaded for each previous state. The synchronous counter is much faster as it does not
have to wait for rippling through propogation times.
254 Views View Upvotes

Related Questions

How do we use a 2:1 multiplexer to make a 4 bit binary adder?

How do I make a 4 bit full adder using 74ls83 IC?

Assume that a 4-bit counter is holding the count 0100. What will the count be after 10
pulses?

Where do we need to convert gray codes into BCD codes?

What are the aspects of a synchronous counter?

Can I add a 4 bit number using parallel adder?

How does the 9-bit counter circuit work in the shown circuit?

By applying a DC supply to the induction motor, can it work as a synchronous motor?

How does one design a synchronous counter as a lookup table?

How do I design a sequential circuit with 3 bit up/down counter?

How do I convert HEX to BCD?

How can a synchronous generator be made to work as synchronous motor?

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