A Project Report

On
VLSI IMPLIMENTATION OF AN EFFICIENT
CRYPTO SYSTEM [CONVOLUTIONAL ENCODER]

by
Md Saif H2016124031
Mounesh H2016124024

BIRLA INSTITUTE OF TECHNOLOGY AND SCIENCE, PILANI (RAJASTHAN)

Hyderabad Campus
(NOV 2016)
ABSTRACT:
In the first half of the report focuses on the realization of an efficient logic
design of a crypto system. The type of crypto system considered is
convolutional encoder with a constraint length, K of 3 and a code rate
(k/n) of . The system is realized using Verilog HDL. It is simulated and
synthesized using ISim and Xilinx 9.1 for RTL Design. In the next half of
the report we have used parallel concatenation of the two-recursive
systematic convolution encoder and interleaver to design turbo codes
whose performances in terms of BER is close to Shannon Limit. Later
Puncturing is done on turbo encoder output to improve information rate.
Turbo code is implemented using MATLAB.
Over the years, there has been a tremendous increase in the trends of
digital communication especially in the fields of cellular, satellite and
computer communications. In the digital communication system, the
information is represented as a sequence of bits. The processing is done
in the digital domain. The binary data is then modulated on an analog
waveform and transmitted over the communication channel. The signal is
corrupted by the noise and interference introduced by the communication
channel. At the receiver end, the corrupted signal is demodulated and
mapped back to the binary bits. Due to channel induced impairments, the
received signal may not be a true replica of the transmitted signal; rather
it is just an estimate of the transmitted binary information. The bit error
rate (BER) of the received signal depends on the noise and interference of
the communication channel. In a digital transmission system, error control
is achieved by the use of channel coding schemes. Channel coding
schemes protect the signal from the effects of channel noise and
interference and ensure that the received information is as close as
possible to the transmitted information. They help to reduce the BER and
improve reliability of information transmission.

Block Diagram of a Typical Communication system

Channel Coding:
Channel coding schemes involve the insertion of redundant bits into the
data stream that help to detect and correct bit errors in the received data
stream. Due to the addition of the redundant bits, there is a decrease in
data rate. Thus the price paid for using channel coding to reduce bit error
rate is a reduction in data rate or an expansion in bandwidth.
There are two main types of channel codes
(1) Block codes
(2) convolutional codes

Block Codes:
Block codes accept a block of k information bits, perform finite field
arithmetic or complex algebra, and produce a block of n code bits. These
codes are represented as (n, k) codes. The encoder for a block code is
memory less, which means that the n digits in each codeword depend only
on each other and are independent of any information contained in
previous codeword. Some of the common block codes are Hamming
codes and Reed Solomon (RS) codes. RS codes are non-binary cyclic
error correcting codes that could detect and correct multiple random
symbol errors. A Hamming code is a linear error-correcting code which
can detect up to two simultaneous bit errors, and correct single-bit errors.
For multiple error corrections, a generalization of Hamming codes known
as Bose Chaudhuri Hocquenghem (BCH) codes is used.
Block codes can either detect or correct errors
Convolution Codes:
convolutional codes are designed for real-time error correction. The code
converts the entire input stream into one single codeword. The encoded
bit depends not only on the current bit but also on the previous bit
information. i.e, convolution encoders have memory. They are
represented by Mealy state machines.
Convolutional encoding is considered to be one of the forward error
correction scheme. This coding scheme is often used in the field of deep
space communications and more recently in digital wireless
communications. Adaptive Viterbi decoders are used to decode
Convolutional codes.

Convolution coding with Viterbi decoding is a FEC technique that is

particularly suited to a channel in which transmitted signal is corrupted
mainly by additive white Gaussian noise (AWGN). In most of real time
applications like audio and video applications, the Convolutional codes
are used for error correction.
Design of (2,1) Convolution Encoder :
1
= =
2

= = 3

Diagram showing (2,1) convolution encoder

Generator matrix=[1 + + 2 1 + 2 ]
Hardware design of convolution encoder:

CLK D2 D1 D0 O/P

0 0 0 0 00

1 1 0 0 11

2 0 1 0 01

3 1 0 1 00

4 0 1 0 01

State Diagram representation of Convolution encoder

Proposed Design: Improvement to Convolution codes
The design of a channel code is always a trade-off between energy
efficiency and bandwidth efficiency . Low rate codes having more
redundant bits can usually correct more errors. That means that the
communication system can operate at lower transmit power, tolerate more
interference and noise and transmit at higher data rate. Thus the code
becomes more energy efficient. However, low rate codes also have a large
overhead and have more bandwidth consumption. Also, the decoding
complexity of the code also grows exponentially with code length. Thus,
low rate codes set high computational requirements to the conventional
decoders.
There is a theoretical upper limit on the data transmission rate for a given
bandwidth, channel type, signal power and received noise power such that
the data transmission is error-free. The limit is called the channel capacity
or the Shannon capacity. The formula for additive white Gaussian noise
(AWGN) channel is

< 2 (1 + )

This lead to the introduction of near Shannon capacity error correcting

code known as turbo code.
Turbo Code:
The first turbo code, based on convolutional encoding, was introduced in
1993 where a scheme was described that uses a rate code over an
AWGN channel and achieves a bit error probability of 105 using Binary

Phase Shift Keying (BPSK) modulation at an of 0.7 dB
0

Turbo code is just Concatenation of two or more Convolution codes.

concatenation may be parallel or series. Parallel concatenation is used
more often.
The generic form of a turbo encoder consists of two encoders separated
by the interleaver. The two encoders used are normally identical and the
code is systematic, i.e., the output contains the input bits as well. Turbo
codes are linear codes. A good linear code is one that has mostly high-
weight code words. High-weight code words are desirable because it
means that they are more distinct, and thus the decoder will have an easier
time distinguishing among them.
Typical Turbo encoder consist of
1)Component Convolution encoder which is Recursive Systematic
Convolution encoder.
2)Interleaver.

Recursive systematic Convolution encoder:

The RSC encoder is obtained from the conventional non-recursive non-
systematic convolutional encoder by feeding back one of its encoded
outputs to its input as shown in figure below
RSC
Interleaver:
The choice of the interleaver is crucial in the code design. Interleaver is
used to scramble bits before being input to the second encoder. This
makes the output of one encoder different from the other encoder. Thus,
even if one of the encoders occasionally produces a low-weight, the
probability of both the encoders producing a low-weight output is
extremely small.
There are different types of interleavers
1) Row column interleaver
2) Random interleaver
3) Odd Even Interleaver.
In our Design We have used pseudo random interleaver. This interleaver
uses a fixed random permutation and maps the input sequence according
to the permutation order.
We have used matlab command to implement interleaving.

Example Showing .
Puncturing:
The rate of a parallel concatenation of two systematic convolutional codes
(where the information bits are sent only once, along with the parity bits
of both codes) is again

= +

r = code rate after concatenation

1 = 1
2 = 2

If two convolutional codes both have rate = =


then =

Therefore, to increase the code rate puncturing is used.

Puncturing is also done in many ways. In our design, we have removed
the parity bits at odd position hence decreasing number of parity bits.
Which obviously improves the information rate .
Simulation Results:
1
Output of for convolution encoder in Xilinx
2

Turbo encoder results : Message : 1100

Message : 1101 0110
Discussion on results
After the concatenation of convolution encoder net code rate decreases.
To increase the code rate, we do puncturing there by code rate increases.
Hence information rate increases without degradation of BER
With the use of interleaver the probability of low weight codes decreases
there by making decoding more efficient
These are also the first practical codes to come nearer to the channel
capacity for the code rate at which reliable communication is still possible
while a specific identified noise level is given.
References:
John G.Proakis and Salehi Communications systems Engineering,
2011,pp. 623-625.
Lei -ou Wang, Zhe-ying Li, Design and Implementation of a Parallel
Processing Viterbi Decoder Using FPGA, Artificial Intelligence and
Education (ICAIE), Hangzhou, China, 29-30 Oct. 2010
G S Sukanya,G Kavya, RTL design and VLSI implementation of an
efficient convolutional encoder and adaptive Viterbi
decoderInternational conference on Communication and Signal
Processing, April 3-5, 2013, India
Anjaly Unnikuttan, Rathna M, Rekha P R, Nandakumar R, Design of
Convolutional Interleaver, International Journal of Innovative Research
in Information Security Volume 1 Issue 5 (November 2014)
Claude Berrou,Alin Glaviex, Punya Thitimajshima, Near Shannon limit
Error correcting coding and decoding turbo codes, IEEE International
Communications Conference,1993,France
AndrewJ Viterbi, Convolutional Codes and Their Performance in
Communication Systems, IEEE transactions on communications
technology, vol. com-19, no. 5, october 1971