Mapping Techniques
Mapping Techniques
Usually cache memory can store a reasonable number of memory blocks at any given time,
but this number is small when compared to the total number of blocks in the main memory.
The similarity between the main memory blocks and those in the cache is specified by a
mapping function.
A block of words have to be brought in and out of the cache memory continuously
The mapping techniques are classified as
Direct mapping technique
Associative mapping technique
Fully associative
Consider a cache of 128 blocks of 16 words each.
Consider a memory of 64K words divided into 4096 blocks.
Direct mapping technique
Word Field
Block Field
The block field is used to distinguish a block from other blocks. Its length is 7 bits since
27 = 128.
When a new block enters the cache, the 7 bit cache block field determines the cache
position in which this block must be stored.
Tag Field
It is used to store the high order 5 bits of memory address of the block. These 5-bit (tag bits)
are used to identify which of the 32 blocks that are mapped into the cache.
When memory is accessed, the 7 bit cache block field of each address generated by CPU
points to a particular block location in the cache.
The Higher-order 5 bits of the address are compared with the tag bits associated with that
cache location. If they match, then the desired word is in that block of the cache.
If there is no match, then the block containing the required word must first be read from the
main memory and loaded into the cache.
Advantage
Simplest replacement algorithm
Disadvantage
Not flexible
There is contention problem even when cache is not full
For example, block 0 and block 128 both take only block 0 of cache:
0 modulo 128 = 0
128 modulo 128 = 0
If both blocks 0 and 128 of the main memory are used a lot, it will be very slow
Associative-Mapping technique
Any block can go anywhere in cache.
4095 blocks -> 4095 tag = 212 bit tag
The 12 bits tag are required to identify a memory block when it is resident in the cache.
The high-order 12 bits of an address received from the CPU are compared to the tag bits
of each block of the cache to see if the desired block is present.
Advantage
Disadvantage
The blocks in cache are divided into 64 sets and there are two blocks in each set.
Main memory blocks 0, 64, 128, 4032 maps to set 0 and can occupy either of the two
positions