A PROJECT REPORT

ON
Design & Simulation of 150 WATT S-Band Solid State POWER AMPLIFIER
Submitted in partial fulfillments of the
Requirements for the degree of
M.TECH (Microwave Electronics)
By
DEVRAJ
Roll no-3556
Under the guidance
Of
Mr. SUSHIL KUMAR SINGH (SC D)
DEFENCE ELECTRONICS APPLICATION LABORATORY
DEHRADUN

DEPARTMENT OF ELECTRONICS SCIENCE

UNIVERSITY OF DELHI, SOUTH CAMPUS
NEW DELHI-110021, MAY -2016

DEPARTMENT OF ELECTRONICS SCIENCE

UNIVERSITY OF DELHI, SOUTH CAMPUS
NEW DELHI-110021, MAY -2016

CERTIFICATE
This is to certify that Mr. DEVRAJ, student of Delhi university has successfully completed his
project work entitled DESIGN & Simulation of 150 WATT S-Band Solid State POWER
AMPLIFIER under the partial fulfillment of his Masters degree (M. Tech) Microwave
Electronics from the Department of Electronic science, university of Delhi, south campus, New
Delhi.

Professor Avinashi Kapoor

Professor Enakshi K. Sharma

Internal Guide

Head of the department

DEPARTMENT OF ELECTRONICS SCIENCE

DEPARTMENT OF ELECTRONICS SCIENCE

UNIVERSITY OF DELHI, SOUTH CAMPUS

UNIVERSITY OF DELHI, SOUTH CAMPUS

NEW DELHI

NEW DELHI

AN OVERVIEW
Defence Research & Development Organization (DRDO) works under Ministry of Defence.
DRDO was formed in 1958 from the amalgamation of the already functioning Technical
Development Establishment (TDE) of the Indian Army and the Directorate of Technical
Development & Production (DTDP) with the Defence Science Organization (DSO). DRDO was
then a small organization with 10 establishments or laboratories. Over the years, it has grown
multi-directionally in terms of the variety of subject disciplines, number of laboratories,
achievements and stature. Today, DRDO is a network of more than 50 laboratories which are
deeply engaged in developing Defence technologies covering various disciplines, like
aeronautics, armaments, electronics, combat vehicles, engineering systems, instrumentation,
missiles, advanced computing and simulation, special materials, naval systems, life sciences,
training, information systems and agriculture. Presently, over 5000 scientists and about 25,000
other scientific, technical and supporting personnel back the Organization. Several major projects
for the development of missiles, armaments, light combat aircrafts, radars, electronic warfare
systems etc. are on hand and significant achievements have already been made in several such
technologies.

Introduction to DEAL-DRDO, Dehradun

Its primary function is research and development in the radio communication services for
defense applications. Its mission is development of Radio Communication Systems, Data links,
Satellite Communication Systems; Millimeter Wave Communication systems. DEAL is
committed to provide the required resources, infrastructure and an effective & efficient Quality
Management System for timely completion of the design and development of the products,
which shall be conforming consistently to the stated & implied needs of the user.

Table of contents
Acknowledgements.....................................................................................................................6-6
Abstract.......7-7
List of Figures ............................................................................................................................8-9
1-Introduction ........................................................................................................................10-11
1.1- History of RF devices................................................................................................12-14
1.2 -figure of merit for RF Transistor Design..........................................................................15-16
1.3- future trends of RF-Technology....................................................................................17-17
2- Background information
2.1- Code division multiple Aceess..........................................................................................18-18
2.2- Multi-carrier vs single- carrier configuration....................................................................19-19
3- Power Amplifier
3.1-Power Amplifier ................................................................................................................20-20
3.1(A)-Power Transistors.................................................................................................20-20
3.1(B)-Heat-sinks ....................................................................................................................21-21
3.2-Important parameters of PA design
3.2(A)-PA design considerations..............................................................................................22-22
3.2(B)-Power Amplifier characteristics
3.2(B)-1 Output power.............................................................................................................23-23
3.2(B)-2 output power at 1-dB compression point...................................................................23-23
3.2(B)-3 Power gain(G)............................................................................................................23-23
3.2(B)-4 Efficiency...................................................................................................................24-24
3.2(B)-5 PAE (Power Added efficiency...................................................................................24-24
3.2(B)-6 Linearity.....................................................................................................................24-24
3.2(B)-7 IMD............................................................................................................................25-26
3.2(B)-8 Stability......................................................................................................................26-26
3.3 -PA Classifications
3.3(A)-Linear PAs (class A, B, and AB) .................................................................................27-27
3.3(B)-Switching PAs (class C-F) ...........................................................................................27-29
3.4-Large signal characterization in PA design....30-30
3.4.1-Load pull(LP)......30-30
4.0-Project statements & objective....31-31
4.1- Computer simulations...32-32
4.2- Device selection & Block level design.33-34
4.2.1- Substrate specifications..34-34
4.3-Block diagram of Power Amplifier & Design steps..36-36

5.0- Power Amplifier simulation

5.1- DC Analysis .....37-38
5.2-Stability measurement of Transistor .39-39
5.3- Input matching network & output matching network design40-49
5.4-Stability analysis of complete Power Amplifier50-51
5.5- S-Parameters Analysis...52-52
5.6- Optimization & Tuning.........................52-54
5.7- Harmonic Balance analysis.......55-55
5.7.1-Single Tone Harmonic Balance analysis.55-55
5.7.1(A)- output Power measurement...56-56
5.7.1(B)- output power spectrum..56-56
5.7.1(C)-Power added efficiency......57-59
5.7.2- Two Tone Harmonic Balance analysis...60-60
6.0- Schematic layout of complete power amplifier.61-61
7.0-Conclusion.62-62
REFERENCES...63-63

Acknowledgements
Firstly, I am very thankful to Dr. R.S. Pundir, DIRECTOR, DEAL, Dehradun, who gave me a
chance to do this research work.
I would like also to acknowledge Group DIRECTOR, MR. Ashok Kumar SC- G and Group
Head Mr. Rajendra Singh SC F, for providing me valuable guidance time to time when I start
my research work.
I would like to acknowledge my guide Mr. SUSHIL KUMAR SINGH SC- D a wonderful
researcher and Excellent teacher, who knows how to teach student according to his state of Mind.
Your guidance, encouragements, and continuous patience made it possible to complete this work
successfully. Your judgment is quite good and kept me on track. Thanks to give me your valuable
time for good discussions and create new ideas which are quite helpful.
Special thanks to Mr. Lalit Suthar SC D and Mr. Pankaj SC B for their moral supports to
finish this work successfully.
Hoshiyar Singh kalsi & M.R. semwal both are admirable person, due to his excellent guidance
in my project. Thanks to assist me when I needed. Your help is quite significant for this work.
I acknowledge the whole MILLIMETER METER WAVE Group, DEAL, DRDO at
DEHRADUN.
I am thankful to prof. Enakshi k. Sharma, Head, Department of electronic science, University
of Delhi, south campus for her advice and cooperation.
A special thanks to my Internal guide prof. Avinashi Kapoor, Department of electronic science,
University of Delhi, south campus for his time to time advice and his cooperation.
At the end I would also like to give my special thanks to Mr. Kamlesh Patel, Assistant Prof. at
University of Delhi, South Campus, New Delhi. Your basic knowledge in microwave Active &
Passive circuits design always inspired me.
Date: 20/05/2016
DEVRAJ

Abstract
The emergence of new communication standards has put a key challenge for semiconductor
industry to develop RF devices that can handle high power and high data rates simultaneously.
The RF devices play a key role in the design of power amplifiers (PAs), which is considered as a
heart of base station. From economical point of view, a single wideband RF power module is
more desirable rather than multiple narrowband PAs especially for multi-band and multi-mode
operation. Therefore, device modeling has now become much more crucial for such applications.
In order to reduce the device design cycle time, the researchers also heavily rely on computer
Aided design (CAD) tools.
With improvement in CAD technology the model extraction has become more accurate and
device physical structure optimization can be carried out with less number of iterations. LDMOS
devices have been dominating in the communication field since Last decade and are still widely
used for PA design and development. This thesis deals with the optimization of RF- LDMOS
transistor and its evaluation in different PA classes, such as linear, switching, wideband
applications. For accurate evaluation of RF-LDMOS transistor parameters, some techniques are
also developed in technology CAD (TCAD) using large signal time domain computational loadpull (CLP) methods.
The physical intrinsic structure of RF-LDMOS is provided by Infineon Technologies AG. A
reduced surface field (RESURF) of low doped drain (LDD) region is considered in detail
because it plays an important role in RF-LDMOS devices to obtain high breakdown voltage
(BVDS). But on the other hand, it also reduces the RF performance due to high on-resistance
(Ron). The excess interface state charges at the RESURF region are introduced to reduce the
Ron, which not only increases the dc drain current, but also improve the RF performance in
terms of power, gain and efficiency [4].
The amplifier design was done using a large signal model in ADS software. Typical deviations
from the ideal case are however evident and various factors contributing this result are discussed
in this process. for better correlation of simulation and measurements, accuracy of passive
component models and compensation of voltage drop in power management are both considered
in design process. In 1 dB compression point for the simulated amplifier,51.8 dBm of output
power, power added efficiency of 31.89% is achieved in class AB amplifier.

List of figures: Fig :1.1 -Schematic cross- section of LDMOS technology..13

Fig :1.2- I-V characteristic of LDMOS transistor (a)output characteristic (Drain) (b)Input
Characteristic...15
Fig:3.1.1- some physical looks of power transistor..20
Fig:3.1.2 -showing physical looks of some heat sinks..21
Fig :3.2(A)1- frequency spectrum with communication band..22
Fig:3.2(A)2- A single stage amplifier setup..22
Fig:3.2(B)1- power sweep to study the 1-dB compression point of PA...23
Fig:3.2(B)2- Inter modular distortion(IMD) in the presence of a two carrier input signal25
Fig:3.2(B)3- Two-tone power spectrums with IMD3 and IMD5..25
Fig:3.2(B)4- Illustration of two-tone test results,3rd order input/output intercepts point
(IIP3/OIP3) together with IMD product...26
Fig:3.4.1- Basic diagram of load pulls test setup.30
Fig:4.2.1-block diagram of single stage power amplifier setup..36
Fig:5.1- DC analysis of transistor amplifier....37
Fig: 5.1.1- Results of DC analysis...38
Fig:5.2-stability measurement of transistor amplifier..39
Fig:5.2.1- Result of stability measurement of transistor amplifier..39
Fig:5.3 -complete design Power amplifier setup..45
Fig:5.3.1- Gate bias network.46
Fig:5.3.2-Drain bias network.47
Fig:5.3.3-Input matching network.48
Fig:5.3.4-Output matching network..49
Fig: 5.4.1- Stability analysis of complete Power Amplifier..50
Fig5.4.2 -Result of Stability analysis of complete Power Amplifier.51

Fig:5.6.1- Measurement of S11.53

Fig:5.6.2- measurement of gain of the amplifier...53
Fig:5.6.3- mesurement of S12...54
Fig:5.6.4- mesurement of S22...54
Fig:5.7.1- Single Tone Harmonic Balance analysis setup....55
Fig:5.7.1(A)- output power vs input power...56
Fig:5.7.1(B)-mesurement of frequency spectrum of Power amplifier..56
Fig5.7.1(C)- power added efficiency measurement setup..58
Fig5.7.1C (1)- power added efficiency results....59
Fig5.7.1C (2)-output current vs input power...60

Fig:5.7.2-Two tone harmonics balance analysis setup..61

Fig:5.7.2-Two tone harmonics balance analysis setup result....61
Fig:6- Layout of complete power Amplifier setup......62
List of tables: -

Table -1.1 Comparison among physical properties of semiconductors for RF Applications...14

Table:3.3-shows the PA Classifications Based on Si-LDMOS device.....29
Table: -4.2.1 substrate specification.36
Table: -5.3 Electrical characteristic of Design Power
Amplifier.45

10

1-Introduction
From over 20 years, there has been an increasing demand for personal wireless communications.
This has spurred competition among various providers for greater signal range, increased signal
clarity and multimedia access. Therefore, there is a constant drive within the wireless
communications industry to use the most advanced, yet cost-effective technology available.
Several firms have risen to serve this need, among them is INFINEON TECHNOLOGY.
INFINEON TECHNOLOGY designs and sells a wide range of products, including RF power
transistors typically used in base stations. As part of their product development, INFINEON
TECHNOLOGY has introduced their sixth-generation DUAL GATED Laterally-Diffused MetalOxide Semiconductor (LDMOS) transistor [6]. This transistor design has been used successfully
in previous RF power amplifier designs, but for a 51.8dBm (150W) application it presents
challenging design problems, particularly with respect to video bandwidth. It is therefore the
goal of this project to analyze this new transistor and understand how it can be best implemented
for RF power amplification. While the implementation will be designed to various specifications
such as efficiency, gain and output power, the main objective will be to maximize the devices
video bandwidth i.e. from 1.7-2.1 GHz.
This document describes the approach to this problem and its results. Relevant background
topics that may not be well-understood by a general audience are discussed first. A formal
problem statement with objectives is presented next. Following the project statement, the
projects methodology will be discussed. The methodology will include steps that attempt to
simulate solutions to the problem and reproduce them in a physical form. The results will lead to
conclusions and recommendations for future steps.
Several solid state devices are being used to develop power amplifier circuits including BJTs,
laterally diffused metal oxide semiconductor (LDMOS) transistors, MESFETs, or simply FETs,
both GaAs & indium phosphide (INP) based HEMTs, GaAs based HBTs & silicon carbide
based FETs & GaN HEMTs. Each device technology has its own merits & demerits. Due to
the semi insulating property of GaAs substrates, the matching network & passive components
fabricated on GaAs have lower loss than silicon.
GaAs FET as a single discrete transistor has been widely used in hybrid microwave integrated
circuit (MIC) amplifiers for broadband, medium power, high power & high efficiency
applications [1].

11

Design of amplifiers, in a broad sense, falls into to category as shown here-

AMPLIFIER
LOW NOISE AMPLIFIER

POWER AMPLIFIER

In a low noise amplifier, the transistors input is matched for optimum noise figure & the
transistors output is conjugate matched to 50 system impedance for maximum gain & return
loss (RL) [2].
In a power amplifier, the 50 system impedance is matched to a required load at the transistors
output for maximum power & the transistors input is conjugate matched for maximum gain &
Return loss. In an amplifier, the supply voltage (drain or collector) is applied through an RF
choke or through the biasing circuit, which is usually an integral part of the matching network. In
case of LNA design the amplifier design must be conditional stable while in Power amplifier
design, un-conditional stability is generally required. Power amplifiers are non-linear circuits. [2]
Thus linearization of such circuits is required to minimize distortion. The design of such circuits
can be obtained either by using measured source pull & load pull data or accurate non-linear
models.
The choice of suitable semiconductor technology depends on its performance capability & cost.
For example, at S-band GaAs PHEMT & MESFET devices have superior performance compared
to Si LDMOS transistors, however Si LDMOS technology is mostly used to develop high power
amplifiers on the orders of hundred watts for base station transmitters for cellular networks.
Because the LDMOS is based on well established & low cost Si technology, meeting cost targets
& providing desired gain, linearity, & reliability are not a problem. A power version of the
Mosfet commonly referred to as the LDMOS (laterally diffused metal oxide semiconductor), is
preferred over bipolar transistor because it has better temperature stability, greater reliability, a
more robust structure. Since the channel region on the drain side is lightly doped & is fully
depleted under large drain voltages. LDMOS transistors have very high breakdown voltages [5].

12

1.1 History of RF- Devices

In RF communication system, the power amplifier (PA) is considered a vital component. Its
functionality is directly related with the performance of the RF-devices. The emerging
communication standards demand for high performance RF-devices. Historically, vacuum tubes
were used to amplify the signal. First three terminal (triode) vacuum tubes were reported by Lee
De Forest in 1906. While the basic principle of first solid state semiconductor device was a
Surface field effect transistor (FET), patented by Julius Edgar Lilienfeld in 22nd October 1925.
Later on, Dr. Oscar Heil described the possibility of above theoretical FET transistor (British
patent in 1935) in a realistic way by controlling the resistance in semiconducting material with
an electric field. Bipolar junction transistor (BJT) is considered as first working transistor
reported by John Bardeen, Walter Brattain and Walter Shockley at Bell Labs in California in
1947. Though the theory of the FET transistor was older (~ 20 years) than the BJT, because at
that time good semiconductors and its fabrication process was not mature enough to fabricate
FET devices [7].
First bipolar transistor was made on germanium, but soon silicon replaced the Germanium in
1960 due to ease in fabrication process, by the passivation of SiO2 layers. Meanwhile the Jack
Kilby and Robert Noyce proposed the idea of integrated circuits integration of multiple devices
on a single chip by photolithography to implement multiple layers with specific properties in
1958.
In the beginning, germanium based BJTs were used in communication systems up to 1 GHz
applications. Later on, Si based BJTs enhanced the Operation up to 3 GHz. Meanwhile for
improved performance, III-V compound semiconductors, GaAs, AlP, INP, InSb, AlGaAs, GaAsP
etc., were studied to design the RF devices (BJTs, MESFET, and HBTs etc.). In 1951, Shockley
patented the basic principle of Hetro-junction bipolar transistor (HBT). In 1970s, first GaAs
based BJT was developed for high frequency RF applications to counter the Si -BJTs limitations.
But it had two major problems to cater with. 1) Noise factor due to low mobility of holes in the
p-type base of BJTs, and 2) high cost. In 1980, GaAs based metal semiconductor FET
(MESFET) devices were developed based on the Principle of Schottky diode. It achieved some
commercial success as low noise and medium power transistor and operated up to 12 GHz, but
was still costly.
Today such devices are operating up to 50 GHz. Before1980, the wireless communication system
was mostly used only for broadcasting radio, TV and radars communication both for commercial
and military applications rather than point to- point communication. In 1990, the cellular
communication system brought a new startup of technologies in wireless communication system
by introducing transfer of data and voice conversation together at high operating frequencies.
Hence, we can say that cellular communication systems enhanced the production and
development of the solid state devices rapidly to meet the low cost goals with higher
performance.

13

WHY LDMOS DEVICE-In 1996, laterally diffused metal oxide field effect (LDMOS)
transistor replaced the Si BJTs due to advantages properties such as, low inter modulation,
higher gain & reduced thermal effect. In LDMOS devices, its substrate provides large area
contact to dissipate heat exclusively compare to other devices & this also resulting only two
terminals (gate & drain) left on the top, suitable to reduce the effect of source inductance
enabling the transmission lines easier. This is the reason that LDMOS devices have a dominant
role in the communication field (low frequency applications up to 4 GHz). They are used in RF
amplifier for more than a decade in various systems e.g. HF, UHF and VHF, cellular and
WiMAX base stations [6].

Fig 1.1 Schematic cross- section of LDMOS technology

Channel formed by difference in lateral extension of P -base and N+ source

region.
Both regions self-aligned to left-hand side during ion-implantation.
P-sinker, highly doped, connects source to substrate creating source connected
ground plane.
Shield between gate and drain to reduce feedback capacitance and combat
threshold drift.
LDD region formed by light N-type dopant.
Doping of the LDD region strongly correlated with breakdown voltage.
Better Linearity as a result of shielding.
High electric field at gate edge in LD-MOSFET results in electron injection into
gate oxide leading to threshold drift which deteriorates linearity. Shielding
mitigates.

14

Reduction of feedback capacitance improves linearity.

In recent years, wideband gap (WBG) semiconductors, Sic and GaN, are promising
semiconductors for future RF applications due to their physical properties like high breakdown
electric field, and thermal conductivity etc. Such properties of WBG semiconductors are helpful
to reduce the size of devices and beneficial for portable military applications, where the reduced
size is also important along with high performance. Though GaN devices provide 10 times
higher power density as compare to Si-LDMOS devices, but cost factor is not comparable.
Secondly, high power density is not beneficial until the package of the device can manage the
thermal management properly. Hence GaN devices are mainly focused in the communication
market at those frequencies which are not handled by Si-LDMOS devices. Nowadays, GaN
devices are grown on Si wafers to reduce the cost for commercial aspect, but there is a
compromise on thermal conductivity [1].
Following Table 1.1 shows comparison among physical properties of the different
semiconductors. It shows that future RF devices can be designed on III- V semiconductors, such
as GaAs and GaN, but these devices are not comparable with LDMOS devices below 4 GHz, due
to low fabrication cost.

15

Table -1.1 Comparison among physical properties of semiconductors for RF Applications

1.2 Figure of Merit for RF Transistor Design

Figure of merit (FoM) is a straightforward way to study the performance of a transistor. It
provides the performance comparison of different devices from different manufacturers having
same technology. It is also helpful to compare the technologies based on different
semiconductors (e.g. Si, GaAs and GaN etc.) as well as devices (e.g. MOSFET, LDMOS,
MESFET, HEMTs and HBT etc.). FoM is derived by dc, small-signal and large signal analysis to
analyze the device accordingly to the RF applications.
DC analysis is taken by input (gate) and output (drain) current-voltage (IV) Characteristics as
shown in Fig. 1; dc analysis provides the drain source Breakdown voltage (BVDS), onresistance (Ron), knee voltage (Vk) and trans conductance (gm). The BVDS is shown by circle
in Fig. 1.2(a), while Ron is calculated from the slop of the linear part of the drain current-voltage
(IV) Characteristics (Fig. 1.2(a)). The knee voltage (Vk) of the FET transistor is an important
factor to improve the drain efficiency of the device together with Ron. Because small Vk
provides large swing of RF voltage at the given drain bias.
The trans conductance (gm) of MOSFET in a saturation region is defined by following equation-

16

.1.1

Fig 1.2 I-V characteristic of LDMOS transistor (a)output characteristic (Drain) (b)Input
characteristic
Where Cox is the gate capacitance, n is the channel mobility and Z, L represents the width and
length of the gate respectively. Fig. 1.2(b) shows the gm curve of an LDMOS transistor which is
defined by above equation (ID/VG). (Note: In LDMOS devices, gm curve is reduced in the
Compression region due to low doped drain (LDD) region.
In RF transistor design, the frequency of operation is a key feature which depends on transition
frequency (fT) and maximum oscillation frequency (fmax), extracted through small- signal
analysis. The fT provides how rapidly a transistor can transfer charge in its channel from gate to
drain.
Therefore, the value of fT depends on gate source capacitance (Cgs) and trans conductance (gm)
written as following;

And fmax is defined by unilateral gain (U) of the transistor

17

In principle fmax gives the intrinsic switching speed which depends on high output and input
resistance (Rin). The Rout can be approximated by the slop of the drain current in saturation
region of the transistor from dc I-V characteristics, while Rin is calculated from the real part of
the input Parameter (Y11). The most important FoM in RF- transistor design is its accurate large
signal analysis for optimal bias point selection, which can affect the performance of PAs.
Therefore, PA designers mainly focus on large signal analysis of the RF -transistor and try to
extract an accurate equivalent circuit model. Load -pull (LP) measurement is common to extract
the parameters of the transistor for PA design in terms of RF-output power (Pout), power gain
(G), drain efficiency (d), power added efficiency (PAE) and the distortion behaviors etc. [4].

1.3 Future trends of RF-Technology

RF-technology has a major share in wireless communication market. Today, various commercial
communication standards are in use. For future aspect, there is a need to operate several RF
applications with signal solution having low cost, smaller in size and high market potential.
Therefore, the demand of RF- devices is continuously increasing from the last decade and it will
remain in future as well.
Nowadays, PA designers face new challenges due to rapid enhancement in the cellular
communication technology, for example need to fabricate good RF devices with higher power
levels and operate at higher frequencies but with low cost as well. Thus the future trend demands
an accurate characterization of RF devices both at circuit and device level to enhance the system
performance at an optimal condition in a reduced time. There is also a need to couple the RF
characterization both at circuit and device level in Order to utilize the active device adequately.

18

Technology computer aided design (TCAD) is a versatile tool to design the semiconductor
devices prior to fabrication and its optimization. TCAD software is based on physical models to
describe the active device in terms of the carrier transport equations together with geometrical
limitations. Physical models need larger computational resources compare to the equivalent
circuit models due to a huge set of the transport equations, but provides a valuable insight view
of the device and characteristics to be closely related to the device structure [6].
Today computers having faster clock speed and large capability of data storage in memory
tracks. So, it is possible for device designers to study the devices operation before fabrication in
a reduced time. This may also reduce the number of iterations required for an optimized design,
hence saving the cost.
Therefore, currently PA designers are focusing on TCAD approaches for the large signal analysis
of RF-transistor as an alternate method and its capability has already been demonstrated on
different devices for different communication systems. In this research work, our emphasis is to
establish new TCAD methods that could be useful for the characterization of physical structure
of RF power transistor in PAs design.

19

2-Background Information
2.1 Code Division Multiple Access
As mentioned before, the use of mobile communications has enjoyed continued growth since its
introduction as a technological novelty in the early 1980s. This growth was the motivating factor
in the creation of not only unique cell phone designs, but also communication standards. In 1995,
the Code Division Multiple Access (CDMA, also known as IS-95 or CDMA-1) standard was
introduced by Qualcomm in order to address concerns of increased data within limited
bandwidths.
CDMA uses a different kind of signal processing known as spread-spectrum modulation. Instead
of simply dividing a frequency spectrum amongst users, CDMA assigns each user a distinct
pseudo-random code. This gives all users access to an entire frequency spectrum. To receive a
signal, all a device must do is detect a required code throughout a frequency spectrum and piece
the signal together.
Through CDMA, every user has access to the entire spectrum. Therefore, many more users can
be served by a given number of cell-sites and greater amounts of data can be transmitted within a
given amount of bandwidth. CDMA2000 (IS-2000) is a newer standard that is backwardscompatible with the original IS-95 CDMA and used by major service providers such as Sprint
Nextel Corp. and Verizon Wireless. Given the popularity of this standard and the theory behind
its operation, CDMA will be an important factor as the project progresses.
The amplifier design produced by this project must maintain its functionality throughout the
given frequency spectrum of 1700-2100MHz. Otherwise, it may damage the CDMA signals that
pass through it, causing distortion and reducing signal clarity. Please note that CDMA-1 and
CDMA2000 are not to be confused with other standards such as W-CDMA that, while using
similar techniques, are completely incompatible [6].

20

2.2-Multi-Carrier vs. Single-Carrier Configurations

RF power amplifiers can be implemented in either a single-carrier configuration (SCPA) or
multi-carrier configuration (MCPA). Each implementation has its strengths and weaknesses in a
given application. SCPA operates through a parallel arrangement of amplifiers. Each of these
amplifiers is responsible for signals of one particular carrier. The outputs from each amplifier are
combined to form one, multiple-carrier signal.
MCPA uses the opposite approach. Rather than combining signals after amplification, MCPA
combines signals before amplification so that only one amplifier is required to process the
incoming signals. Therefore, MCPA requires a more powerful amplifier with a broader range of
operating frequencies than that of SCPA.
Now that MCPA and SCPA have been briefly described, comparisons can be drawn. SCPA
configurations require separate amplifiers for each signal carrier. Installation of these multiple
amplifiers will require more physical space compared to MCPA, especially if they are to be
cooled properly. Multiple amplifiers will also increase the overall power consumption of the base
station.
MCPA, on the other hand, reduces the number of amplifiers required by taking in multiple
carriers per individual amplifier. Given a required RF output power, this can reduce power
consumption, therefore lowering operating temperature and increasing the power efficiency of
the base station. Such characteristics explain the popularity of MCPA, especially in more urban
areas where many carrier frequencies are used. However, with MCPA one must consider the
side-effects of multi-carrier signal processing such as Inter-Modular Distortion (IMD), which
will be discussed later in this section.
It should be noted that the amplifier design produced by this project will be designed for MCPA.
Therefore, as the project progresses great care will be taken to ensure that the design operates at
a very wide range of frequencies so as to ensure proper operation given the multiple carriers it
will receive [7].

21

3 -Power Amplifier
3.1 Power Amplifiers
Amplifier circuits form the basis of most electronic systems, many of which need to Produce
high power to drive some output device. Audio amplifier output power may be anything from
less than 1 Watt to several hundred Watts. Radio frequency amplifiers used in transmitters can be
required to produce thousands of kilowatts of output power, and DC amplifiers used in electronic
control systems may also need high power outputs to drive motors or actuators of many different
types. This module describes some commonly encountered classes of power output circuits and
techniques used to improve performance.
The voltage amplifiers can increase the amplitude of a signal many times but may not, on their
own, be able to drive an output device such as a loudspeaker or motor. For example, a voltage
amplifier may have a gain of 100 and be able to amplify a 150mV signal to an amplitude of 15V
and it is quite possible that the amplifier can feed that 15V signal into a load of say 10K, but if
the load is changed to a value of 10, the voltage amplifier would not be able to provide the
extra current needed to maintain an output voltage of 15V across 10.
Likewise, a current amplifier may have a gain of 100 and be able to amplify a 10A signal to
1mA at a very low output voltage, but be unable to supply a 1mA signal at say 10V.In either case
the voltage or current amplifier does not have sufficient POWER (volts V x current I). Voltage
and current amplifiers can make use of small transistors and do not draw large amounts of Power
from the power supply in order to amplify signals by often, very large amounts. However, the
small transistors they use have very tiny junction areas and so cannot handle the power needed to
drive some output devices without overheating [3].
3.1(A) Power Transistors
There is not a clear cut difference between ordinary transistors used in voltage amplifiers and
power transistors, but generally Power transistors can be categorized as those than can handle
more than 1 Ampere of collector (or Drain in the case of FETs) current. Because power
transistors, such as those shown in Fig. 3.1.1 handle larger currents and higher voltages, they
have a different construction to small signal devices. They must have low output resistances so
that they can deliver large currents to the load, and good junction insulation to withstand high
voltages. They must also be able to dissipate heat very quickly so they do not overheat [9].

Fig:3.1.1 some physical looks of power transistor

22

3.1(B) Heat-sinks:
A heat-sink is designed to remove heat from a transistor and dissipate it into the surrounding air
as efficiently as possible. Heat-sinks take many different forms, such as finned aluminum or
copper sheets or blocks, often painted or anodized matt black to help dissipate heat more quickly.
A selection of heat-sinks is illustrated in Fig. 3.1.2. Good physical contact between the transistor
and heat-sink is essential, and a heat transmitting grease (heat-sink compound) is smeared on the
contact area before clamping the transistor to the heat-sink. Where it is necessary to maintain
electrical insulation between transistor and heat-sink a mica layer is used between the heat-sink
and transistor. Mica has excellent insulation and very good heat conducting properties [9].

Fig:3.1.2 showing physical looks of some heat sinks

3.2 Important parameters of PA design:
High performance power amplifiers (PAs) are always demanding in wireless communication
systems with superior linearity and high efficiency, both for narrow and broadband applications.
In PA design, the power performance is directly depending on the RF power-transistor behavior,
which is the key component. Therefore, proper selection of the active transistor is very
important, this means, device should have low on-resistance, high output current, higher drainsource breakdown voltage, low harmonics behavior together with desired operating frequency
and bandwidth.
For optimal PA design, the best approach is to study the real behavior of RF-transistor from
device to circuit level. Usually, RF-designers built an equivalent circuit model of the active
transistor, based on small and large signal. For example, high gain and low noise amplifiers can
easily be designed on the basis of small signal S-parameters because are utilized in the receiver
where the available signal level is low. The large signal analysis is performed in power amplifiers
because it is used in transmitters where high RF power is desired. It is therefore, challenging to
predict an accurate large signal model due to several variables with respect to input RF signal.
The main goal of small and large signal analysis is similar; to obtain proper impedances both at
the input and output ports of device under test (DUT). The difference is only in the impedances
measurement techniques. CurrentVoltage (I-V) characteristics are sufficient in case of small
signal analysis because the signal level is small and close to quiescent or bias points, while in the
case of large signal analysis, techniques, such as passive or active load-pull and two ports large
signal S-parameters characterization etc. are required [4].

23

3.2(A) PA Design Considerations:

RF-transistors play a key role in PA design; therefore, are especially designed to deliver the
desired RF output power, high gain and efficiency. For this purpose, optimization of various
manufacturing process and package parameters has vital role. Normally, high RF output power is
achieved by parallel placing of many transistors (or gate fingers) on a single chip/die and in a
package which is often a gold plate heat sink to remove the generated heat from chip. RF LDMOS transistor is used in this research work, widely utilized in the following
telecommunication bands (e.g. GSM, GSM- PCS, and WLAN 802.11b applications) as shown in
Fig. 3.2(A)1[6].

Fig 3.2(A)1 frequency spectrum with communication band

A single stage amplifier setup is shown in Fig. 3.2(A)2 in which amplifier configuration with
transistor is represented by a box at the center.

Fig:3.2(A)2 A single stage amplifier setup

Usually 30 V dc supply is used for the base station PAs. (Note: High power rating of LDMOS
transistors will be available soon for the base-station applications with 50V dc power supply up
to 1 kW. In normal telecommunication system, IMN and OMN are equal to the characteristics
impedances (normally 50 ohm) [3].

24

3.2 (B) Power amplifier characteristics

3.2(B)1 Output Power
RF- transistor is the most important part, because high output power is always important to
transmit the signal to a long distance. In this way, the number of mobile telephone base stations
is reduced in numbers, and this is one example since mobile telephone is one of the biggest
markets in wireless communication system. This is the reason; why designers are forced to use
the low cost transistor in PA design with higher RF output power. LDMOS devices provide
power in the transmitter for GSM base station in the range 320 640 W.
3.2(B)2 output Power at 1-dB compression point
Compression point 1-dB is referred to the point in output power curve of an amplifier when the
power gain of the amplifier is reduced by 1-dB. This point is often used to define the output
power performance of an amplifier. The gain is constant in the linear region where the input
signal is small to medium. The saturated power at which the power gain is 1 dB less from small
signal regime is called 1-dB compression point this point is illustrated in Fig. 3.2(B)1.

Fig:3.2(B)1 power sweep to study the 1-dB compression point of PA

3.2(B)3 Power Gain (G)
There are various definitions of the power gain such as transducer power gain, unilateral power
gain and operating power gain etc. These definitions are used to understand the critical
phenomena of an amplifier functions. Usually the Power gain or Operating power gain (G) is
mostly considered in the designing of power amplifier, which defines the ratio of the power
delivered to the load and the power supplied to the amplifier. For optimal performance of PAs,
constant gain is important with large input signal span. 15-20 dB of power gain at 2 GHz as
reported for a modern 150 W Si- LDMOS.

25

3.2(B)4 Efficiency
The ability to convert the dc power into RF output power is called the efficiency of the transistor
or amplifier. There are two main definitions widely used in PA design; drain efficiency (D) and
power added efficiency (PAE).
Drain Efficiency (D) is defined by the ratio of the RF output power to dc input power
------3.2

3.2(B)5 Power Added Efficiency (PAE)

This is a useful term to define the efficiency with net boost given to a signal that passes through
an amplifying stage. This is an important parameter in PA design system where dc power is
limited or overall heat dissipation is of prime concern. PAE is defined by-

------3.3
PAE and D is almost same. From eq. (3.2) and (3.3), the efficiency is directly affected from
biasing of the transistor. Theoretically, the efficiency increases with reduced conduction angle
(). For example, class A can have a maximum efficiency up to 50 % ( is 360degree), while
class AB ( is above 180 degree) and C ( is 0 degree) has theoretical values up to 78.5 and 100
% respectively.
3.2(B)6 Linearity
Linearity is an important parameter in PA design; especially in case of new standards in
communication systems. Since by definition, transistor is a nonlinear device, therefore non-linear
behavior is not possible to remove completely. Thus, an amplifier works linearly up to a certain
level of input signal. After this PA operation goes in a compression region and generates
harmonic signals. An additional filter circuit is required to dump such harmonic signals, but
closely spaced signals are not easy to filter out directly and may cause distortion, referred as,
intermediation distortion (IMD).
The compression point shown in fig:3.2(B)1 gives a rough assistance about the maximum
available linear RF output power. For more precision normally a multi-tone input signals are
applied to study the non-linear behavior or IMD products relative to considering the reference
point, typically measured by two-tone test. Two closely tones f1 and f2 with narrow frequency
spacing are simultaneously applied. IMD products are produced whenever a multi-carrier signal
is amplified through a non-linear system. It is very important to minimize IMD products, as they
are the cause of extraneous frequencies found in a devices output signal. Also lower frequency
second-order IMD products can interfere with the DC bias of the transistor, increasing the nonlinearity of the transistor and decreasing efficiency [5].

26

3.2(B)7 Inter-modular distortion products (IMD)

Third-order products can appear at frequencies that are very close to that of the signal carrier,
making them very difficult, if not impossible, to filter out. These third-order IMD products will
require the most attention and will be among this projects most pressing concerns. The best way
to minimize IMD products is to use a stable transistor and operate it in its linear region.
However, in the case of this project, the transistor is being operated in the non-linear region
below the linear range, also known as AB-class operation. AB-class designs sacrifice linearity in
favor of efficiency.
In RF power amplifiers, IMD magnitudes can increase with carrier spacing and can pollute the
output signal significantly as wider bandwidths are explored. Therefore, it is important to
minimize IMD products as much as possible when designing amplifiers for wide bandwidths,
such as the one being designed for this project. The extraneous frequencies that result from the
amplification of a two-carrier signal through a non-linear system are illustrated in Figure 1 below
[6]:

Fig:3.2(B)2 Inter modular distortion(IMD) in the presence of a two carrier input signal
Due to PA nonlinearity, IMD Side bands will appear at the output signal as illustrated in Fig. 3.4

.
Fig:3.2(B)3 Two-tone power spectrums with IMD3 and IMD5
In practice, more side bands often appear at the both sides (e.g. 2nd, 3rd, 5th, 7th and so on), but
normally the designers consider 2nd and 3rd IMDs only, because it lies inside the bandwidth of
the channel and not easy to filtered.

27

Following figure shows 3rd

measurement.

order intercept point based on an idealized two tone

Fig:3.2(B)4 Illustration of two-tone test results,3rd order input/output intercepts point

(IIP3/OIP3) together with IMD product
The designers are trying to suppress IMD levels up to -70 dBc to meet high demand of multi
carrier mobile telephones by increasing the linearity. This is a main reason, linearity received
intense attention. To my knowledge, the maximum reported value of IMD in LDMOS is around
-57 to -60 dBc for WCDMA carrier signal, + 10MHz offset frequency at 2.14 GHz.
3.2(B)8 Stability
The amplifier can become unstable due to the combination of the different load and source
impedances. The cause of instability is the gain to drain coupling, and layout of the amplifier. To
avoid the expansion of inherent device feedback capacitances, the designer embedded 50 ohms
values for source and load to stabilize the transistor operation. Otherwise there is possibility that
the PA can start oscillating.
The stability is usually defined into two types; unconditional and conditional. If |in| and | out|
< 1 for all passive source and load, then the circuit will be Unconditionally Stable, while if |in|
and | out | > 1 for a certain range of passive source and load is called Conditionally Stable. The
stability is also defined by the stability factor (K), for example if[2]

28

If

the amplifier will be unconditionally stable, where

3.3 PA Classification

PAs are mainly divided into two parts; linear PAs (e.g. class-A, B and AB) and non-linear or
switching PAs (Class-C, D, E and F so on). This section described briefly about general
classification of PAs along with their merits and demerits [9].
3.3 (A)- Linear PAs (Class A, B and AB)
Class- A
PA operates for a certain desirable (high) linearity at the expense of efficiency across the full
input and output range. To achieve the full period, Q-point is adjusted at mid of the maximum
drain current (Id). In class-A, peak-topeak sinusoidal voltage is around 2VDD. The maximum
drain efficiency (D) will become 50 %. In practical design, it will be less than 40 %. Class-A
provides linearity at the expense of efficiency and relatively large device stress. Normally, it is
used in lowlevel applications or as early stage of a cascade design.
Class-B
In class B the bias point (Q-point) is adjusted to the output of active device at every half cycle
(50 %) to enhance the efficiency. The drain current (id) is sinusoidal for the first half cycle and
zero for the other half cycle. The efficiency is around /4 = 78.5 %. In practice, it is not possible
to achieve the exact conduction angle () of 1800. Therefore, Class-B is considered as
theoretical and its concept is useful for the classifications. However, some example exits in
Class-B PA operation in form of pushpull amplifiers, which is normally used for audio
applications. The dissipated power is higher in class-A to limit the efficiency, while the Class-B
is not feasible.
Therefore, class-AB PAs represents a reasonable solution to compromise between class-A and B
in terms of linearity and efficiency. In that case, the transistor is normally biased close to
threshold voltage. Today class-AB PAs are famous, and in use for linear PA applications in the
telecommunication technology. LDMOS devices are most favorable up to 3.5 GHz, and mainly
used in this class.
3.3 B- Switching PAs (Class C - F)
Switching PAs are attractive due to high efficiency as well as reducing the operational cost. In
switching PAs, the efficiency is critical instead of linearity, such as in case of Class-C, D E, F or
F-1. The idea of the Switching PA was first proposed by Ewing, G. in 1964.
Class- C:
In this class, RF transistor is switched on for less than half cycle ( < 180 degree); it means
amplifier operates as a switch. A tank circuit is used at the output to create a sinusoid signal. If
assumes at zero, then the current drawn from the device is assumed to be a piece of the input
signal and the output voltage is a sinusoid with a peak voltage to VDD. At this condition, D will
be 100 % and the actual power delivered to the load will be proportional to . The true Class-C

29

is not suitable for trans receivers, because if the D is 100 % then the peak output power, power
handling capability and gain approaches to zero. These entire factors forced to use this class for
less than 100% efficiency in piratical applications (not in an ideal condition).
Class-D:
Utilizes the output power for a half of the period as turned on and remaining half as turned
off (as switching mode). It works similar to push-pull Class-B with two transistors; the only
difference is that the transistors work in switching mode rather than linear amplifications. During
operation, if one transistor goes to zero voltage than other is forced to a voltage of 2VDD, as a
result transistors act like a switch and have D of 100% theoretically. It is also known as digital
amplifier and most favorable with Square wave signals. The power handling capability is around
1/ (0. 32) much better than all above classes). Thus good d can be achieved with less stress on
devices. The only drawback is non-zero saturation voltage has static dissipation in switching
behavior, this is the reason it will perform well below cut-off frequency (fT).
Class- E:
To obtain the ideal high efficiency (100%), the idea of class E amplifier was first presented by N.
Sokal. In such class, high efficiency is obtained along with delivering a good output power which
has an advantage over Class-C PA operation. Class-E deals with finite input and output transition
times by proper load. As discussed in class D, the static dissipation will degrade the efficiency;
therefore, proper harmonic loading is required to force a zero switching for non-zero interval of
time. Hence it exhibits a trade-off between efficiency () and output harmonics. 26 Another
disadvantage of Class-E is large peak voltage that the switch can sustain in the off state (~ 3.56
VDD). The maximum output power will be taken as following:

The power handling capability is quite low ~ 0.098. Due to high switching stress, it is not
implemented gracefully with trend of low power technologies (for example in CMOS
technology). However, Class E has an excellent performance with discrete components.
Class-F or F-1:
The basis of these modes consists of loading the active device output with appropriate
terminations at fundamental and harmonic frequencies to improve efficiency (similar to Class-E).
But, when the drain voltage waveform adds odd harmonics to build the shape of the square wave,
then the drain current waveform will add even harmonics to build the shape towards half sine
wave. In this way, no power is generated at the harmonics there is either no voltage or no current
present before at a given harmonic. Therefore, ideal efficiency (100%) can be achieved together
with desired (high) output power by proper controls of the harmonic loads. Alternately, in case of
class- F-1, the drain voltage can be used for a half sine wave by adding the even harmonics while
drain current creates a square wave. In Class-F, total peak-to-peak voltage is seen to be twice, so
the fundamental component will be equal to (4/ ). 2.VDD. Therefore, the output power
delivered will be:

30

Since, class F or F-1 has no power dissipation in switching behavior; therefore, they are capable
of maximum efficiency and also superior to Class-E due to twice of power handling capability.
At the end, a summary about the state-of-art PA classifications based on Si- LDMOS device is
illustrated in following Table-.

Table:3.3-shows the PA Classifications Based on Si-LDMOS device

There are some other high efficiency classes also exits such as G, H and S etc. Such classes use
different techniques to increase the efficiency. For example, G and H use resonators and multi
power-supply voltage to reduce the power. While Class-S uses a similar switching technique like
class D, and E. All above PA classes directly depends on the performance of power transistor and
design considerations. Each classification of PAs is limited by the physical limitations of the
active devices. For example, in FET devices, there are four fundamental effects forced to deviate
the ideal performance of PAs On resistance

Maximum channel current

Avalanche breakdown

Drain to source breakdown voltage.

31

3.4 Large Signal Characterization in PA Design

To obtain the optimal performance in PA operations, the large signal impedance matching is an
important factor to deliver the maximum power to the load. The well-known established
technique for the large signal characterization is called "Load-pull". It performed under
different signal excitations, power levels and frequencies both in on-wafer or in-fixture setup.
The method also has flexibility in measurement to characterize the transistor at different sizes
and frequencies for an accurate modeling of the transistor [8].
3.4.1 Load-Pull (LP)
Specific impedance terminations are important at the edges of device under test (DUT) to
obtain desired PA design considerations, such as output power, gain, linearity and
efficiency etc. Typical load pull measurements are plotted as contours of equal
performance as function of input and output impedance termination superimposed on a
smith chat. The load-pull contours are in use for the design of solid state power amplifiers
to extract the optimum impedance values. The basic diagram of the load- pull test setup is
illustrated in following Fig. The desired signal is generated by source, while dc supply is
used
to
bias
the
DUT.
Fig 3.4.1 Basic diagram of load pulls test setup
Source and load impedances are obtainable by impedance tuners. A power meter
demonstrates the delivered power to the load. (A simple way of power measurement,
modern sensors provide up to 114 dB dynamic range for CW signals, while for modulated
signal it has 50 dB dynamic range. The spectrum analyzer characteristics show the
behavior of RF signal. Different signal excitations are applied through RF signal source to
create the contours of impedance smith chart for an optimal PA design. In load-pull,
mechanical impedance tuners are used which consist of slab termination lines loaded by
one or more sliding stubs. These mechanical stub tuners have limited range of impedances
due to losses in the tuner reflection co-efficient. Nowadays, modern load-pull systems are
classified into two main types; Passive and Active load-pull.
In Passive load-pull, highly precise electromechanical or PIN diode based tuners are in
use for approaching the accurate matching. The PIN diode based tuners provides much
better repeatability as compare to electromechanical tuners, but also have limited number
of impedance states. Such type of system is capable to measure the RF device up to 100 200 W with 1 Q impedance up to frequency range around 2 GHz. For higher frequencies
like 40 GHz, we have to reduce the power rating up to 20 W. The major disadvantage of
the passive load-pull is that it can't handle those power devices which have optimum
impedance values below than 1 Q.
Active load-pull is a famous method of large signal characterization due to fast speed as compare
to conventional load pull and has possibility to reach the reflection co-efficient > 1, and also

32

compensate the losses of the system in matching the interface of the DUT. The load impedance is
synthesized by sampling the output signal, modifying its phase and amplitude [7].

4. Project statements & objective

As the personal wireless communications industry progresses, there is an increasing demand for
greater signal ranges, better signal clarity and faster access to multimedia content. RF power
amplifier designs must be able to meet these challenges at reasonable cost if they are to be
profitable. Therefore, given todays market demands and state-of-the-art amplifier design
principles, the objective of this project is to analyze high Power RF LDMOS Field Effect
Transistors 340 W, 1805 1880 MHz, PTFB183404E transistor and use it towards the design
of a AB-class RF power amplifier.
The design must meet several exacting specifications, but of particular interest will be to
maximize video bandwidth. Maximizing video bandwidth is best achieved by minimizing Thirdorder Inter-Modular Distortion (IMD3) products. A successful design will keep the magnitude of
these products below -33dBc over a very wide carrier spacing.
The IMD3 performance of the final design will be evaluated by providing a two-tone signal to
the amplifier while it operates at an RF output power level of 51.8dBm (150W). The spacing
between the two tones will be swept to a maximum of 75MHz. The maximum carrier spacing
tolerated by the amplifier will be determined by the point at which IMD3 products exceed
-33dBc (amplitude relative to that of the signal carrier).
The final design must be able to operate in a MCPA configuration within a 75MHz spectrum
between 1805-1880MHz. To this end, the project will follow a logical design process that divides
a complete amplifier topology into sections, or design blocks. Individual design blocks will be
studied and optimized given ideal conditions. The design blocks will then be assembled around
Infineon power transistor model, forming a complete amplifier prototype that can be further
analyzed and optimized for the above criteria.
Analyses will rely on computer simulations using Agilents Advanced Design System (ADS)
and a transistor model provided by Infineon technology. Once complete, the amplifier prototype
will be evaluated in terms of its strengths and weaknesses in amplifying two-carrier CDMA
signals of varying carrier spacing. The complete amplifier will include components such as the
active-bias network and impedance matching networks [10].

33

4.1-Computer Simulations
The methodology of this project can be split into two distinct categories; theoretical computer
simulation and practical circuit performance testing. The theoretical portion utilized Agilents
Advanced Design System (ADS) and will be discussed first. ADS was used to simulate the
circuit in distinct parts. Computer simulation began with the characterization of a transistor
model provided by ADS, then progressed to the analysis of NXPs active bias network. Sparameter tests then allowed for the simulation and development of input and output matching
networks. By time this phase of the project was complete, the entire system was simulated and
analyzed.
ADS TUTORIAL:
ADS are sophisticated circuit simulator and can take a significant time to learn all the complex
feature. ADS can run on a variety of operating systems. Lets discuss some major modes of
operation through ADS. Since the focus of ADS is RF and microwave design, the majority of the
devices in the library is RF and microwave devices. There are however, a few low frequency
FETS and BJTS.If you want to simulate power electronic circuits you should use a more
appropriate package. There are several different simulations that ADS can perform. The
simulation modes we are likely to use in our project are given below.
MODES OF OPERATION:
1. DC ANALYSIS:
The first step in any circuit simulation is the determination of the bias point. This simulation
performs this. It takes into account the non-linear behavior of the transistors & other circuit
elements.
2: AC ANALYSIS:
This analysis performs essentially a small signal analysis of the circuit. A DC analysis is
performed to determine the quiescent point. at this bias point the transistor and other non-linear
circuit elements are linearized. In other words, the transistors are replaced by their equivalent
circuits with resistors, capacitors, inductors and voltage and current sources. This type of
analysis is only appropriate for small signals.
3: S-PARAMETER ANALYSIS:
This is essentially the microwave equivalent of AC analysis and the same comments apply. This
analysis will be frequently used in the project and microwave circuit design.
4: HARMONIC B ALANCE (HB):
When designing a circuit with non-linear elements, usually we are only interested in the
integration of a couple of frequencies. This analysis takes into account the non-linear elements of
the circuit and restricts the analysis to several important frequencies. This is usually faster than
doing a complete transient analysis and then extracting the required information from the
temporal signal by Fourier transform techniques. This is ideal for obtaining an estimate for the
IMD3 products by simulating two tone test measurements [9].

34

4.2 Device selection & block level design

The PTFB183404E and PTFB183404F are 340-watt LDMOS FETs Intended for use in multistandard cellular power amplifier applications in the 1805 to 1880 MHz frequency band.
Features include input and Output matching, high gain and thermally-enhanced package with
Slotted and earless flanges. Manufactured with Infineon's advanced LDMOS process, these
devices provide excellent thermal performance and superior reliability [10].
Features
Broadband internal & output matching
wide video bandwidth
Typical single-carrier WCDMA performance, 1805-1880 MHz, 30 V
Output power = 150 W
o Efficiency = 31%
o Gain = 17 dB
o PAR = 5.5 dB @ 0.01% CCDF probability
Increased negative gate-source voltage range for
Capable of handling 10:1 VSWR @ 30 V, 340 W
(CW) output power
Integrated ESD protection
Excellent thermal stability

35

36

Dual gated LDMOS Device

4.2.1 Substrate Specifications:
Substrate used Ro4350B

37

Dielectric constant
Relative permeability

3.66
1.0

30 mil

Thickness

35 m

Conductivity

5.8e7

TanD

.001

Center frequency
Band

1.9GHz
1.7-2.1 GHz

Table: -4.2.1 substrate specification

4.3: -Block diagram of Power Amplifier & Design Steps:

The input (IMN) and output matching networks (OMN) are parts of the amplifier to reduce
unwanted reflections. Pin is input RF power to the amplifier while PL is the RF power to the
load. in and out are the reflection coefficients at the input and output. Similarly, S and L are
the source and load reflection coefficients respectively. dc biasing network is used to bias the
transistor of an amplifier for a specific performance and class of operation.

Fig:4.2.1-block diagram of single stage power amplifier setup

So we have our amplifier IC to design 150-watt power amplifier. for development of any power
PA the following steps are adapted, which we are going to done & discuss in detail step by step.
Step1: - DC analysis of used LDMOS device for bias point selection.
Step2: -Stability analysis of the amplifier.
Step3: -Design input matching & output matching network with the help of smith utility chart.
Step4: -Check the stability of complete amplifier setup i.e. with I/p & O/P matching network.
Step5: -If found stable then start simulation for measurement of S-parameters.

38

Step6: -If results are not up to the mark then we go through with tuning & optimization of
design power amplifier.
Step7: -For measurement of output power & PAE (power added efficiency) we perform single
tone harmonic balance analysis.
Step8: -Perform two tone harmonic balance analysis of design PA to see the complete
harmonics Spectrum.

5-Power Amplifier Simulation

Step1: - DC analysis of used LDMOS device for bias point selection.
5.1 DC Analysis:
An LDMOS transistor functions much the same way as any other MOSFET device in that it
requires voltage at its gate terminal to effect a current though its channel. The objective
statement defined earlier specified a quiescent drain current (IDQ) of 2.6 A. With this in mind, a
DC analysis was required as a first step in characterizing the transistor assigned to this project.
The purpose of the DC analysis was to sweep the bias voltage at the transistors gate in order to
identify its linear and nonlinear regions. The results of this analysis provided a better
understanding of the bias voltage requirements of the transistor and how it operated at an IDQ of
2.6A. DC analysis of NXPs transistor model was performed in ADS. This was among the
simplest computer simulations to perform as it required only the transistor model, two voltage
sources and a current probe. One voltage source was applied at the transistors drain to represent
the 28V that will be supplied in the complete design. The complete setup and the results of the
voltage sweep can be seen here & result on next page.

39

Fig:5.1 DC analysis of transistor amplifier

Result of dc analysis:

40

Fig: -5.1.1 Results of DC analysis

The graph above clearly illustrates the transistors linear and nonlinear regions as described by
Infineon transistor model. The horizontal axis indicates the swept values of voltage at the
transistors drain. This voltage is commonly referred to as drain -to-source voltage or VdS. The
vertical axis indicates the drain current experienced by the transistor as VGS is swept. It can be
seen that NXPs model predicts a rapidly increasing drain current as VGS exceeds 2.6V with
saturation occurring at around 6.2V. It is highly doubtful that actual transistors will see such a
high voltage in practice, as Infineon specifies that the drain current should not exceed 2.6A. It is
also very doubtful that these transistors will be run in the linear region, as they become very
inefficient when operated linearly.

Step2: -Stability analysis of the amplifier.

5.2 Stability measurement of transistor-:

41

Fig:5.2-stability measurement of transistor amplifier

Result of stability measurement of transistor: -

Fig: -5.2.1 Result of stability measurement of transistor amplifier

From result we have seen that stability factor is greater than one & stability measure consists
positive value for all band i.e. from 1.7 GHz to 2. 1GHz.which is our desire result.
Step3: -Design input matching & output matching network with the help of smith utility chart.
5.3 Input matching network & output matching network design: -

42

We select Z source impedance & Z Load impedance from the given data sheet of Transistor
Amplifier at particular frequency for which we have to design our Power Amplifier circuit. After
that with the help of smith chart utility by using these source & load resistances we find our input
& output matching schematic.
Frequency

Z Source

Z Load

MHz

jX

1730

1.86

-4.25

0.55

-2.78

1768

1.77

-4.06

0.54

-2.66

1805

1.68

-3.88

0.53

-7.54

1843

1.61

-3.70

0.52

-2.43

1900

1.56

-3.53

0.51

-2.32

1918

1.51

-3.37

0.51

-2.21

1955

1.47

-3.22

0.5

-2.11

43

jX

Electrical characteristics at 1900 MHz(Input circuit)

Transmission line

Electrical
characteristics( ,)

Dimension:mils

TL101,129

.017,54.17

W=55.93,L=55.237

TL102

.002,63.89

W=41.4858,L=6.498

TL103,139

0.000,41.75

W=85.118,L=1

TL104

.208,63.89

W=41.4858,L=675.85

TL105

.008,28.85

W=143.8822,L=25.994

TL106

.005,63.89

W=41.4858,L=16.24

TL107,157

.061,8.03

W=662.377,L=198.206

TL108,172

.004,8.03

W=662.77,L=12.9971

TL109,170

.002,8.03

W=662.77,L=6.4985

TL110

.022,32.60

W=121.81,L=71.4844

TL111

.028,49.69

W=64.6724,L=90.9801

TL112

0.000,63.89

W=41.4858,L=1

TL113

.016,49.69

W=64.6724,L=51.9801

TL114

.029,49.69

W=64.6724,L=94.2294

TL115,116,117,118

W=143.882

TL119,120

W=55.93

TL121,141

.013,34.08

W=114.48,L=42.2407

TL122,123

0.000,63.89

W=41.4858,L=1

TL124,156

.014,17.20

W=276.434,L=45.4900

TL125

.013,63.89

W=41.4858,L=42.2407

TL126,139,159

0.000,41.75

W=85.1185,L=1

TL127

.002,63.89

W=41.4858,L=6.498

TL128,130

.013,54.17

W=55.93,L=42.2407

TL131,138

.014,54.17

W=55.93,L=45.4900

TL132,137

0.000,34.08

W=114.48,L=1

TL133,136

0.079,54.17

W=55.93,L=256.69

TL134,135

.008,54.17

W=55.93,L=25.994

TL140

.015,63.89

W=41.4858,L=48.7393

TL142,144

.010,63.89

W1=41.4858,w2=41.48,w3=58.4
8

44

Table5.3: - Electrical characteristic of Power Amplifier

Electrical characteristics at 1900 MHz(Output circuit)

Transmission line

Electrical characteristics

Dimension:mils

( ,)
TL201(taper)

.011,12.30

W1=409.77,w2=111.5,L=35.74

TL202(taper)

.009,5.88

W1=931.01,w2=669.74,L=29.34

TL203

.019,20.93

W=217.51,L=61.7365

TL204

.019,20.93

W1=217.51, W2=217.51 W3=70

TL205, TL230

.003,20.93

W=217.51,L=9.7478

TL206(taper)

.023,3.67

W1=1538,w2=931.01,L=74.73

TL208, TL209

0.000,144.35

W=3.779,L=1

TL210

.055,3.67

W=1538.1968,L=178.7110

TL211

.044,34.72

W=111.51,L=142.96

TL212

.005,47.12

W=70.49,L=16.2464

TL213, TL214, TL239,

TL240

0.000,144.35

W=3.779,L=1

TL215

.066,47.12

W=70.49,L=214.4532

TL216

.014,28.85

W=143.88,L=45.49

TL207

TL217

W1=630,w2=1,w3=630,w4=1

TL218

W1=455,w2=1,w3=455,w4=1

TL219

W1=280,w2=1,w3=280,w4=1

TL220, TL221, TL223,

TL224

.042,20.93

W1=217.51,w2=217.51,w3=217.5
1

TL222

.019,20.93

W1=217.51,w2=217.51,w3=70

45

TL225, TL227

.023,20.93

W=217.51,L=74.73

TL226, TL228

.066,20.93

W=217.51,L=214.4532

TL229, TL232

.028,20.93

W=217.51,L=90.98

TL231, TL233

.097,20.93

W=217.51,L=315.18

TL234, TL235

.019,20.93

W1=217.51,w2=217.51,w3=70

TL236

.019,20.93

W=217.51,L=61.73

TL237

.021,47.12

W1=70.49,w2=70.49,w3=80

TL238(taper)

.009,7.95

W1=669.74,w2=409.7716,L=29.24

Table5.3: - Electrical characteristic of Design Power Amplifier

Smith chart utility:

The Smith Chart Utility facilitates gain, stability, and noise analysis of devices characterized by
scattering parameters. It also enables simple design of lumped and distributed element matching
networks using an intuitive graphical interface.

46

Power amplifier with complete input matching & output matching & bias network: -

47

Fig:5.3 complete design Power amplifier setup

Gate bias network:

48

Fig:5.3.1 Gate bias network

Drain bias network: -

49

Fig: -5.3.2-Drain bias network

Input matching network: -

50

Fig:5.3.3-Input matching network

51

Output matching network: -

Fig:5.3.4-Output matching network

Step4: -Check the stability of complete amplifier setup i.e. with I/p & O/P matching network.

52

5.4: Stability analysis of complete Power Amplifier: After designing gate bias network, drain bias network, input matching & output matching
network we go for stability analysis of complete Power Amplifier setup by drawing sub-circuit
network of all schematic.

Fig: 5.4.1- Stability analysis of complete Power Amplifier

Results of stability analysis of complete Power amplifier setup: -

53

fig5.4.2: -Result of Stability analysis of complete Power Amplifier

Step5: -If found stable then start simulation for measurement of S-parameters.

54

5.5 S-parameters Analysis: so after analysis of complete amplifier setup we found that our PA is stable for the range of 1.7
GHz-2.1 GHz.Now we look at Scattering parameters of design Power Amplifier. These are the
final result after optimization and tuning of complete amplifier setup.
Step6: -If results are not up to the mark then we go through with tuning & optimization of design
power amplifier.
5.6 Optimization & Tuning: In simulation variable setup there is an option to optimize & tuning the Power Amplifier
parameter. We can tune all the parameters but we generally tuned the input matching network &
output matching network parameters & capacitors are also play a great role to get desired result.
After many time tune the parameters of setup like W, L & values of capacitors used I got the
following results. Those are displayed on next page.

S11-

55

Fig5.6.1: Measurement of S11

S21(Gain of Power Amplifier)-

Fig:5.6.2- measurement of gain of the amplifier

56

S12-

Fig:5.6.3- mesurement of S12

S22-

Fig:5.6.4- mesurement of S22

57

Step7: -For measurement of output power & PAE (power added efficiency) we perform single
tone harmonic balance analysis.
5.7 Harmonic Balance analysis:When designing a circuit with non-linear elements, usually we are only interested in the
integration of a couple of frequencies. This analysis takes into account the non-linear elements of
the circuit and restricts the analysis to several important frequencies. This is usually faster than
doing a complete transient analysis and then extracting the required information from the
temporal signal by Fourier transform techniques. Harmonic balance analysis we perform here for
single tone & double tone measurement. Single tone measurement gives us output power,
complete harmonics spectrum, PAE (power added efficiency) This is ideal for obtaining an
estimate for the IMD3 products by simulating two tone test measurements.
5.7.1 Single Tone Harmonic Balance Analysis: The following setup show that how we perform single tone harmonic Balance analysis. We can
see result of this setup on next page.

58

Fig:5.7.1- Single Tone Harmonic Balance analysis setup

5.7.1(A) Output power measurement: -

Fig:5.7.1(A) output power vs input power

5.7.1(B) Output power Spectrum: -

Fig:5.7.1(B)mesurement of frequency spectrum of Power amplifier

59

5.7.1(C) Power added Efficiency measurement: y = PAE (vPlusOut, vMinusOut, vPlusIn, vMinusIn, vPlusDC, vMinusDC, iOut, iIn, iDC,
outFreq, inFreq)
Name

Description

Defaul
Range
t

Type

vPlusOut

output voltage at the positive

terminal

Non
e

(:)

Real,
Complex

Yes

vMinusO
ut

output voltage at the negative

terminal

Non
e

(:)

Real,
Complex

Yes

vPlusIn

input voltage at the positive

terminal

Non
e

(:)

Real,
Complex

Yes

vMinusIn

input voltage at the negative

terminal

Non
e

(:)

Real,
Complex

Yes

vPlusDC

DC voltage at the positive terminal

Non
e

(:)

Real,
Complex

Yes

vMinusD
C

DC voltage at the negative terminal

Non
e

(:)

Real,
Complex

Yes

iOut

output current

Non
e

(:)

Real,
Complex

Yes

iIn

input current

Non
e

(:)

Real,
Complex

Yes

iDC

DC current

Non
e

(:)

Real,
Complex

Yes

outFreq

harmonic indices of the

fundamental frequency at the
output port

Non
e

(:)

Integer
array

Yes

60

Requir
ed

inFreq

harmonic indices of the

fundamental frequency at the input
port

Non
e

Power added efficiency measurement equation for our SSPA: -

61

(:)

Integer
array

Yes

Fig5.7.1c- power added efficiency measurement setup

Power added Efficiency result: -

62

Fig5.7.1C (1)- power added efficiency results

Output current vs input power: -

Fig5.7.1C (2)-output current vs input power

Step8: -Perform two tone harmonic balance analysis of design PA to see the complete

63

harmonics Spectrum.
5.7.2 Two tone harmonics balance analysis: -

Fig:5.7.2-Two tone harmonics balance analysis setup

Result of Two tone harmonics balance analysis: -

Fig:5.7.2-Two tone harmonics balance analysis setup result

6.0- Schematic layout of complete power amplifier

64

Fig6- Layout of complete power Amplifier setup

65

7.0-Conclusion
LDMOS transistors are considered important device in wireless communication
technology for power amplification. It will be remaining in future due to mature silicon
technology, and cost-effective solution.
We optimized intrinsic physical structure of LDMOS transistor in TCAD, and obtained
promising results to enhance the performance of LDMOS devices. The optimization was made
by introducing the excess interface charges at the RESURF of LDD region, which is also
compared with a famous dual-layer surface doping technique (other parameters and dimensions
were the same). 60 % additional enhancement is observed in our optimized LDMOS transistor.
The reason is surface doping technique needs an implanted dose with specific thickness
according to Gaussian phenomena while in case of interface charges, a thin depletion layer is
created at the RESURF. Thus interface charges are more effective than additional n-type
implanted dose in LDD region.
The CLP simulation technique in TCAD is a novel way to study the RF analysis of the
transistor for PA design. It provides extraction of impedances of the active device without
including any parasitic effects, and helpful for PA designers to match the device properly.
Therefore, it can be used to design narrowband, tunable and broadband matching networks. CLP
simulation technique is extended to study the non-linear behavior of RF- power transistors
under a real large signal operation. Through this the nonlinear capacitances of the device are
simulated directly as a load. The CLP technique is also further extended to understanding of
transistor behavior for high efficiency PA operations, such as Class-F. Through these, RFtransistor's response can be studied at different frequencies, and bias points for optimal
performance. These CLP techniques provide an initial ground work to understand the
mechanisms of new and fabricated RF transistors to improve over-all performance of the
system.

66

References: [1]-Cripps, Steve. RF power amplifiers for wireless communication.2006.

[2]-Pozar, David Microwave Engineering. John Wiley & sons,2005.

[3]-I.J. Bahl, fundamentals of RF & Microwave Transistor Amplifiers, John Wiley & sons,
Hoboken, NJ,2009.
[4]- Pieter L.D. Abrie, Design of RF & Microwave Amplifiers & oscillators.

[5]-A TCAD Approach to Design a Broadband Power Amplifier A. Kashif, C. Svensson, S.

Azam, K. Hayat, M. Imran and Q. Wahab Submitted to journal publication.

[6]- New Powerful Envelop Model of Si LD-MOSFET for Device and System Level
Simulations for Power Amplifiers T. Arnborg, T. Johansson, A. Kashif, and Q.Wahab
Proc. of the Giga Hertz 2005, Swedish National Symposium Uppsala, Sweden,
November 7-8, p 139, 2005
[7]-Reduction in on-resistance of LDMOS transistor for improved RF performance
A. Kashif, C. Svensson, and Q. Wahab Electro-Chemical Society (ECS) Transations, Vol. 23,
no. 1, p 413-420, 2009.
[8]-High Power LDMOS Transistor for RF-Amplifiers A. Kashif, C. Svensson and Q. Wahab
Proc. of IEEE 5th Int. Bhurban Conference on Applied Sciences Technology (IBCAST),
Islamabad, Pakistan; January 8-11, p 1-4, 2007
[9]-Agilent presentation on design & simulation of Power Amplifier through ADS.

67

[10]-Data sheet of PTFB183404E, Infineon.

68

69