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CH02 Assignment 2

The raw speed of the microprocessor will not achieve its potential unless it is fed a constant stream of work to do in the form of computer instructions. Branch prediction potentially increases the amount of work available for the processor to execute. The interface between processor and main memory is responsible for carrying a constant flow of program instructions and data between memory chips and the processor.

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317 views

CH02 Assignment 2

The raw speed of the microprocessor will not achieve its potential unless it is fed a constant stream of work to do in the form of computer instructions. Branch prediction potentially increases the amount of work available for the processor to execute. The interface between processor and main memory is responsible for carrying a constant flow of program instructions and data between memory chips and the processor.

Uploaded by

Nidit Shah
Copyright
© © All Rights Reserved
Available Formats
Download as DOCX, PDF, TXT or read online on Scribd
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Computer Organization and Architecture, 10th Edition, by William Stallings

CHAPTER 2: PERFORMANCE ISSUES

TRUE OR FALSE
T

F
1. Year by year the cost of computer systems continues to
rise.

T
F
2. Processors are so inexpensive that we now have
microprocessors
we throw away.
T
F
3. Workstation systems cannot support highly
sophisticated
engineering and scientific
applications.
T
F
purpose

4. The IAS is the prototype of all subsequent generalcomputers.

T
F
5. Cloud service providers use massive high-performance
banks of
servers to satisfy high-volume, hightransaction-rate applications
for a broad spectrum
of clients.
T
F
6. The raw speed of the microprocessor will not achieve its
potential
unless it is fed a constant stream of work to
do in the form of
computer instructions.
T
F
7. Superscalar execution is the same principle as seen in
an assembly
line.
T
F
work

8. Branch prediction potentially increases the amount of


available for the processor to execute.

T
F
performs

9. Raw speed is far more important than how a processor


when executing a given application.

10. The cache holds recently accessed data.

2016 Pearson Education, Inc., Hoboken, NJ. All rights reserved.

Computer Organization and Architecture, 10th Edition, by William Stallings

MULTIPLE CHOICE
1. Multiple parallel pipelines are used in superscalar execution.
A. speculative execution

B. data flow analysis

C. superscalar execution

D. branch prediction

2. The desktop application(s) that require the great power of


todays microprocessor-based systems include all of the above.
A. image processing
C. videoconferencing

B. speech recognition
D. all of the above

3. Branch prediction potentially increases the amount of work


available for the processor to execute.
A. Branch prediction

B. Performance balance

C. Pipelining

D. BIPS

4. The interface between processor and main memory is the most


crucial pathway in the entire computer because it is responsible
for carrying a constant flow of program instructions and data
between memory chips and the processor.
A. main memory

B. pipeline

C. clock speed

D. control unit

5. The cache is a relatively small fast memory interposed between


a larger, slower memory and the logic that accesses the larger
memory.
A. peripheral

B. cache

2016 Pearson Education, Inc., Hoboken, NJ. All rights reserved.

Computer Organization and Architecture, 10th Edition, by William Stallings

C. processor

D. arithmetic and logic unit

6. An increase in clock rate means that individual operations are


executed more rapidly.
A. the same

B. slower

C. with very little change

D. more rapidly

7. A GPU is a core designed to perform parallel operations on


graphics data.
A. MIC
C. GPU

B. ALU
D. PGD

8. A(n) Arithmetic Mean is a good candidate for comparing the


execution time performance of several systems.
A. Composite

B. Arithmetic

C. Harmonic

D. Evaluation

9. Amdahls law deals with the potential speedup of a program


using multiple processors compared to a single processor.
A. Moores

B. Amdahls

C. Littles

D. Murphys

10.
One increment, or pulse, of a clock is referred to as a clock
cycle.
A. clock cycle
C. clock speed

B. clock rate
D. cycle time

2016 Pearson Education, Inc., Hoboken, NJ. All rights reserved.

Computer Organization and Architecture, 10th Edition, by William Stallings

SHORT ANSWER
1. HYPER-THREADING enables a processor to work simultaneously
on multiple instructions by performing a different phase for each
of the multiple instructions at the same time.
2. 3.06 Billion is the ability to issue more than one instruction in
every processor clock cycle.
3. With BRANCH PREDICTION the processor looks ahead in the
instruction code fetched from memory and predicts which
branches, or groups of instructions, are likely to be processed
next.
4. Speculative execution enables the processor to keep its
execution engines as busy as possible by executing instructions
that are likely to be needed.
5. Traditionally found on a plug-in graphics card, a _________ is used
to encode and render 2D and 3D graphics as well as process
video.
6. LITTLES Law applies to a queuing system.
7. The three common formulas used for calculating a mean are
arithmetic, harmonic, and GEOMETRIC.
8. The ARITHMETIC Mean used for a time-based variable, such as
program execution time, has the important property that it is
directly proportional to the total time.
9. The HARMONIC Mean is preferred when calculating rates.
10.
The GEOMETRIC Mean gives consistent results regardless
of which system is used as a reference.
2016 Pearson Education, Inc., Hoboken, NJ. All rights reserved.

Computer Organization and Architecture, 10th Edition, by William Stallings

2016 Pearson Education, Inc., Hoboken, NJ. All rights reserved.

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