FACULTY OF ENGINEERING

AND BUILT ENVIRONMENT

School of Electrical Engineering
and Computer Science

ELEC 4840B

Project No: JK04

Project Title: Design & Development of a Power Line
Communication System
Student Name : ANG KIM SIONG
Student ID

: C3067053

Cohort

: EE206 (EE28)

Supervisor :
Dr Jamil Khan
(UON supervisor)
Mr Lee Kar Heng (PSB supervisor)

SCHOOL OF ELECTRICAL ENGINEERING

AND COMPUTER SCIENCE

ELEC 4840B
Project No: JK04

Project Title: Design & Development of a Power

Line Communication System

10th DEC 2010

ABSTRACT
Nowadays, there are many technologies that have been developed for control
applications. Power line communication (PLC) is one of the technologies that have
proved useful for control applications. It is widely use in home automation, automotive
and internet access applications.
The aim of the project is to design a Power Line Communication Modem Circuit to
control the home appliances between a Host PC and a Slave Application Device.
This report will discuss on the required technology and knowledge involved in the
power line modem design. Hence, information on how the concept of modulation
schemes are introduced, how signal will transmit through the power line and eventually
work plan for the practical design of power line modem will be discussed in this paper.
Also, academic research and study on the performance of the transmission system
was elaborated in detail, such as, by using the Multisim software to validate the design
and component used in the circuitry prior to the building of actual circuitry.
Lastly, a labview software will be used to demonstrate the two power line modem
interact with each other on this communication system, by controlling a lamp from a
PC.

TABLE OF CONTENTS
1.0 Introduction ............................................................................................................................ 1
1.1 Objectives ........................................................................................................................... 4
1.2 Scopes of Project................................................................................................................. 4
1.2.1 Project Planning ........................................................................................................... 4
1.2.2 System Design .............................................................................................................. 4
1.2.3 System verification....................................................................................................... 4
2.0 Literature Review .................................................................................................................... 5
2.1 Source Data and Message Frames ...................................................................................... 5
2.2. Layers, Access Methods and Protocols .............................................................................. 6
2.2.1 Physical Layer and Modulation Techniques................................................................. 6
2.2.2 The Medium Access MAC Layer ................................................................................... 7
2.2.3 Protocols for MAC Layer in Power Line Modems ........................................................ 7
2.3 Characteristics on the Power Line Communication ............................................................ 8
2.3.1 Modulation and Coding for Narrowband Systems ...................................................... 8
2.3.2 Signal Attenuation........................................................................................................ 9
2.3.3 Signal-to-Noise Ratio.................................................................................................... 9
2.3.4 Coupling the Signal onto the Channel........................................................................ 10
2.4 Homeplug Power Line Modem ......................................................................................... 11
2.4.1 Homeplug Transmission Techniques ......................................................................... 12
2.4.2 HomePlug Standard & Comparison ........................................................................... 13
2.5 Other Power Line Modem Standards ............................................................................... 14
2.6 Frequency Allocation by FCC and CELENEC ...................................................................... 15
3.0 Specification of Power line Modem ...................................................................................... 17
3.1 Power Line Modem Hardware .......................................................................................... 17

3.2 Power Line Modem ICs ..................................................................................................... 18

4.0 Detail Design of Power Line Modem .................................................................................... 21
4.1 TDA5051A Modem IC Functional Description and Important Design Parameters........... 22
4.1.1 TDA5051A Transmission Section ............................................................................... 24
4.1.2 TDA5051A Receiving Section ..................................................................................... 26
4.1.3 TDA5051A Clock Section ............................................................................................ 27
4.1.4 TDA5051A Modem Chipset Design ............................................................................ 27
4.2 Interface Circuit Design ..................................................................................................... 28
4.2.1Serial Communication ................................................................................................. 28
4.2.2 Max 232 Level converter............................................................................................ 29
4.3 Power Supply .................................................................................................................... 30
4.3.1 Power Supply Circuit Analysis .................................................................................... 32
4.3.2 Simulation Test (Power Supply) ................................................................................. 34
4.4 Coupling Circuit Specification ........................................................................................... 37
4.4.1 Coupling Circuit Design .............................................................................................. 39
4.4.2 Coupling Unit Circuit Analysis .................................................................................... 40
4.4.3 Coupling Circuit Simulation Test ................................................................................ 41
5.0 Software Development ......................................................................................................... 43
5.1 Labview Design ................................................................................................................. 43
5.2 Implementing the Power Line Modem Control Message Frame on RS232 COM Port ..... 45
5.2.1 Interface message frame ........................................................................................... 45
5.2.2 Preamble .................................................................................................................... 45
5.2.3 Address Field .............................................................................................................. 46
5.2.4 Data Field ................................................................................................................... 46
5.2.5 Stop Bit ....................................................................................................................... 46

5.2.6 Baud Rate ................................................................................................................... 46

6.0 Test Result & Verification ..................................................................................................... 47
6.1 Power Supply Test............................................................................................................. 48
6.2 Modem IC Circuit Test....................................................................................................... 49
6.2.1 Interfacing Two Modem IC Circuit Test ..................................................................... 51
6.3 Coupling Circuit Test ......................................................................................................... 51
6.3.1 Coupling Circuit Test (With 230VAC) ......................................................................... 52
6.4 Modem & Coupling Circuit Test ........................................................................................ 53
6.5 Serial Comms Test between Two Modem ........................................................................ 54
6.6 Distance Test between Two Modems............................................................................... 55
6.7 Full Integrated System Test (Hardware & Software) ........................................................ 57
6.8 Summary of finding during the test .................................................................................. 57
6.9 A Full complete Power Line communication Modem....................................................... 58
7.0 Cost Analysis ......................................................................................................................... 59
8.0 Gantt Chart............................................................................................................................ 60
9.0 Conclusion & Future Development ....................................................................................... 61
9.1 Conclusion ......................................................................................................................... 61
9.2 Future Development ......................................................................................................... 62
Appendix A1: TDA5051A Pin Configuration ................................................................................ 66
Appendix A2: TDA5051A Characteristics-Supply & Transmission Mode .................................... 67
Appendix A3:TDA5051A Characteristics- Reception Mode ........................................................ 68
Appendix A4: TDA5051A Carrier Spectrum ................................................................................ 69
Appendix B: Maxim 232 level converter Specification ............................................................... 70

LIST OF TABLE
Table 1: MAC Layer in Power Line Modems ................................................................................. 8
Table 2: Coupling Components [21] ........................................................................................... 11
Table 3: Comparison table for Homeplug 1.0 & Homeplug AV .................................................. 14
Table 4: Five spectrum bands ..................................................................................................... 16
Table 5: Broadband IC Chipsets .................................................................................................. 19
Table 6: Narrowband IC Chipsets................................................................................................ 20
Table 7: Specification of Power Line Modem Circuit .................................................................. 22
Table 8: Transmission Parameter [2] .......................................................................................... 25
Table 9: Receiving Parameter [2] ................................................................................................ 26
Table 10: Clock Parameter .......................................................................................................... 27
Table 11: RS232/TTL Level Converter ......................................................................................... 29
Table 12: Coupling circuit requirement ...................................................................................... 39
Table 13: Address Field .......................................................................................................... 46
Table 14: Data Field ................................................................................................................ 46
Table 15: Cost Analysis........................................................................................................... 60

LIST OF FIGURE
Figure 1: PLC Enable Electrical Appliance ..................................................................................... 2
Figure 2: Conceptual Block Diagram ............................................................................................. 3
Figure 3 : Project Planning ............................................................................................................ 5
Figure 4: Coupling Circuit Requirement ...................................................................................... 10
Figure 5: CELENEC Frequency Band Allocation [7] ..................................................................... 16
Figure 6: FCC Frequency Band [8] ............................................................................................... 16
Figure 7: Power Line Modem Hardware Design ......................................................................... 17

Figure 8: Typical IC Solution For Power Line Modem [5] ............................................................ 18

Figure 9: Signal & Power Connections for Power Line Modem .................................................. 21
Figure 10: Amplitude Shift Keying............................................................................................... 22
Figure 11: TDA5051A Chipset [2] ................................................................................................ 23
Figure 12: Relationship between DataIN & TXOUT [2] ................................................................... 24
Figure 13: Modem IC Design Circuit [2] ...................................................................................... 27
Figure 14: Serial Port Configuration............................................................................................ 28
Figure 15: Logic state assign to Voltage Level ............................................................................ 29
Figure 16: Interface Design Circuit .............................................................................................. 30
Figure 17: Power Supply [2] ........................................................................................................ 31
Figure 18: Power Supply Equivalent Circuit (IIN) ......................................................................... 32
Figure 19: : Power Supply circuit (Equivalent Circuit Design Using Multisim ............................. 35
Figure 20: Power Supply Simulation Test (Output Voltage) ....................................................... 36
Figure 21: Power Supply Simulation Test (Output Current) ....................................................... 36
Figure 22: Digital Filter ................................................................................................................ 38
Figure 23: Coupling Network Curve ............................................................................................ 38
Figure 24: Coupling Circuit Design [2]......................................................................................... 39
Figure 25: Coupling Circuit Test (Equivalent Circuit Design Using Multisim) ............................. 41
Figure 26: Coupling Circuit Simulation Test (Output Voltage) .................................................... 42
Figure 27: Coupling Circuit Simulation Test (Output Current) .................................................... 42
Figure 28: Master Control Panel (Host PC) ................................................................................. 44
Figure 29: Slave Display Panel (Slave PC) .................................................................................... 44
Figure 30: Bit Pattern at COM Port for character A (1 stop bit, no parity).............................. 45
Figure 31: Preamble .................................................................................................................... 45
Figure 32: Protection Devices for Testing ................................................................................... 48

Figure 33: Power Supply Testing ................................................................................................. 48

Figure 34: DC waveform ............................................................................................................. 49
Figure 35: Modem IC Circuit Test................................................................................................ 49
Figure 36: Modem IC Circuit Test (Test of 115 KHz) ................................................................... 50
Figure 37: Modem IC Circuit Test (Floating Signal) ..................................................................... 50
Figure 38: Modem IC circuit Test (Pull up resistor) .................................................................... 50
Figure 39: Two Modem Circuit Test ............................................................................................ 51
Figure 40: Coupling Circuit Test .................................................................................................. 52
Figure 41: Coupling Circuit Test (AC 230V) ................................................................................. 52
Figure 42: Modem & Coupling Circuit Test (With 230VAC) ........................................................ 53
Figure 43: Serial Comms Test Between Two Modems ............................................................... 54
Figure 44: Serial Comms Test ...................................................................................................... 55
Figure 45: Distance Test between Two modems ........................................................................ 56
Figure 46: Full Integrated System Test ....................................................................................... 57
Figure 47: Full Complete Power Line Communication Modem (Internal) .................................. 58
Figure 48: Full Complete Power Line Communication Modem (External) ................................. 58
Figure 49: A Complete setup power line communication modem test...................................... 59

LIST OF ACRONYMS
Acronyms
PLC

Power Line Communication

FHSS

Frequency Hopping Spread Spectrum

MAC

Medium Access Control

ASK

Amplitude Shift Keying

FSK

Frequency Shift Keying

PSK

Phase Shift Keying

QAM

Quadrature Modulation

CDMA

Code-Division Multiple Access

OFDM

Orthogonal Frequency Division Multiplexing

MOV

Metal Oxide Varistor

TTL

Transistor-transistor level

Project No JK04

ELEC4840B

1.0 Introduction
A Power Line Communication System is a system whereby communication signals
were sent and received on household and industrial 50Hz current-bearing power line.
Power Line Carrier Communication has recently become a popular technology for
home automation and networking. It is because power line is a relatively cheaper and
more robust communication channel used throughout the world except wireless
channel. It is used more commonly used than any other communication channel.
A simple digital communication system usually consists of an encoder and a modulator
on the transmitting side, and a decoder and a demodulator on the receiving side.
However, to support two ways communication (full duplex or half duplex), modem
(modulator/demodulator) devices are designed and used in communication systems
nowadays.
A power line modem is an all-in-one device which consists of an encoder, a decoder, a
modulator, and a demodulator. As the current bearing AC mains power line is used as
a transmission medium, additional coupling circuits are required in power line modems
for better protection, isolation and impedance matching.
Power line modems can be used in various applications; however, the study on the
use of Power Line Modems for this report will mainly be focused on home automation
applications.
The figure 1 below illustrates a typical conceptual view on the use of power line
modem for home automation network.

Page 1 of 51

Project No JK04

ELEC4840B

Figure 1: PLC Enable Electrical Appliance

A general purpose PC serves as the PLC (Power Line Communication) enabled main
control center or a master Node for home automation network. PLC enabled Lamp, air
conditioner, television, and other electrical devices are slave nodes in the network.
From the point of view of a home user, a PLC enabled TV will look exactly the same as
a normal TV as the communication and control unit is embedded within and no
additional wire is required for communication.
The AC power line acts as the communication medium for all the electrical devices and
master control centre a data acquisition, monitoring, and control software will run on
the PC.

Page 2 of 51

Project No JK04

ELEC4840B

Switching on/off the electrical lamps, checking room temperature and controlling the
air conditioner and other various automatic applications can be configured through
proper use of developed software running on PC.
The figure below shows the conceptual block diagram of a PLC enabled electrical
device. It will have a power line modem, a control unit and a normal function unit
internally.

Function Unit

Power Supply

e.g. a TV, or an Air

Conditioning Device

Power Point
Power Line
Modem

Control Unit

Address/Command/
Data
Figure 2: Conceptual Block Diagram

Each node of PLC enabled electrical device will have its own network address. The
Power Line Modem enables the address, command, and data message frames to be
sent over the AC Power Line.
Due to cost constraints, such kind of PLC enabled products could seldom be found in
the consumer market at this moment in time, however, it is likely to see such kind of
systems in the near future.

Page 3 of 51

Project No JK04

ELEC4840B

1.1 Objectives
The objective of this project is to design and develop a low cost narrowband power
line communication module applies in home automation system to control home
appliances. By using the existing power point socket outlet through power line, to
control and regulate the lamp.

1.2 Scopes of Project

The scope of this project consists of three main structure works as shown in figure 3,
which includes project planning, system design and system verification.
1.2.1 Project Planning
Project planning consists of analytical studies and academic research on the existing
technologies of the power line communication system. Conceptual design and also
sourcing for the main component will also be included in this state.
1.2.2 System Design
System design consists of hardware and software design. In hardware design, design
and building of associated circuitry, like coupling circuit, modem IC circuit, level
converter and power supply. These works comprises of derivation of mathematical
model and simulation work. Whereas, the software design, is to design and develop a
Labview application for interfacing between power line modem and PC.
1.2.3 System verification
This will be the last section of the entire project. Full integrated system test of the
power line communication will be conducted and evaluated during the testing, to
validate the performance. Demonstration of the power line communication system will
also be presented.

Page 4 of 51

Project No JK04

ELEC4840B

Figure 3 : Project Planning

2.0 Literature Review

To design a power line modem, a good background of digital communication
techniques and existing standards for power line communication is required. A
literature review has been carried out as per this requirement and summarized as
follows:

2.1 Source Data and Message Frames

The simplest control scheme on a TV or Air Conditioner from host PC will be sending
either ON or OFF command. A low to high digital pulse will be modulated over the
power line in this case and the receiving side will simply demodulate this pulse back
from the carrier and the trigger circuit will then activate ON or OFF operation. This is
not a practical approach as a noise signal may be wrongly interpreted as ON or OFF
signal by the modem circuit.
To prevent false triggering, addresses are given for the PLC enabled devices in home
control network. The figure below shows an example of a message frame which
consists of four fields, preamble, identifying address, data field, and stop bit. When the
host PC communicates with a PLC enabled device, it will put the address of the PLC
enabled device in the address field. The data field in this case will be the ON or OFF
Page 5 of 51

Project No JK04

ELEC4840B

command coded in binary form. The message frame will always start with preamble to
signify the devices that a message is coming and always end with a stop bit.

2.2. Layers, Access Methods and Protocols

Practically speaking, design of the power line modem considers two main layers of the
OSI reference Model as follows:
The Physical Layer, and
The Medium Access Control (MAC) Layer.
2.2.1 Physical Layer and Modulation Techniques
The Physical Layer defines the modulation techniques to transmit data over the power
lines. The accuracy of the data coming from the receiver is determined by the
efficiency of the modulation/demodulation process.
The modulation band selected for power line communications must
meet the required data rate
maximize resistance to various noise interferences occurred in Power Lines
There are three main digital modulation schemes as follows:
Amplitude Shift Keying (ASK)
Frequency Shift Keying (FSK)
Phase Shift Keying (PSK)
For higher data transmission rates, narrower bandwidths, Lower error rates at lower
Signal to Noise ratios, and lower power consumption of modem devices, the following
advanced digital modulation schemes as considered:
1. M-ary Modulation
a. M-ASK
b. M-PSK
c. M-ASK
2. Quadrature Modulation (M-QAM)
Page 6 of 51

Project No JK04

ELEC4840B

3. Spread Spectrum Techniques

a. Frequency Hopping Spread Spectrum (FHSS)
b. Direct Sequence Spread Spectrum (DSSS)
4. Multiplexing Techniques
a. Code Division Multiple Access (CDMA)
b. Orthogonal Frequency Division Multiplexing (OFDM)
Communicating at the power line communication physical layer demands robust
modulation techniques like Frequency Shift Keying (FSK), Code-Division Multiple
Access (CDMA) and Orthogonal Frequency Division Multiplexing (OFDM).
For low cost, low data rate applications, such as power line protection and telemetering, FSK is seen as a good solution. For data rates up to 1Mbps, the CDMA
technique may provide an effective solution. However, for high data applications
beyond that, OFDM is the technology of choice for PLC.
2.2.2 The Medium Access MAC Layer
The MAC protocol specifies as resource sharing strategy i.e. the access of multiple
users to the network transmission capacity based on a fixed resource sharing
protocol. There are generally two categories of access:
Fixed Access Scheme and
Dynamic Access Scheme.
2.2.3 Protocols for MAC Layer in Power Line Modems
No

Protocol

Description
It is a primary/secondary access method in which the primary
station asks the secondary station if it has any data to send.
Arbitration based polling can handle heavy traffic and does
provide QoS guarantees

Polling.

Aloha

These schemes, e.g. token ring, token bus, are efficient under
Token
heavy symmetric loads. However, they can be expensive to
passing
schemes. implement and can cause serious problems with lost
tokens on noisy unreliable channels such as PLs

It is a random access protocol in which a user accesses a

channel as soon as it has data to send.

Page 7 of 51

Project No JK04

ELEC4840B
CSMA with overload detection has been proposed for PLC.
CSMA is a contention based access method in which each
station listens to the line before transmitting data. CSMA is
efficient under light to medium traffic loads and for many lowduty-cycle busty terminals (e.g. Internet browsing).

Carrier
Sense
Multiple
Access
(CSMA)

i. Collision Detection (CSMA/CD) senses the channel for a

collision after transmitting. When it senses a collision, it waits a
random amount of time before retransmitting again. But on
power lines the wide variation of the received signal and noise
levels make collision detection difficult and unreliable.
ii. Collision Avoidance (CSMA/CA). As in the CSMA/CD method,
each device listens to the signal level to determine when the
channel is idle. Unlike CSMA/CD, it then waits for a random
amount of time before trying to send a packet. Packet size is
kept small due to the PLC' s hostile channel characteristics.
Though this means more overhead, overall data rate is
improved since it means less retransmission.

Table 1: MAC Layer in Power Line Modems

2.3 Characteristics on the Power Line Communication

In this section, modulation and coding for narrowband systems will be discussed. Also,
signal attenuation depend on the distance will be briefly describe here. Coupling will
be another important topic for power line communication, will be
2.3.1 Modulation and Coding for Narrowband Systems
The modulation and coding for narrowband (low speed) transmission in the frequency
bands maximum limit will up to 500 kHz. Regulations stated in west Europe
concerning the PLC are described in the EN 50065 standard, an entitled Signaling on
low-voltage electrical installations in the frequency range of 3 kHz to 148.5 kHz. In
this standard guild, it specifies the allowable frequency band and output voltage over
the power lines are used. In accordance to EN50065.1, is also known as CENELEC,
the maximum allowable peak voltage for narrowband signals (i.e. bandwidth of 20dB
less than 5 kHz in width) at 9 kHz will equals to 5V, exponentially decreasing to 1V at
the frequency of 95 kHz . As for the broadband transmitter (i.e. bandwidth of 20dB
more than 5 kHz in width) will be 5 V = 134dB (V).
Page 8 of 51

Project No JK04

ELEC4840B

2.3.2 Signal Attenuation

The signal attenuation in the lower frequency band is assumed to be slowly time
varying. Low transmission frequency less than 500 kHz will not cause standing
waves, thus narrowband fades unlikely to occur. Signal attenuation due to network
loading can be ranging from 40 to 100dB per kilometer.[22] The actual level signal
attenuation is the number of loads connected to the main line which determine the
main parameter. The signal attenuation and distance can considered as approximately
exponential as long as the loads are evenly distributed over the main line. In power
line channel, received signal power can be modeled as a function between transmitter
and receiver with a specify distance.
Signal attenuation for low voltage networks amounts to 100dB/km, including:

Time Dependence - There is strong day/night sensitivity

Frequency Dependence - Frequencies above 100 kHz, an increase of

0.25dB/kHz is reported [13]. Due to transmission line effects, cable longer than
400m, signal attenuation can get very high at certain frequencies. And if above
10 MHz it will be very hard to distinguish the received signal from the
background noise, which ultimately limits the communication distance.

Distance Dependence In practical schemes, a signal attenuation of

100dB/km is often considered [13].

Signal Attenuation over Network Phases Attenuation across phases can be

as high as 40 dB [13]. In conclusion, the signal attenuation for the acrossphase RPC channels is considerably higher than for corresponding in-phase
channels.

2.3.3 Signal-to-Noise Ratio

Signal-to-noise ratio (SNR) [14] is a key parameter when determine the efficiency or
measure the performance in the communications system.
The signal-to-noise ration (SNR) is given as:

Page 9 of 51

Project No JK04

ELEC4840B

SNR =

Re ceivedPower
NoisePower

The result obtain on this parameter is related to the efficiency of a communication

system. The higher the SNR, the better is the communication.
It is often possible to reduce the noise by controlling the environmental. Otherwise,
when the characteristics of the noise are known and are different from the signals, it is
possible to use filters to improve the signal-to-noise ratio. Noise level in the grid can
be reduced, when a filter is installed. This is to block the generated noise from the grid
before entering into the household. However, the cost of implementing such filters is
rather expensive and complex. Select appropriate power communication module with
this capability of improving the signal to noise ratio module is essential for each
household.
2.3.4 Coupling the Signal onto the Channel
The basic function of a coupling circuit in a power line modem is to feature an efficient
high-pass behavior in order to damp the 230V AC, 50Hz signal of the mains, without
attenuating the incoming HF signal. Coupling circuit should be designed to match the
modem communication system and power distribution system. In some cases,
consideration for galvanic isolation and over voltage protection are optionally included
in coupling circuit design.
Power System
Characteristics

Coupling Circuit
o

Low frequency (50Hz)

High power (kW, MW), current
and voltages levels (1~20A,
230V)
Varying impedances, high
amplitudes and time dependent
disturbances

o
o

Conductive
coupling
High pass filter
Galvanic
isolation
(optional)
Over Voltage
protection

Modem Communication System

Characteristics

Higher frequencies (kHz) and very

low power (mW), current and
voltage levels (mA and mV).

Figure 4: Coupling Circuit Requirement

There are two method of connecting the power line communication module into the
network [13]:

Capacitive Coupling: A capacitor is responsible for the actual coupling and the
signal is modulated onto the networks voltage waveform.
Page 10 of 51

Project No JK04

ELEC4840B

Inductive Coupling: An inductor is used to couple the signal onto the networks
current waveform. Inductive coupling some time is rather noisy, however, the
advantage is, no physical connection to the network has to be made. Thus
make it safer to install as compare to capacitive coupling.

When designing the coupling circuit, two major types of components as described in
the table 10 below should be considered. Another important feature to take notes is
the protective coupler circuitry. Inclusive of varistors, zener diodes and also coupling
transformers need to consider in the circuit, which involving current and voltage
transients might also damage the chipset.
Component

Coupling
capacitors

Coupling
transformers

Description
These are extensively used in power line communications, most
commonly to couple the PLC signal to the power line, but also as a
part of more sophisticated, higher-order filters. The requirements
and essential characteristics of coupling capacitors have been
standardized in ANSI C93.1-1972. Coupling capacitors carry the
communication current and thus have to be high-frequency
capacitors (self resonant frequency has to be higher than the
modulation frequency). Conversely, they have to filter the power
voltage (dropped across the component), as well as voltage surges
and therefore need to be high-voltage capacitors. The filtering
characteristics of the coupling capacitors are quite dependent on the
load onto which the waveform terminates.
The main function of the coupling transformers is to provide galvanic
isolation and impedance adaptation, but the coupling transformer
has also to pass the high-frequency communication signal and it has
to be designed as such. The power waveform has a much lower
frequency and much higher voltage level, and the power waveform
has a saturating influence in the order of at least 100000 compared
to the communication waveform. Therefore, the power waveform is
typically first low-pass filtered before entering the coupling
transformer.
Table 2: Coupling Components [21]

2.4 Homeplug Power Line Modem

The Homeplug Power Line Alliance is an alliance with members such as silicon
vendors, networking companies, service providers, utilities and OEM/ODM retailers.
Development of Home Plug Standards has its focus mainly on increasing data rate as
required by emerging technologies like VoIP, HDTV, etc
Page 11 of 51

Project No JK04

ELEC4840B

Homeplug standards [17] are basically to fulfill the requirement of networking and data
communication in the homes and offices to obsolete the need of extra wiring and
networking. Usually in every home there is power line to run different appliances so
homeplug follow this scenario to control communication between different rooms. The
technology developed in homeplug is able to send data, voice and video within
different rooms.
The challenges faced by the Alliance were the way to combat other electrical noise
[15] that exists due to the use of a power outlet to transfer information. Whenever any
appliance is turned on or off, it creates noise that could possibly disrupt data transfer
through the wiring. Another problem that has also been resolved was the lack of
standardization in the market for the digital networking products and technologies.
With the implementation of the IEEEs 1901 broadband power line standard (due for
approval on September, 2010), Homeplug technology has been validated by both
IEEE and the market and was selected as a baseline technology for the standard
since it is the most widely deployed technology. The three major specification
published by Homeplug (Homeplug AV, Homeplug Green PHY and the developing
Homeplug AV2) are all compliant to IEEE 1901 and the Homeplug Power Line
Alliance will be the certifying body for IEEE 1901 products [17].
2.4.1 Homeplug Transmission Techniques
OFDM was adopted by the Homeplug Power Line Alliance [17] because of its
robustness to noise and the fact that it is a parallel data transmission method using a
number of parallel FDM sub-bands. Due to the absence of moving devices in the
power line network, there are no Doppler effect. The other problem is timing offset,
which can be mitigated by offset estimation and compensation.
Spread spectrum signal modulation is different [18]. Since the useful bandwidth in the
power line channel is under 25 MHz, the effect of spread spectrum modulation is
considered limited. Using single carrier modulation on the power line is possible, but
equalizers could be needed to reduce the delay spread effect, but the cost will be
relatively high.
In order to cope with the wide variation in channel conditions, the physical layer
protocol (PHY) for PLC must be adaptive, intelligently using more robust modulation
Page 12 of 51

Project No JK04

ELEC4840B

and coding schemes, with lower data rates as needed. In addition, critical protocol
management information requires high fidelity forward error correction (FEC) coding to
ensure that the protocol functions correctly in the worst case situations [18].
2.4.2 HomePlug Standard & Comparison
The homeplug version v1.0 is designed for low bandwidth and cost effective solution
for the power line communication. The homeplug 1.0 uses 84 sub carriers in the
frequency range of 1MHz to 4.5MHz. So the bandwidth of 3.5MHz is used to adjust all
the sub-carriers carrying different data streams [19]. The feature of FEC is also used
in the homeplug version 1.0. Medium access control is TDMA which provides better
quality of service. This feature is used without the major changing in the hardware
architecture. More work need to be done on the physical and MAC layer of the device,
although continuous research is also being done on network, session and transport
layer [15].
I.

HOMEPLUG 1.0 Standard

It is the first specification standard for connecting devices via phone
lines. A peak PHY-rate of 14Mbps is provided.

II.

HOMEPLUG AV Standard
This standard is designed to provide sufficient bandwidth for HDTV and
VoIP.

III.

HOMEPLUG AV2 Standard

It is the current development standard for the next generation. It offers
Gigabit speed at the physical layer and 600Mbs+ at the MAC layer.

IV.

HOMEPLUG GREENPHY
It is a subset of Home Plug AV standard and a peak rate of 10 Mbps is
provided for this standard that is designed into smart meter and smaller
appliances.

V.

HOMEPLUG ACCESS BPL

A to-the-home broadband access technology is referred to Access
Broadband Power Line (BPL).

VI.

HOMEPLUG Command and Control (CC)

It is a low-speed and low-cost technology.
Page 13 of 51

Project No JK04

ELEC4840B
Homeplug 1.0

Homeplug AV

14
256
128
84
56
4.3 - 20.9
DQPSK4
5.12
50

200
3072
1536
1058
917
1.8 30
1024 - QAM
40.96
75

Bit rate (Mbps)

M (FFT size)
Mc ( # carriers)
Ms ( # usable carriers)
Mc ( # unmasked carriers)
Bandwidth (MHz)
Modulation (highest order)
T0 (useful duration, s)
Sampling Frequency (
Note: M length of the OFDM symbol

Table 3: Comparison table for Homeplug 1.0 & Homeplug AV

2.5 Other Power Line Modem Standards

(i) X10 Communication Protocol Standards
The X10 protocol code formats are compatible in Home Automation Systems and it is
De Facto standard for PLC transmission. X10 is one of the oldest power line
communications and it is a powerful, flexible and fairly inexpensive technology and
similar to the network protocols such as TCP/IP. X10 protocol works across home
power lines and is extremely low-bandwidth. A form of amplitude shift keying (ASK)
technique is used for transmission of information. The basic limitations of X10 protocol
are speed, collisions and signal strength.
(ii) CEBus
Peer-to-Peer communication is used in the CEBus protocol. The power line physical
layer of the CEBus communication protocol is based on spread spectrum technology.
(iii) LONWorks
LONWorks is a networking platform that is built for networking devices over media.
The protocol provides a set of communication services. Unless the topology of the
network is known, the sending and receiving messages over the network are allowed.
Page 14 of 51

Project No JK04

ELEC4840B

2.6 Frequency Allocation by FCC and CELENEC

Frequencies restricted the limitations imposed by the regulatory agencies over the
power line communicating devices. The frequency restrictions imposed by FCC and
CENELEC are shown in figure 4 and 5.
Federal Communications Commission (FCC) and European 17 Committee for Electro
technical Standardization (CENELEC) govern regulatory rules in North America and
Europe respectively.
Power line communication frequency band used in North America from 0 to 500 KHz.
Regulatory rules in Europe are more stringent. The CENELEC standard only allows
frequencies between 3 kHz and 148.5 kHz. This puts a hard restriction on power line
communications and might not be enough to support high bit rate applications, such
as real-time video, depending on the performance needed.
According to this standard the spectrum is divided into five bands based on the
regulations.

Frequency Range

Description

3 to 9 KHz

The use of this frequency band is limited

to energy provides

9 to 95 KHz

The use of this frequency band is limited to energy provides and

their concession holders. Using A-band

95 to 125KHz

The use of this frequency band is limited to the energy

providers consumers; no access protocol is defined for this
frequency band. Using B-Band

125 to 140KHz

The use of this frequency band is limited to the energy

providers customers; in order to make simultaneous operation
of several systems within this frequency band. 132.5KHz was
the centre frequency for multiple access protocol
Page 15 of 51

Project No JK04

140 to 148.5KHz

ELEC4840B
The use of this frequency band is limited to the energy
providers customers; no access protocol
is defined for this frequency band. Using"D-Band".

Table 4: Five spectrum bands

Figure 5: CELENEC Frequency Band Allocation [7]

Figure 6: FCC Frequency Band [8]

Page 16 of 51

Project No JK04

ELEC4840B

3.0 Specification of Power line Modem

3.1 Power Line Modem Hardware
The figure below shows is a general description of a power line modem hardware
design.

KHz or MHz Frequency Carrier

Sink Digital Data

Figure 7: Power Line Modem Hardware Design

Along the transmission path, the source digital data input or output from the
Transmit/Receive Buffer of an Embedded Control Unit or a Host PC Communication
Port is first modulated onto a kHz frequency carrier, and then it is again conditioned
(filtered or amplified) and coupled upon 50Hz 230V AC mains line. The reception part
of the modem demodulates the received digital data back from the modulated carrier.

Page 17 of 51

Project No JK04

ELEC4840B

3.2 Power Line Modem ICs

The figure below shows a typical IC Solution for power line modem

Figure 8: Typical IC Solution For Power Line Modem [5]

The use of power line modem ICs simplifies the power line modem circuitry. The
modulator, demodulator circuits and interfaces to the Host are now all embedded in
single IC chip set. The host controller or PC may write data bytes to the
communication port of the modem IC chip set with the use of level converter.
With the use of power line modem IC, only level converter ICs such as MAX232, a
power supply circuit, analog front end, coupling circuit and sometimes external
oscillator circuits are required to design in a power line modem device. Some
intelligent modem ICs even have inherent error correction, coding/decoding and the
MAC Layer and Physical Layer Management built in a single chip.
The IC solutions available in the market can be one of the two categories:
Broad band chipsets, operating at 1.6Mhz up to 80 MHz frequency
Narrow band ICs, operation at frequencies less than 1 MHz

Page 18 of 51

Project No JK04

ELEC4840B

The table 5 below shows a summary on analysis of available broad band IC chipsets
in the market,

Vendor

Intellon

Part Number
INT6400/INT1400
chipset
Evaluation Board
*INT5130

HomePlug
AV/OFDM/200MBps
INT6400
HomePlug
1.0/OFDM/14Mbps

*Max2986

HomePlug 1.0
/OFDM/14 Mbps

MAX2990EVKITB#

HomePlug 1.0
/OFDM/14 Mbps

Maxim

The Piranha
**Cogency chipset
(CS1100+AD9875.)
*Conexant CX11647
Systems
*DS2

Supported
Homeplug
Version/spec

Associated key
Components

Price

Ethernet Controller/ PCI

to MII or USB to MII

$10.50/chip

Ethernet Controller/ PCI

to MII or USB to MII
MAX2986EVKIT no
detailed data sheet
avaiable

$2500
Obsolete
$9.95/chip
$1500

HomePlug
1.0/OFDM/14Mbps

Ethernet Controller/ PCI

to MII or USB to MII

HomePlug
1.0/OFDM/14Mbps

cannot find detailed info

cannot find detailed

info/ interface
Ethernet(MII),UART,SPI
Note: * Technical data not available, ** No response from supplier
DSS9010

200 Mbps Home

Network

Table 5: Broadband IC Chipsets

The broad band chipsets have complex interfaces to host like MII (Media Independent
Interface) to support higher data rates. The costs of ICs and evaluation boards are
relatively higher than narrow band chipsets. The technical and sale support provided
by these suppliers are relatively poor. This could be that they are not keen to support
student project and they have minimum order quantity of these chip sets. Also, the
most important factor is that the technical datasheet is difficult to obtain.
Narrow Band chipset have simpler interfaces to the host. The cost of ICs and
evaluation boards are lower. Most importantly, the technical datasheet is available and
Page 19 of 51

Project No JK04

ELEC4840B

easy to obtain which simplifies our design work. Table 5 below shows a few narrow
band ICs

Vendor

ST

Ariane
Controls

Model

Supported
HomePlug
Version/spec

ST7540

Up to 4.8kbps
using FSK
EVALST7540-2 : BOARD EVAL
ST7540 PWR LINE TXRX

USD16.32

PLM-1

USD12.50

Up to 30kbps
using FSK
AC-EDP6 evaluation kit

Phillips

TDA5051AT

Yitran

0.625 to
7.5kbps using
DCSK
IT800
(Differential
Code Shift
Keying)
IT800(Evaluation Kit)

*Echelon

Cost

PL3120

ASK
modulation, with
data rate of
1.2kbps

USD157

USD500
USD10.50

USD10.20

USD1500

FSK modulation
with data rate of
5.4kps

Note: ** No response from supplier

Table 6: Narrowband IC Chipsets

TDA5051A is selected for this power line modem design project as it is a low cost but
efficient IC with convenient UART interfaces. The others advantage is the availability
of technical datasheet and lead time for purchasing the parts which can source locally
easily.

Page 20 of 51

Project No JK04

ELEC4840B

4.0 Detail Design of Power Line Modem

The design of power line modem is divided into 3 main sub units, which inclusive of
digital unit, power supply and coupling circuit. This is to ease off verification and
troubleshooting during the design process.
These main sub units are as follow:1. Digital Unit which consists of:
a. TDA5051A Modem IC Circuit
b. Interface Circuit
2. Power Supply
3. Coupling Circuit
The figure 9 below shows the signal and power connections between three subunits:

Figure 9: Signal & Power Connections for Power Line Modem

Page 21 of 51

Project No JK04

ELEC4840B

Table 7 below summarizes the specifications of power line modem circuit:

Power Line Modem IC

TDA5051A

Carrier Frequency

115 kHz (CELENEC B Band) using 7.3728MHz

crystal

Modulation

Amplitude Shift Keying (ASK)

Coupling Circuit

Direct Connection to mains (capacitive coupling)

Interface Circuit

Direct Interface to PC via RS232 COM Port

Range

100 meters (to be verified from practical

experiments)
Table 7: Specification of Power Line Modem Circuit

4.1 TDA5051A Modem IC Functional Description and Important

Design Parameters
TDA5051A is a modem Integration circuit chipset, operates from a 5VDC supply. This
dedicated to transmit data over a power line network by means of any two wire
networks in exchanging information. The modulation scheme is used Amplitude Shift
Keying (ASK) carrier technique with a data baud rate of 600 or maximum of 1200. In
this amplitude modulation technique, the modulation signals for binary 1 is equal to the
amplitude of the carrier frequency and is 0 for binary 0 as shown in figure 10.
Amplitude shift keying (ASK) is also called as on & off keying because of this unique
property.
a (t) = { A Cos (2ft) Binary 1 }
0

Binary 0

Figure 10: Amplitude Shift Keying

Page 22 of 51

Project No JK04

ELEC4840B

With the help of few components connect externally which used for decouple
purposes. Also as a form of protection on the chipset against overvoltage surge and
negative transient signals. A standard quartz crystal will used to connect on-chip
reference oscillator which required set the operating frequency known as carrier
frequency in transmission mode and receiving mode which known as detection
frequency. The chip is based on the automatically tuned filters for transmit and
receive.
All inputs and outputs signal are compatible with TTL/CMOS feature, which provide
easy connection to the interface hardware inputs & outputs port. For more detail on
TDA5051A modem IC specification refer to appendix A1

Figure 11: TDA5051A Chipset [2]

Note: Power-down input (pin PD) is active HIGH; this means that the power consumption is at
minimum when pin PD is HIGH. All functions are disabled, except clock generation.

In this TDA5051A chipset, it can divide them into 3 major sections which make up a
complete modem IC. All these 3 major sections will be discussed in the next following
topic on their functionality and operation.
1. Transmission Section
2. Reception Section
3. Clock Section
Page 23 of 51

Project No JK04

ELEC4840B

4.1.1 TDA5051A Transmission Section

In this design a 7.3728MHz standard crystal was chosen for the modem IC circuit,
which gives a carrier frequency of 115 KHz.

f CR =

f OSC
64

7.3728 10 6
= 115 KHz
64

Transmission Section of the chip is designed in such a way that whenever the data
signal at DataIN pin (pin 1) is LOW, a burst of carrier frequency 115KHz is generated at
TXOUT pin (pin 10) as shown in the figure 11 the relationship between DataIN and
TXOUT. TXOUT pin is in a high-impedance state as long as the device is not transmitting.
Modulation is performed internally by control logic, ROM and digital to analog
conversion section. The carrier frequency is generated by scanning the ROM memory.
The power output stage can feed a 120 dBV (RMS) signal on a typical 30 load.

(1) tW ( DI ) > tW ( DI )(min)

(2) q tW ( DI )(min) = t SU +

1
f CR

(3) tW ( DI )(min) < t SU wrong operation

Figure 12: Relationship between DataIN & TXOUT [2]

Page 24 of 51

Project No JK04

ELEC4840B

Table 8 below shows the parameters of transmission section essential for modem
design:
Parameter

Value

V IH (HIGH-level
input voltage @
DATA IN pin 1)

1.9V~5.5V

V IL (LOW-level
input voltage @
DATA IN pin 1)

0.5V ~0.9V

t W (DI)(min)
[minimum pulse
width@ DATA IN
pin 1]

190 us (typical @
fosc = 8.48 MHz)

Remark
These parameters are calculated at Vcc =
5V. This characteristics should be
considered in the interface circuit design to
TDA5051A DATA_IN pin

The minimum pulse width of data signal sets

the limit on the baud rate of interface circuit
to TDA5051A DATA_IN pin that it should be
less than 5263 bits per second. More details
will be worked out from practical
experiments

Vo(rms) output
carrier signal @ pin
10
(RMS value)

120 - 122 dBV

DATA_IN = LOW;
ZL = CISPR16

Io(max) power
amplifier maximum
output current @
pin 10 (peak value)

160 mA

DATA_IN = LOW;
ZL = 1

ZO output
impedance of the
power amplifier

VO output DC level
at pin 10

2.5 V

NIL

The output of the power stage (TX_OUT)

must always be connected to a decoupling
capacitor, because of a DC level of 0.5VDD
at this pin, which is present even when the
device is not transmitting

Table 8: Transmission Parameter [2]

Page 25 of 51

Project No JK04

ELEC4840B

4.1.2 TDA5051A Receiving Section

The output of receiving section is the DATAOUT pin (pin 2) which will remain LOW as
long as a burst is received at RX pin (pin 14). The signal pin (RXIN) is a high
impedance input which has to be protected and DC decoupled for the same reasons
as with pin TXOUT. The high sensitivity of (82 dBV) as mention in the datasheet of this
input requires an efficient 50 Hz rejection filter
Table 9 below shows the parameters of receiving section essential for modem design:
Parameter

Value

V OH (HIGH-level output
voltage@ DATA OUT pin,
pin 14)

> 2.4V

V OL (LOW-level output
voltage@ DATA OUT pin,
pin 14)

<0.45V

V I (rms) analog input

signal @ RX pin, pin 14
(RMS value)

82 - 122 dBV

Z I input impedance@ RX
pin, pin 14

V I DC level at pin RX IN

Remark

I OH = 1.6 mA , I OL = 1.6 mA

This parameter is considered in designing

coupling circuit

50k

2.5 V

The signal pin (RX IN ) is a highimpedance input which has to be

protected and
DC decoupled for the same reasons as
with pin TXOUT

Table 9: Receiving Parameter [2]

Page 26 of 51

Project No JK04

ELEC4840B

4.1.3 TDA5051A Clock Section

The table 10 below shows the parameters of clock section essential for modem design
which need to take into consideration when selecting the crystal (clock):
Parameter

Value

f OSC oscillator frequency

115KHz

f OSC /f CR ratio between

oscillator and
carrier frequency

64

f OSC /fCLKOUT ratio between

oscillator and
clock output frequency

Table 10: Clock Parameter

4.1.4 TDA5051A Modem Chipset Design

In TDA5051A chipset, PD pin (pin 15) should be pulled to ground to disable Power
Down Mode. And because the microcontroller will not be used in this design, thus the
clock output pin (pin 4) can be left out open. Supply voltage +5VDC are connected to
pins 3, 11 and 13 (VDDD, VDDAP, and VDDA) of TDA5051A. Pin 5, 9, and 12 (DGND,
APGND, and AGND) are all connected to Ground.
As per recommendation from TDA5051A datasheet [2], a 2.2 mega ohms resistor are
connected parallel with 7.3728 MHz standard crystal with two 22pF capacitors in
series to the ground to form a clock circuit.

Figure 13: Modem IC Design Circuit [2]

Page 27 of 51

Project No JK04

ELEC4840B

4.2 Interface Circuit Design

4.2.1Serial Communication
Data transmission from computer using graphical user interface (GUI) to power line
communication modem via the serial communication, and this connection is based on
Electronic Industries Association (EIA232). DTE and DCE should be very familiar from
this EIA232 standard, which represent by Data communication Equipment (DCE) and
Data Terminal Equipment (DTE) respectively. These terms are used to indicate the
pin-out for the connectors on a device and the direction of the signals on the pins. The
computer is a DTE device, while most of other devices are usually DCE devices that
go with the current project, where the power line communication modem is a DCE
device.

Pin

Mnemonic

DCD

Signal

Direction

Received line signal

DTE <=

RD

Receive Data

DTE <=

TD

Transmit Data

DTE =>

DTR

Data Terminal Ready

DTE =>

Gnd

Signal Ground

DSR

Data Set Ready

DTE <=

RTS

Request To Send

DTE =>

CTS

Clear To Send

DTE <=

RI

Ring Indicator

DTE <=

Figure 14: Serial Port Configuration

Page 28 of 51

Project No JK04

ELEC4840B

Serial port on the computer generate serial signal voltage level in form of RS232 from
-3V to -25V with respect to signal ground (pin5) will assign as logic 1 (Mark).
Whereas voltages level from +3V to +25V will assign as logic 0 (Space). The
voltages range between -/+3V is considered a transition region for which a signal state
is not assigned.

Figure 15: Logic state assign to Voltage Level

4.2.2 Max 232 Level converter

TDA5051A modem IC chipset will be used for direct interface with RS232/TTL level
converter from the modem to computer serial port. The Max232 from Maxim is used
as the heart of RS232/TTL level converter. This Max232 IC provides the best noise
reduction and also very reliable again discharge and short circuit. Also, its low power
consumption logic can operate in the range of 0V and +3.3V or even lower voltage.
The purpose of using this level converter in this design is to covert TTL logic which
operate between 0V to 5V into RS232 which having the operating voltage from -15V to
+15V.Whereby the voltage level operate for DataIN & DataOUT from the modem IC
chipset is about 2.5VDC. By doing that, modem IC chipset will not be damage with
these high level voltage.
RS232

TTL

Logic

-15V ..-3V

+2V ....+5V

High

+3V..+15V

0V...+0.8V

Low

Table 11: RS232/TTL Level Converter

Page 29 of 51

Project No JK04

ELEC4840B

Basically these Max232 provides 2-channel that covert +5V to +/-10V for RS232
operation. Capacitor (C1) will used in the first converter to double the +5V input to
+10V on capacitor (C3) at the V+ output. The second converter uses capacitor (C2) to
invert +10V to -10V on capacitor (C4) at the V- output [23]. For more detail of this
max232 IC chipset, kindly refer to the Appendix B

Figure 16: Interface Design Circuit

4.3 Power Supply

Instead of using a 9V battery pack going into the voltage regulator to obtain the 5VDC
source to power the modem. AC power supply will be designed to power the modem
circuitry. The reason is being, when using a 9V battery pack once the voltage drop
below 6.5VDC, the supply voltage after the voltage regulator drop to below 4.5V. The
modem chipset will not be able to operate when the supply voltage is less than
4.75VDC according to the datasheet [2]. This problem will encounter during the testing
of modem chipset. Also, another disadvantage of using the battery source is there
wont be any indication/notification to the user when voltage fall below the threshold
value, the user will only aware or notify when the modem stop operation
(transmit/receive). Despite it will provide a pure DC source for the modem. On the
other hand, the advantage of using battery pack is, when using the modem it need not
to turn on the power source to power up the modem, thus it help to save some energy.
Page 30 of 51

Project No JK04

ELEC4840B

However, after considering all this pro & con, having a reliable source is still an
essential for this device to prevent this constraints. After all, the consumption for this
entire device will not exceed 76mA [2], thus the energy usage is very low. AC power
supply would be the most ideal choice instead of battery source.
This AC power supply circuit will be fed in with 230VAC and eventually step down and
covert to 5VDC with the help of voltage regulator and few components act as half
wave rectifier. In this power supply, it consists of primary and secondary protection.
Secondary protection consists of the metal oxide varistor (MOV), rated at 230VAC for
the power line operation. This MOV will be able to limit the overvoltage spikes which
might damage Capacitor (C1). Whereas a primary protection includes an extra fast
fuse connected before the MOV, this is to overcome the long and severe overvoltage,
so that the fuse will be destroyed before the MOV.
Capacitor (C1) is used to discharge high voltage, whereas to R1 & L1 is connected
before the rectifier to prevent current surge during power up. And with D2 and C2 in
place, it provides a minimum voltage 28VDC before entering into the voltage regulator.
Which will eventually generate a +5VDC source after go through a voltage regulator.

Figure 17: Power Supply [2]

Page 31 of 51

Project No JK04

ELEC4840B

4.3.1 Power Supply Circuit Analysis

IIN

Figure 18: Power Supply Equivalent Circuit (IIN)

IIN can be calculated from the equivalent circuit in figure 14, the given formula as
shown in Eq. (5.2.1)

V = IR + IX L + IX C

I IN
+ j 1 10 3
6
4
.
7
10

+ 68
6
470 10

) +

(5.2.1)

= 2300 + 0.7

Where = 2 50 = 314.159

j
j

I IN
+ 68 = 2300 + 0.7
+ j 314.159 1 10 3 +
6
6
314.159 470 10
314.159 4.7 10

I IN ( j 677.25 + j 0.314159 j 6.7726 + 68) = 2300 + 0.7

I IN (68 j 683.71) = 230.70
I IN (687.1 84.32 ) = 230.70
Page 32 of 51

Project No JK04

ELEC4840B
I IN =

230.70
687.1 84.32

I IN = 0.33584.32
I IN = 335mA
The equivalent circuit is used to calculate the IOUT, the formula is given in Eq. (5.2.2)

5V

Zth

I OUT =

V
Zth

C 3 = 100 F , XC 3 =

(5.2.2)

j
2 50 100 10 6

= j 31.83

C 4 = 47F , XC 4 =

j
2 50 47 10 9

= j 67725.5

Zth =

Zth =

XC 3 XC 4
XC 3 + XC 4

( j31.83) ( j 67725.5)
( j31.83) + ( j 67725.5)
Page 33 of 51

Project No JK04

ELEC4840B
Zth =

(31.83 90) (67725.5 90)

j 67757.33
Zth =

2155702.67 180
67757.33 90

Zth = 31.81 90

I OUT =

5
31.81

I OUT = 157 mA
From the data sheet of TDA5051A the maximum draw current is 76mA [2]. However,
the MAX232 interface circuit will draw extra 10mA [23], this will add up to 76mA giving
the total current consumption of Power Line Modem circuit to be approximately 86mA.
Despite the total consumption of the power line communication modem is about
86mA. For a safe use of power supply, the total draw current can go up to 157mA.

4.3.2 Simulation Test (Power Supply)

Based on the above mathematical calculation, prior to build/implement the actual
circuit, multisim software will used to verify the result between the ideal calculation and
actual build circuit.
From the simulation test as shown in figure 19, a 230VRMS was fed into the circuit;
the input current is obtained as 336mA which is very close to the calculated value
(335mA) as shown in the Eq. (5.2.1).

Page 34 of 51

Project No JK04

ELEC4840B

Figure 19: : Power Supply circuit (Equivalent Circuit Design Using Multisim

Multimeter (XSC1) is used for testing the output of the circuit. Looking at the output of
the circuit showing in figure 15, the output of the equivalent circuit shown 5.008VDC
which determines that the designed circuit met the power supply specification. This
simulation work also test the maximum input voltage source which this circuit can
withstand or before the result starts to saturate. This was being done by varying the
input up to some extend of +/- 50V, or in the fluctuation in the input, the output source
of the circuit remains stable and not affected.
An oscilloscope is also used in this simulation test to confirm the DC source level. As
shown from the oscilloscope, a 5VDC source is obtained.

Page 35 of 51

Project No JK04

ELEC4840B

Figure 20: Power Supply Simulation Test (Output Voltage)

This will be the last simulation test, multimeter is used to test the total output current of
the entire circuit. From figure 21 shown below, the total measure output current of the
circuit is 151.7mA. As compare to the calculated value (157mA) in Eq. 5.2.2 which is
slightly different by 6 mA. This could be due to the tolerant of the components used in
multisim.

Figure 21: Power Supply Simulation Test (Output Current)

Page 36 of 51

Project No JK04

ELEC4840B

In conclusion, base on calculated value, it was proven by the simulation test that the
circuit it safe and meet all expectation from the design.

4.4 Coupling Circuit Specification

As modem IC chipset usually has maximum voltage ratings of less than 50V, the
operating voltage of AC mains can easily damage the IC chipset. The coupling circuit
has to effectively block this AC mains signal preventing it from reaching the input of
modem communication system [21]. Another main purpose is to block low frequency
power signal which allow high frequency (carrier frequency) to pass into the modem IC
chipset. For more detail on the needs and requirement of the coupling circuit, refer to
the literature review [2.3.4].
A typical 230V AC mains power line can be seen as a 50Hz sine wave signal source,
delivering 167 dBVrms to the modem communication system at about 30 ohms line
impedance of load as specify from the datasheet [2].

(20 log10

(20 log10

Vout
)
1V

230V
) = 167 dBVrms
1V

Since the modem sensitivity of TDA5051A is about 82dBuV as specify from the
datasheet [2], it is mandatory to provide an attenuation of 167-82=85dB of the 50Hz
sine wave component.
However, the coupling network is not only a high-pass filter, the digital filter of the RX
section in TDA5051A needs an anti- aliasing filter in order to function properly.

Page 37 of 51

Project No JK04

ELEC4840B

Figure 22: Digital Filter

In transmission mode of TDA5051A, the band-pass filter is used to eliminate the

unexpected harmonics digitized carrier and the aliasing components around the
sampling frequency (Fosc/2+Fc, Fosc/2-Fc) as shown in figure22. In general, the main
features of coupling network, is to 50 Hz rejection > 80dB with anti aliasing for the
digital filter >50dB at the sampling frequency of (1/2fOSC) as shown in figure 23.

Figure 23: Coupling Network Curve

With all these aspect, the coupling network behavior is in fact a band pass filter,
featuring a center frequency equal to the chosen carrier frequency for TDA5051A.
Table 12 below summarizes typical requirements which the coupling circuit design for
TDA5051A has to be considered at center frequency (carrier frequency FCR) 115 KHz:

Page 38 of 51

Project No JK04

ELEC4840B
RECEPTION MODE

Typical input impedance at Fc

-3dB Bandwidth
50Hz attenuation
Anti-aliasing around Fosc/2
Input sensitivity
TRANSMISSION MODE

35 Ohms
100 KHz
> 90 dB
> 50 dB
82 dBuVrms

Typical output impedance

7 Ohms

Output voltage on a CISPR16 load

122 dBuVrms

Table 12: Coupling circuit requirement

4.4.1 Coupling Circuit Design

In this coupling circuit a double LC bandpass filter is used to provide efficient rejection
50Hz signal (high pass) and anti-alising (low pass) for digital filter without any
adjustment or tunable from the components. All values on this coupling circuit will be
determine by impedance matching from the calculation as discussed on the circuit
analysis. A unidirectional transient suppressor (SA5.0A, D1) is connected across the
TXOUT and RXIN to protect from overvoltage. It also protects the TXOUT from negative
transient voltage which also might damage the circuit output amplifier.

VA
Z1

Z2
Vin

Figure 24: Coupling Circuit Design [2]

Page 39 of 51

Project No JK04

ELEC4840B

4.4.2 Coupling Unit Circuit Analysis

Principle of superposition can be used in coupling circuit analysis. Assuming the
230Vrms, 50Hz AC sine wave as a signal source at VIN. Thevenin Equivalent
Output circuit can be calculated as follows:

Z2
VOC = VIN
Z1 + Z 2

Where Z 1 = X C1 + X L1

Z 2 = X C 3 // X L 2

= 2 f = 2 3.1416 50 = 314.159
X C1 = (

1
C1

)=

1
= 67725.51
314.159 47 10 9

X C1 = X C 3 = 67725.51
X L1 = L1 = 2 3.1416 50 47 10 6 = 0.014765

X L1 = X L 2 = 0.014765
Z 1 = j 67725.51 + j 0.014765 = j 67725.49
Z2 =

j 67725.51 j 0.014765
=
j 67725.51 + j 0.014765

67725.51 90 )(0.01476590
j 67725.495

999.9670
999.9670
= 0.01476590
=
j 67725.495 67725.495 90

= j 0.014765

VOC = 23090(

0.01476590
j 67725.49 + j 0.014765

)
Page 40 of 51

Project No JK04

ELEC4840B

= 23090 (

= 230 90

0.01476590
j 67725.47

0.01476590
67725.47 90

= 23090( 2.18 10 7 180

= 50 10 6 270
This ratio will effectively eliminate the 230VRMS signal to 50 uV with attenuation of
133.25dB, effectively exceeding the requirement of 87dB by RX input of
TDA5051A.

Attenuation(dB

) = 20 log

230V
= 133.25 dB
50 10 6

4.4.3 Coupling Circuit Simulation Test

Multisim software will used in this test, to verify the results between the obtained values by
mathematical calculation versus actual build circuit.

Figure 25: Coupling Circuit Test (Equivalent Circuit Design Using Multisim)

Page 41 of 51

Project No JK04

ELEC4840B

As shown on the figure 26, input voltage was successfully suppressed to about 50 V. The
obtained result is equal to the calculated values.

Figure 26: Coupling Circuit Simulation Test (Output Voltage)

The output current for the entired coupling circuit as shown in the figure 27. As
specify in the datasheet a typical 50k ohm input impedance which represent the RXIN
on the TDA5051A IC chipset.

Figure 27: Coupling Circuit Simulation Test (Output Current)

Page 42 of 51

Project No JK04

ELEC4840B

5.0 Software Development

In this chapter, Labview programming methodology and its programming flow chart
will be discussed. The intend of this section is to give a general overview how Labview
was implement to suit the design of the project application.

5.1 Labview Design

Labview Development System from National Instrument has been used to develop the
interface software. Reason for choosing Labview in this project is because of its easy
to use environment, which combines graphical programming with hardware to simplify
the design development work. Most importantly the use of this software is to
practically put into practise all applications that whatever was taught and learnt from
the course ELEC2500.
It is planned to run all the software related processes including some media access
control schemes on personnel computers. COM port from host PC will be connected
to power line modem which will be directly connected to AC Mains. On the receiving
side, there will be another power line modem with identical circuit configuration
connected to another PC COM Port act as slave. A demonstration will be carry out by
controlling a lamp from one PC to another PC.
Commands will send out by activating the LAMP ON, LAMP OFF, LAMP DIMMR
from the master control (host PC) as shown in figure 28, to the slave display (Slave
PC) as shown in figure 29. To control the lamp from one PC to another PC via the
power line communication modem.

Page 43 of 51

Project No JK04

ELEC4840B

Figure 28: Master Control Panel (Host PC)

Figure 29: Slave Display Panel (Slave PC)

Page 44 of 51

Project No JK04

ELEC4840B

5.2 Implementing the Power Line Modem Control Message Frame

on RS232 COM Port
The figure below shows the standard bit pattern sending character A (hexadecimal
41 or binary 0100 0001) at serial COM port:

Lower
Nibble

LSB

Higher
Nibble

MSB

Figure 30: Bit Pattern at COM Port for character A (1 stop bit, no parity)

5.2.1 Interface message frame

The interface message frame which is supposed to be sent out via serial COM port
will have a 16 bits preamble, an 8 bits address field, 8 bits data field and 1 stop bit
fields. Considering 1 start bit and 1 stop bit of COM port communication, it will take
approximately 113 us (1/300 * [16+8+8+1+1] ~ 113 us) to send this message frame at
the baud rate of 300 bits per second.
5.2.2 Preamble
It is planned to use a 16 bit preamble of 8 falling and 8 rising edges. Implementing this
on standard COM Port, the interface software has to send character UU via PC COM
port as a preamble.

Figure 31: Preamble

Page 45 of 51

Project No JK04

ELEC4840B

5.2.3 Address Field

As demonstration program is planned to support only a few slave units with one
master unit, 8 bits address field is good enough for this implementation. Considering
00 as the address for master unit, this address field is supposed to support up to 255
slave units. This address field will immediately follow the preamble.
Address
(Hex)
00
01
02
FF

Unit
Master
Slave 1
Slave 2
Slave 255

Address
(binary)
0000 0000
0000 0001
0000 0010
1111 1111

Table 13: Address Field

5.2.4 Data Field

8 bits are catered for data field. First 4 bits are catered for commands and next 4 bits
are catered for levels. Preliminary definition of bit patterns are as follows:

COMMAND
LIGHT 'xx' ON
LIGHT 'xx' OFF
DIM "xx"
Acknowledge

Higher
Nibble
0000
0111
1001
0100

Lower Nibble
bbbb
bbbb
bbbb
1011

Hex
0X
7X
9X
4B

Remark
Lamp Number X =
1~A
Dim Level X = 1~A
Acknowledge char:

Table 14: Data Field

5.2.5 Stop Bit

RS232 Standard COM port already has 1 stop bit. For simplicity this same stop bit will
be used in interface message frame.
5.2.6 Baud Rate
As mention, the baud rate for TDA5051A power line modem that used to operates was
600 or 1200 respectively. With this specification, the needs for the Universal
Synchronous Asynchronous Receiver Transmitter (USART) for the computer to
operate at the same baud rate as the power line modem. By having the same baud
rate, the power line modem and computer can be synchronized when transmitting
data from computer to modem. In this project, baud rate of 600 will be used. This is

Page 46 of 51

Project No JK04

ELEC4840B

because of the application of this project, as is just only controlling of appliances and
sending string of data. Also, it will minimize the error occur if the speed is too fast.

6.0 Test Result & Verification

Testing for the power line communication modem is divided into 4 mains hardware
and each hardware is tested individually before interface and combining them
together. These 4 hardwares includes, power supply, modem IC circuit, coupling
circuit and level converter. And because this test involves with 230VAC, before
commencement of the test, safety device and safety awareness need to be
considered and put in place.
Safety device includes, MCB, Variable Transformer (Varic), Fuse and isolating
transformer will be used during the test when the present of 230VAC.
Purpose of having those protection devices are as follows: Main Circuit Breaker (MCB) To protect from Live to Neutral shorted
Variable Transformer (Varic) Vary the voltage, from 0 V to the respective
nominal value (230VAC). This is to prevent further damage to the component if
any components not function or operating to its respective optimum
performance.
Fuse To protect the circuit from overload
Isolating Transformer Although isolating transformer can eliminates the noise
and blocking of DC signals. However, in this setup is just to eliminates bonding
and it contains the shock hazard within the device where it might be at a
hazardous potential different between the tested devices.

Page 47 of 51

Project No JK04

ELEC4840B

Figure 32: Protection Devices for Testing

Equipment used for the test as follow:

Oscilloscope

2 X Multimeter

Signal generator

Power Supply

2 X Computer with Labview software

6.1 Power Supply Test

The equipment test in these test are, oscilloscope, Variable Transformers, isolating
transformer and a 2 X multimeter, one is to measure the incoming AC voltage and the
other is to measure the DC output voltage. An AC voltage will gradually increase from
0 to 230 VAC as shown in figure 33 to obtain a 5 VDC source.
Incoming
230VAC

Output
Voltage 5 VDC

Figure 33: Power Supply Testing

Page 48 of 51

Project No JK04

ELEC4840B

Figure 34 below shown the DC output voltage measure from oscilloscope.

Figure 34: DC waveform

6.2 Modem IC Circuit Test

As shown in figure 35, TDA50551 chip was solder on the PCB with few components
attached on it. A power supply of 5VDC will feed into the modem IC circuit to check
the clock pulse oscillator. Each modem IC circuit will test individually.

Figure 35: Modem IC Circuit Test

Choosing quart crystal of 7.3728 MHz, a carrier frequency of 115 KHz will be
generated as shown from the oscilloscope in the figure 29. The test was carry out
when data input feed in with a high input signal (5VDC), about 500mV will generate at
the TX_OUT pin. And when data input feed in with a low input signal (0VDC), a 2.5 VDC
will generated at TX_OUT pin. All measurements obtained were accordance to
TDA5051A datasheet [2].
Page 49 of 51

Project No JK04

ELEC4840B

Figure 36: Modem IC Circuit Test (Test of 115 KHz)

Figure 37 below shown a floating signal exist when data input signal is at open circuit.
A pull up resistor (as shown in figure 31) will be introduced by connecting across the
data input and 5VDC supply, to ensure that the signal will always stay high when not
transmitting.

Figure 37: Modem IC Circuit Test (Floating Signal)

Pull Up Resistor

Figure 38: Modem IC circuit Test (Pull up resistor)

Page 50 of 51

Project No JK04

ELEC4840B

6.2.1 Interfacing Two Modem IC Circuit Test

In this test, two modem IC circuit will connect together to test out the input signal from
the first modem circuit and will receive the same signal from another modem circuit.
When Inject a 300Hz signal (Blue waveform) into the first modem circuit, second
modem circuit will receive about 300Hz signal (Yellow waveform). This test is to verify
the baud rate of two modem circuit.

Inject a 300Hz
into first modem,
as shown in the
blue waveform

Second modem
receive 300Hz,
as shown in
yellow

Figure 39: Two Modem Circuit Test

6.3 Coupling Circuit Test

A signal generator will inject a 115 KHz into the coupling circuit as shown in figure 36.
The blue waveform generates a 115 KHz from the signal generator. And the yellow
waveform will measure from the output of the coupling circuit which obtains same
frequency of 115 KHz as compared to the input source. This test successfully showed
that 115 KHz pass through the coupling circuit without any waveform distortion.
Page 51 of 51

Project No JK04

ELEC4840B

Figure 40: Coupling Circuit Test

6.3.1 Coupling Circuit Test (With 230VAC)

Next test, 230VAC will feed into the coupling circuit as shown in figure 33. And
because of dealing with 230VAC source, safety device was used. An AC voltage
gradually increases from 0 to 230VAC as shown in figure 37 to ensure that the
coupling circuit filter the 50Hz and bring down to the respective safe voltage before
entering into the modem chipset. And from the oscilloscope the output voltage of the
coupling circuit measured about 50 V. Which met the specification of not exceeding
2.5V.

Figure 41: Coupling Circuit Test (AC 230V)

Page 52 of 51

Project No JK04

ELEC4840B

6.4 Modem & Coupling Circuit Test

Both modems will connect together between the coupling circuits, with a 230VAC feed
into the coupling circuit. An AC voltage will gradually increases from 0 to 230VAC as
shown in figure 38. When Data_IN signal from the first modem chip set feed in a High
(5VDC) input signal, the second modem will received a 115 KHz waveform. From the
figure a 115 KHz signal travels along with the AC sinusoidal waveform from one
modem to another modem. The measurement was taken from the second modem
chip set, RX_IN .
230VAC source
feed into the
coupling circuit

Carried
frequency travel
along the AC line

Showing AC
mains present

Figure 42: Modem & Coupling Circuit Test (With 230VAC)

Page 53 of 51

Project No JK04

ELEC4840B

6.5 Serial Comms Test between Two Modem

A basic serial read & write program from Labview software will be used in this test to
test the communication between the level converters and the modem chip set. Two
modems will be connected together from the coupling circuit end, and each level
converter will connect through a USB comms port respectively to the PC.

Level
converter

Two converter connect from

USB to PC respectively

Modem
Chip set

Coupling
Circuit

Two modem connect

together at the
coupling circuit end

Figure 43: Serial Comms Test Between Two Modems

Figure 41 shown that the data was entered from a labview software, and this data will
transmit from one modem to another modem through level converter, and the result
shown that same data was obtained at the receiving end modem.

Page 54 of 51

Project No JK04

ELEC4840B

Figure 44: Serial Comms Test

6.6 Distance Test between Two Modems

This is to determine how far the signal can travel along the power line between two
modems. In figure 42, it begins from 10 meter of cable length and gradually increases
until 100 meter cable length. Same technique as used in testing of serial comms
(basic serial read & write program from Labview software) will be used in this test
again to obtain the result; two characters will be sent from a PC. The maximum
efficiency distance will test up to 80 meter. When the cable distance increases to more
than 80 meter, intermittent error will occur sometime, where either the data will not be
sent or garbage will receive from the receiving end.

Page 55 of 51

Project No JK04
Distance

ELEC4840B
Display

Result

X
Figure 45: Distance Test between Two modems

Page 56 of 51

Project No JK04

ELEC4840B

6.7 Full Integrated System Test (Hardware & Software)

A labview software was develop to control the Lamp ON & OFF (Master), and also
the brightness of the lamp (Slave). A string of data also can be send from one PC to
another PC via the power line communication modem. Demonstration purpose this
modem will place at a short distance apart to transmit signal from one end to another
end. The maximum distance that this modem can operate, it can go up to 80 meter.
Controlling the lamp (Master) from one USE
port thru the power line communication
modem

Light up the Lamp (slave) from

another USB port thru power line
communication modem

Figure 46: Full Integrated System Test

6.8 Summary of finding during the test

Page 57 of 51

Project No JK04

ELEC4840B

6.9 A Full complete Power Line communication Modem

Coupling
circuit

Modem IC
chipset

Power
supply

Level
converter

Figure 47: Full Complete Power Line Communication Modem (Internal)

Figure 48: Full Complete Power Line Communication Modem (External)

Page 58 of 51

Project No JK04

ELEC4840B

Figure 49 shown below the complete setup of the power line communication modem
controller the lamp via the power line.

Figure 49: A Complete setup power line communication modem test

7.0 Cost Analysis

The following cost will tabulate base on 2 numbers of power line communication modem
components.
Circuitry

Power Supply

Quantity

Unit
price

Total
Cost

Power Resistor (2W, 68ohm)

02

$1.20

$2.40

Inductor (1mH)

02

$0.50

$1.00

Capacitor (4.7 F, 250VAC)

02

$2.50

$5.00

Diode (IN4006)

04

0.40

$1.60

Zener Diode (7V5 (1.3W)

02

$0.50

$1.00

Capacitor (470 F, 16V)

02

$0.60

$1.20

Capacitor (100 F,16V)

02

$0.40

$0.80

Capacitor (47nF)

02

$0.50

$1.00

Voltage Regulator (L7805)

02

$0.80

$1.60

TDA5051A IC

02

$6.50

$13.00

Crystal (7.3728MHz)

02

$1.60

$3.20

Capacitor (22pF)

04

$0.40

$1.60

Resistor (2.2Mohm)

02

$0.20

$0.40

02

$5.30

$10.60

Component Description

Modem Chipset

Level Converter Max 232 IC

Page 59 of 51

Project No JK04

ELEC4840B
Capacitor (10 F)

05

$0.40

$2.00

Com port connector

02

$1.20

$2.40

X2 capacitor(250V, 47nF)

02

$0.80

$1.60

Inductor (47H)

04

$0.40

$1.60

Capacitor (47nF, 63V)

02

$0.60

$1.20

Capacitor (1 F, 16V)

02

$0.50

$1.00

Zener Diode (SA5.0A)

02

$0.50

$1.00

Capacitor (10nF)

02

$0.50

$1.00

AC power plug

02

$3.50

$7.00

Modem casing

02

$5.00

$10.00

Fuse (630mA) with fuse holder

02

$2.00

$4.00

Indicator light (230VAC)

02

$2.00

$4.00

Comms port cable and connector

02

$4.00

$8.00

$5.00

$5.00

Coupling Circuit

Miscellaneous

Others

Total Cost

$94.20

Table 15: Cost Analysis

8.0 Gantt Chart

Part A Plan

Page 60 of 51

Project No JK04

ELEC4840B

Part B Plan

9.0 Conclusion & Future Development

9.1 Conclusion
After the literature review and an initial study on Power Line Modem hardware design,
it can be concluded that this Power Line Communication Modem Circuit Design
Project is a challenging task which demand a detailed understanding of digital
communication principles, networking principles; electronics circuit design, and
software knowledge.

Page 61 of 51

Project No JK04

ELEC4840B

In this report, a basic understanding of the use of Power Line Modem ICs in Power
Line Modem Devices has been achieved, a conceptual approach to detailed circuit
construction using selected IC TDA5051A has been initiated, however, there are more
to be learned on the communication scheme of the interface from PC to IC, and a
detailed design of interface circuit is also another challenge. Practical Experiments
are required to understand the characteristics of IC, noise, impedance, and
attenuation behavior of the power line for the improvement of basic design. After all
the hardware requirements have been achieved, the software development in PC to
facilitate communication between two modem devices. All these requirements will be
considered in the future plan of the project.

9.2 Future Development

References:
[1] http://hih.au.dk/Chipsets-8402.aspx

Page 62 of 51

Project No JK04

ELEC4840B

[2] TDA5051A Product Data Sheet

[3] Design of Power-Line Communication System (PLC) Using a PIC Microcontroller
Q. Al-Zobi1, I. Al-Tawil2, K. Gharaibeh3 and I. S. Al-Kofahi
J. of Active and Passive Electronic Devices, Vol. 3, pp. 331340
[4] Power Line Communications: An Overview - Part I,II
Muhammad Salman Yousuf*, Mustafa El-Shafei**
[5] http://america2.renesas.com/applications/wired_connectivity/powerline_comm.html
[6] http://www.homeplug.org/home/
[7]http://www.google.com.sg/imglanding?q=CENELEC%20Frequency%20Band%20Allocation
&imgurl=http://plc.qcslink.com/IntroPLC/Image1.gif&imgrefurl=http://plc.qcslink.com/IntroPLC/L
owBWDD.htm&usg=__c8zs58mw4F51_CBZ2mBPsFdwnw=&h=353&w=691&sz=6&hl=en&um=1&itbs=1&tbnid=fXgXCGyJv8O4O
M:&tbnh=71&tbnw=139&prev=/images%3Fq%3DCENELEC%2BFrequency%2BBand%2BAllo
cation%26um%3D1%26hl%3Den%26sa%3DG%26tbs%3Disch:1&um=1&sa=G&tbs=isch:1&st
art=0#tbnid=fXgXCGyJv8O4OM&start=0
[8]http://www.google.com.sg/imglanding?q=FCC%20frequency%20band&imgurl=http://www.fu
raxa.com/images/UWB-SpectrumFCC.jpg&imgrefurl=http://www.furaxa.com/Press%2520release%2520aug%252015%2520200
3.htm&usg=__RG3nkVNMuQ5kQtAlYZro8sQjvag=&h=277&w=540&sz=35&hl=en&um=1&itbs
=1&tbnid=YmSWUFij6wBGlM:&tbnh=68&tbnw=132&prev=/images%3Fq%3DFCC%2Bfrequen
cy%2Bband%26um%3D1%26hl%3Den%26sa%3DX%26tbs%3Disch:1&um=1&sa=X&tbs=isch
:1&start=0#tbnid=_xyTNt-BCYK7KM&start=6
[9]L.M Millanta et al., A Classification of the Power-Line Voltage Disturbances for an
Exhaustive Description and Measurement, Proceedings of the IEEE National Symposium on
Electromagnetic Compatibility, Denver, CO, USA, pp. 33-226, May 1989
[10] Olaf Hooijien, Aspects of Residential Power Line Communication , Ph D. Thesis, Shaker
Verlag GmbH, ISBN 3-8265-3429-8,1998
[11] R.M Vines et al, Noise on the residential power distribution circuits , IEEE Transactions
on Electromagnetic Compatibility, Vol. 26. No. 4, pp.161-168, November 1984
[12] L.M Millanta et al., A Classification of the Power-Line Voltage Disturbances for an
Exhaustive Description and Measurement, Proceedings of the IEEE National Symposium on
Electromagnetic Compatibility, Denver, CO, USA, pp.332-226, May 1989
[13] Fredrik Roos, Powerline Communication in Train Control Systems, Master Thesis, KTH,
Stockholm, 2000
[14] Lars Selander, Power-Line Communication Channel Properties and Communication
Strategies , Ph.D. Thesis, Lund University, 1999

Page 63 of 51

Project No JK04

ELEC4840B

[15] HomePlug 1.0 powerline communication LANs protocol description and performance
results. International Journal Of Communication Systems. Int. J. Commun. Syst. 2003;16: (in
press) (DOI:10.1002/dac.601)
[16] HomePlug Alliance. HomePlug 1.0 Specification. June 2001
[17] http://www.homeplug.org/tech/ieee_1901
[18] M. Karl and K. Dostert, Selection of An Optimal Modulation Scheme for Digital
Communications over Low Voltage Power Lines, IEEE 4th Intl. Symp. Spread Spectrum
Tech. and Apps., vol. 3, 1996, pp. 108791
[19] Gardner S, Markwalter B, Yonge L. HomePlug standard brings networking to the home.
Communication Systems Design Magazine,
http://www.commsdesign.com/main/2000/12/0012feat5.htm,[Dec 2000].
[20] Microchip Application Note AN954
MAX232 data sheet
[21] DESIGN OF BROADBAND COUPLING CIRCUITS FOR POWERLINE
COMMUNICATION
Osama Bilal, Er Liu, Yangpo Gao and. Timo O. Korhonen
Communications Laboratory,
Helsinki University of Technology
P.O. Box 3000, FIN-02015 HUT, Finland
Phone: +358-9-4514905, Fax: +358-9-4512345
E-mail: {osama, liuer, gyp}@cc.hut.fi, [email protected]}
[22] Power Lin Communications
Theory and Applications for Narrowband and Boardband Communications over Power Lines
Editors, Hendrik C. Ferreira, Lutz Lampe, John Newbury, Theo G. Swart
[23] http://www.datasheetcatalog.org/datasheet/texasinstruments/max232.pdf
Design of Power-Line Communication System (PLC) Using a PIC Microcontroller
Q. Al-Zobi1, I. Al-Tawil2, K. Gharaibeh3 and I. S. Al-Kofahi
J. of Active and Passive Electronic Devices, Vol. 3, pp. 331340
Design of Impedance Matching Couplers
for Power Line Communications
Rodolfo Araneo #1, Salvatore Celozzi #2, Giampiero Lovat #3
# Department of Electrical Engineering Sapienza University of Rome
Via Eudossiana 18, 00184, Rome Italy
Power Line Communications: An Overview - Part I,II
Muhammad Salman Yousuf*, Mustafa El-Shafei**
* Research Assistant, Department ofElectrical Engineering
** Professor, Department of Systems Engineering
King Fahd University ofPetroleum and Minerals, Dhahran, KSA.
syousuf@kfupm. edu. sa, [email protected]. edu. Sa

Page 64 of 51

Project No JK04

ELEC4840B

Application of the OFDM/OQAM Modulation to

Power Line Communications
Alexandre Skrzypczak 1,2, Pierre Siohan 1 and Jean-Philippe Javaudin
1 France Telecom 2 IETR/Supelec
Research and Development Division Campus de Rennes
4, rue du Clos Courtel, B.P. 59 Avenue de la Boulaie, B.P. 81127
35512 Cesson Sevigne Cedex, France 35511 Cesson Sevigne Cedex, France
e-mail: (alexandre.skrzypczak,pierre.siohan,jeanphilippejavaudin)gorange-ftgroup.com

Page 65 of 51

Project No JK04

ELEC4840B

Appendix A1: TDA5051A Pin Configuration

Page 66 of 51

Project No JK04

ELEC4840B

Appendix A2: TDA5051A Characteristics-Supply &

Transmission Mode

Page 67 of 51

Project No JK04

ELEC4840B

Appendix A3:TDA5051A Characteristics- Reception

Mode

Page 68 of 51

Project No JK04

ELEC4840B

Appendix A4: TDA5051A Carrier Spectrum

Page 69 of 51

Project No JK04

ELEC4840B

Appendix B: Maxim 232 level converter Specification

Page 70 of 51

Project No JK04

ELEC4840B

Page 71 of 51

Project No JK04

ELEC4840B

Page 72 of 51