Step by Step Cadence Manual With Examples
Step by Step Cadence Manual With Examples
Department of Microelectronics
STEP BY STEP
Contents
1 Starting Cadence and Making a new Working Library ................................................... 2
2 Creating a New Cell......................................................................................................... 7
3 Analysis.......................................................................................................................... 15
3.1 AC Small-Signal Analysis................................................................................... 16
3.2 S-Parameter Analysis ......................................................................................... 18
3.3 DC Analysis .......................................................................................................... 20
3.4 Transfer Function Analysis ................................................................................ 21
3.5 Noise Analysis...................................................................................................... 23
3.6 Sensitivity Analysis.............................................................................................. 24
3.7 Parametric Analysis ............................................................................................ 26
3.8 Corners Analysis.................................................................................................. 27
3.9 Other Analysiss ................................................................................................... 28
4 About the Saved, Plotted, and Marched Sets of Outputs............................................... 29
5 About the Calculator ...................................................................................................... 32
6 Examples........................................................................................................................ 37
6.1 Simple Current mirror Simulation...................................................................... 37
6.2 Single-ended Operational Transconductance Amplifier................................ 50
7 Reference ....................................................................................................................... 54
2- Write amiArtist
1- Click on the
Terminal icon
4. Click Enter then you should get a window (called the Command Information
Window - CIW). The CIW is the control window for the Cadence software. The
following figure shows the parts of the CIW.
Window title
Menu banner
Output area
Input line
Mouse
bindings line
Prompt line
Window title displays the Cadence executable name and the path to the
log file that records your current editing session. The log file appears in
your home directory.
Menu banner lets you display command menus to access all the
Cadence design framework II tools.
Output area displays a running history of the commands you execute and
their results. For example, it displays a status message when you open a
library. The area enlarges when you enlarge the CIW vertically.
Input line is where you type in Cadence SKILL language expressions or
type numeric values for commands instead of clicking on points.
Mouse bindings line displays the current mouse button settings. These
settings change as you move the mouse in and out of windows and start
and stop commands.
Prompt line reminds you of the next step during a command.
Recommendation:
Keep the Command Information Window - CIW in sight, from the CIW, you can
access all Cadence tolls and functionalities
view prompts,
5. Library Manager will automatically be opened. If not, in the CIW, select Tools
Library Manager... You should get the following window, with the following list
of libraries.
3. In order to build your own schematics, youll need to define your own library to
keep your own circuits in. To create a new working library in the library manager,
select File New Library. In the Create Library window that appears fill in
the Name field as Current_mirror (or whatever youd like to call your library) then
click Apply, a Technology File for New Library appear, select Attach to an
existing techfile then click OK. Select the ADS_TECH_LIB from Technology
Library and press OK.
Now the working library has been created. All the project cells (components) that
you generate should end up in this library. When you start up the Library
Manager to begin working on your circuits, make sure you select your own library
to work in.
3. Adding Instances: An instance (either a gate from the standard cell library
or a cell that youve designed earlier) can be placed in the schematic by
selecting Add Instance... or by pressing i, and the following Add
Instance window appears.
4. For this example, we need to add the following components: two identical
NMOS transistors of W/L= 20/3 um and one resistor of 15K ohm. To add
the NMOS transistors, press Browse then select the transistorLib Library
M_NMOS Cell symbol View, This opens the Add Instance window
Function
Remark
Instance
Property
Wire
Move
Copy
Mirror
Shift + G
Mirror
Ctrl + W
Rotate
Pin
Select
Ctrl + A
Select All
Deselect
Deselect
All
Undo
Shift + U
Redo
Fit
Zoom in
Ctrl + D
10
Zoom out
Check and
Save
Stretch
gravity
Edit in
place
return
Now go to the wire where you need to place the pin and left-click on it.
Also, add the output pin Out in a similar way.
8. Checking and Saving the Design
The design can be checked and saved by selecting Design Check and
Save. For an error free schematic, you should get the following message in
the CIW,
Extracting Current_mirror schematic
11
Note: The CIW should not show any warnings or errors when you check and
save.
9. Using all the commands given above the schematic of a Current_mirror
can be constructed as shown below.
12
2. In the Symbol Generation Options window you can define which Pins
are Left, Right, Top or Bottom, then press OK.
13
14
3 Analysis
In the Schematic Editor, select Tools Analog Environment. In the
Cadence@ Analog Design Environment Simulation Window that appears.
15
16
18
19
3.3 DC Analysis
The DC analysis finds the DC operating point or DC transfer curves of the circuit.
To generate transfer curves, specify a parameter and a sweep range. The
parameter can be a temperature, a device instance parameter, or a device model
parameter.
20
21
22
23
24
26
The Parametric Analysis window appears. You use this window to specify values
for the parametric analysis. You can enter many specifications, and you can
choose options from three main menus at the top of the window. These menus
are Tool, Setup, and Analysis.
27
28
29
30
Showing DC Properties
Except node voltages, DC currents, transconductance (gm) etc. are also of
concern. To see these parameters, from the Affirma Analog Circuit Design
Environment Simulation Window choose Results Print DC Operating
Points, and then click on the Instance in the Virtuoso Schematic Editing
window. A new window shows the DC properties will pop up.
31
Selecting Data
There are three ways to bring simulation results into the calculator. You can
o Use the schematic expression keys to click nets and pins in the schematic
and select their results
o Use the Results Browser to select results out of the UNIX file system
hierarchy
o Use the wave command to select a curve in the Waveform Window
32
it transient current
vf frequency voltage
if frequency current
vdc DC voltage
op DC operating point
vn noise voltage
mp model parameter
33
Note: When you use the op, opt, mp, vn, or var functions, you must have just run
a simulation, or you must choose select results from the Results menu in the
Simulation window. Otherwise, the system does not know what to display.
Choosing Voltages or Currents
To select voltages in the schematic
Click wires.
To select currents
Click square pin symbols, not wires.
You can use the Selection Filter form to restrict selection to either pins or wires.
Press F3 if the Selection Filter form did not appear.
34
Plotting Expressions
To erase the Waveform Window and plot the buffer expression
Click erplot in the calculator.
To plot the buffer expression without first erasing the Waveform Window
Click plot in the calculator.
For example, to plot the I vs. V curve after a DC source-sweep analysis
1. In the calculator, click IS.
2. In the schematic, click the output terminal of the device.
Terminals are the square symbols at the end of the wire stub.
Now you have an expression in the buffer for the IV curve.
3. Click erplot in the calculator.
The system opens a Waveform Window (unless one is already open) and draws
the curve.
Single-Expression Functions
These functions operate on only a single expression in the buffer.
35
dB20
Function
magnitude
phase
real component
imaginary
component
base-e (natural)
logarithm
base-10 logarithm
dB magnitude for
a power
expression
dB magnitude for
a
voltage or current
Key
exp
10**x
y**x
x**2
Function
ex
10x
yx
x2
abs
|x| (absolute
value)
integer value
inverse
int
1/x
sqrt
36
6 Examples
6.1 Simple Current mirror Simulation
Create a new cell Current_mirror_Simulation. The schematic is shown below:
37
38
Check the "Send Plot Only To File" and type in a descriptive name about the
plot. Be sure to end the name with the ".ps" or ".eps" extension, as seen above.
What you are plotting is a postscript file. When the machine is done creating the
file, it will send you mail telling you that it completed successfully. To prevent this,
you can uncheck "Mail Log To".
Press Ok at Plot Options window and then press OK at submit plot window.
Now the plot of your schematic is done.
39
Simulator Setup
In Virtuoso Schematic Editing window, choose Tools Analog Environment
to start the simulation tool Analog Design Environment
DC Simulation
In the Analog Design Environment window, choose Analyses Choose, In
the pop-up window, click on dc analysis and choose to Save DC Operating
Point, select the Component Parameter then click on Select Component then
you can choose the component you want to sweep directly from the schematic, in
our case the dc parameter of V1, then click OK.
40
Choose Design
Choose Analyses
Edit Variables
Setup Outputs
Delete
Netlist & Run
Run
Plot Outputs
Now you can run the simulation: Simulation Netlist and Run or press
a Warning message to save the outputs before simulating, click Yes.
41
Delete
Move
Undo
Crosshair marker A
Crosshair marker B
Calculator
Switch Axis mode
Add Subwindow
You can split the wave form by pressing Switch Axis mode
To display Grid to Waveform Window, press Axes Options and check
Grid then press OK.
To read some value on the Waveform Window choose Croohair marker A
eventually B.
42
DC operating points:
Except node voltages, DC currents, transconductance (gm) etc. are also of
concern. To see these parameters, from the Analog Design Environment
window, choose Results Print DC Operating Points, and then click on the
instance in the Schematic Editing window. A new window as below will pop up.
43
44
Corners Analyses:
In the Virtuoso Analog Design Environment window, choose Tools ADS
Cornertool, Start Corner Analysis window appears, click Save and chooce
the File Name where you want to save the corner analyses result (usally copy
Now you can select one or more cases for each device and the temperature sweep then
press Generat Corners.
46
Parametric Analysis:
In Virtuoso Schematic Editing window, choose the instance for parametric
analysis, for example R0, select R0 press Q to open the Edit Object
Properties window, on the Resistance filed type Rvar for example, press OK
then Check and Save.
47
48
49
6.2
Single-ended
Amplifier
Operational
Transconductance
DC Simulation
Run DC simulation and check the operating points (node voltage, branch current,
transistor parameters). Fine tune the transistor size to meet the design
specifications.
50
AC Simulation
Set the AC simulation then run the simulation. When the simulation is
successfully done, choose Results Direct Plot AC Magnitude & Phase in
the Analog Design Environment. Then click on the wire connected to the top
plate of the capacitor and press Esc. A Bode plot will show the AC response of
the amplifier. Click on the Switch Axis Mode button to separate the plots.
51
Transient Response
Transient response is used to analyze the SR of the OTA. Connect the OTA as a
voltage buffer. Apply a vpulse (0.9 -1.8V). The pulse period is set to be 10us and
width is 5us. Run transient simulation, plot the output and measure the SR of
both rising edge and falling edge.
52
53
7 Reference
[1] Cadence Design Systems, Affirma Analog Circuit Design Environment User
Guide
[2] Cadence Design Systems, Analog IC Design Tutorial for Schematic Design
and Analysis using Spectre
[3] Cadence Design Systems, Waveform Calculator User Guide
[4] Cadence Design Systems, Virtuoso Schematic Composer Tutorial
[5] Cadence Design Systems, Virtuoso Advanced Analysis Tools User Guide
[6] Cadence Design Systems, Cadence SPICE Reference Manual
[7] Cadence Design Systems, Affirma RF Simulator User Guide
[8] Cadence Design Systems, Affirma Verilog-A Language Reference
[9] AMS CMOS IC Design, Dr. Sameer Sonkusale
54