KMEM4110
TRANSISTORS & APPLICATIONS
Bipolar Junction Transistors
Chapter 5
TRANSISTOR CONSTRUCTION
Transistor is a three-layer semiconductor device.
There are two types of transistors: pnp
transistor & npn transistor
The terminals are labeled:
Fig 1: pnp
and npn
E Emitter
B Base
C Collector
Chapter 5
COMMON-BASE CONFIGURATION
The base is common to both
input (emitter-base) junction and
output (collector-base) junction of
the transistor
Recall: The arrow in the diode
symbol defined the direction of
conduction for conventional
current.
For transistor: The arrow in the
graphic symbol defines the
direction of emitter current
(conventional flow) through the
device
Fig 2: Notation and symbols used with
the common-base configuration.
Chapter 5
COMMON-BASE CONFIGURATION
Output Characteristics
Input Characteristics
The curve shows the relationship
between input current (IE) to input
voltage (VBE) for three output
voltage (VCB) levels.
Fig 3: Input characteristics for common-base
transistor amplifier
The graph demonstrates the
output current (IC) to an output
voltage (VCB) for various levels of
input current (IE).
Fig 4: Output characteristics for common-base
transistor amplifier
Chapter 5
OPERATING REGIONS
Active
Operating range of the amplifier.
Cutoff
The amplifier is basically off. There is
voltage, but little current.
Saturation
The amplifier is fully on. There is current,
but little voltage.
APPROXIMATIONS
Emitter and collector currents:
Base-emitter voltage:
IC I E
VBE 0.7 V (for Silicon)
Chapter 5
ALPHA ()
Alpha () is the ratio of IC to IE :
IC
dc
IE
Ideally: = 1
In reality: falls somewhere between 0.9 and 0.998
Chapter 5
COMMON-EMITTER CONFIGURATION
The emitter is common to both input (baseemitter) and output (collector-emitter) circuits.
The input is applied to the base.
The output is taken from the collector
Common-emitter amplifier currents:
Ideal Currents
I E = IC + IB
IC = IE
Chapter 5
COMMON-EMITTER CHARACTERISTICS
Collector Characteristics
Base Characteristics
Chapter 5
BETA ()
represents the amplification factor of a transistor.
dc
IC
IB
Relationship between amplification factors and
is particularly important parameter because it provides a direct link between
current levels of the input and output circuits for a common-emitter
configuration
I C I B
IE ( 1)IB
Chapter 5
COMMON-COLLECTOR CONFIGURATION
The input is on the base
and the output is on the
emitter
Fig 5: Notation and symbols used with
the common-collector configuration.
Chapter 5
COMMON-COLLECTOR CONFIGURATION
For common-collector
configuration, the output
characteristics are similar
to those of the commonemitter configuration
except the vertical axis is
Output characteristics are a
plot of versus for a
range of values of
Chapter 5
DC BIASING - BJTs
Biasing: Application of dc voltages
to establish a fixed level of current
and voltage.
For transistor amplifiers, the resulting
dc current and voltage establish an
operating point on the
characteristics that define the region
that will be employed for
amplification of the applied signals.
Operating point: Q-point
Fig 6: Various operating points within the
limits of operation of a transistor.
Chapter 5
THE THREE OPERATING REGIONS
Operation in the cutoff, saturation and linear regions of the BJT characteristics
are provided as follows:
Active or Linear Region Operation
BaseEmitter junction is forward biased
BaseCollector junction is reverse biased
Cutoff Region Operation
BaseEmitter junction is reverse biased
Saturation Region Operation
BaseEmitter junction is forward biased
BaseCollector junction is forward biased
Chapter 5
FIXED-BIAS CONFIGURATION
The fixed-bias circuit of Fig 7 is
the simplest transistor dc bias
configuration.
Even though the network employs
an npn transistor, equations and
calculations apply equally well to
a pnp transistor configuration by
changing all current directions and
voltage polarities.
For dc analysis: the network can
be isolated from the indicated ac
levels by replacing the capacitors
with an open-circuit equivalent
Fig 7: Fixed-bias circuit.
Chapter 5
THE BASE-EMITTER LOOP
From Kirchhoffs voltage law:
+ = 0
Note the polarity of the voltage drop
across as established by the indicated
direction of
Solving for base current:
VCC VBE
IB
RB
Because and are constant, the
selection of sets the level of base
current for the operating point.
Fig 8: Base-emitter loop.
Chapter 5
COLLECTOR-EMITTER LOOP
Collector current:
IC IB
Changing to any level will not affect the
level of or as long as we remain in
the active region of the device.
From Kirchhoffs voltage law:
VCE VCC IC RC
: voltage from collector to emitter
and : voltages from collector and
emitter to ground
Fig 9: Collector-emitter loop.
Chapter 5
SATURATION
When the transistor is operating in saturation, current through the transistor is
at its maximum possible value.
To know the approximate maximum collector current (saturation level), insert
short circuit equivalent between collector and emitter of the transistor.
VCE 0 V
Resulting saturation current for fixed-bias configuration:
V
ICsat CC
R
C
Chapter 5
LOAD LINE ANALYSIS
The load line end points are:
ICsat
IC = VCC / RC
VCE = 0 V
VCEcutoff
VCE = VCC
IC = 0 mA
The Q-point is the operating point
where the value of sets the
value of
Fig 10: Fixed-bias load line.
Chapter 5
EFFECT OF AND ON THE Q-POINT
Fig 11: Effect of lower values of on the
load line and the Q-point.
Fig 12: Effect of an increasing level of on
the load line and the Q-point.
Chapter 5
EFFECT OF ON THE Q-POINT
Fig 13: Movement of the Q-point with
increasing level of .
Chapter 5
EXAMPLE
Chapter 5
EMITTER-BIAS CONFIGURATION
The dc bias network of Fig 14
contains an emitter resistor to
improve stability level over that of
the fixed-bias configuration.
The more stable a configuration, the
less its response will change due to
undesirable changes in temperature
and parameter.
Fig 14: BJT bias circuit with emitter resistor.
Chapter 5
BASE-EMITTER LOOP
From Kirchhoffs voltage law:
VCC I B RB VBE I E RE 0
Since:
IE = ( + 1)IB
VCC I B RB VBE ( 1 )I B RE 0
Solving for :
VCC VBE
IB
RB ( 1)RE
Note: The only difference between this
equation for and that obtained for fixedbias configuration is the term ( + 1)
Fig 15: Base-emitter loop.
Chapter 5
COLLECTOR-EMITTER LOOP
From Kirchhoffs voltage law:
IE RE VCE IC RC VCC 0
Since:
IE IC
VCE VCC IC(RC RE )
Also:
VE I E RE
VC VCE VE VCC I C RC
VB VCC I B RB VBE VE
Fig 16: Collector-emitter loop.
Chapter 5
IMPROVED BIASED STABILITY
Stability refers to a condition in which the currents and voltages remain fairly
constant over a wide range of temperatures and transistor Beta () values.
Adding RE to the emitter improves the stability of a transistor.
SATURATION LEVEL
The collector saturation level (or maximum collector current)
for an emitter-bias design can be determined using same
approach as the fixed-bias configuration.
Apply short circuit between collector-emitter terminals
shown in Fig 17.
Calculate the resulting collector current:
VCE 0 V
VCC
I Csat
RC RE
Fig 17: Determining for
the emitter-bias circuit
Chapter 5
LOAD-LINE ANALYSIS
The endpoints can be determined
from the load line
VCEcutoff:
VCE VCC
IC 0 mA
ICsat:
VCE 0 V
IC
VCC
RC RE
Fig 18: Load line for the
emitter-bias configuration
Chapter 5
EXAMPLE
Chapter 5
ANSWER
Chapter 5
