10 - RF Oscillators

The information in this work has been obtained from sources believed to be reliable.
The author does not guarantee the accuracy or completeness of any information
presented herein, and shall not be responsible for any errors, omissions or damages
as a result of the use of this information.

April 2012

2006 by Fabian Kung Wai Lee

Main References

[1]* D.M. Pozar, Microwave engineering, 2nd Edition, 1998 John-Wiley & Sons.
[2] J. Millman, C. C. Halkias, Integrated electronics, 1972, McGraw-Hill.
[3] R. Ludwig, P. Bretchko, RF circuit design - theory and applications, 2000
Prentice-Hall.
[4] B. Razavi, RF microelectronics, 1998 Prentice-Hall, TK6560.
[5] J. R. Smith,Modern communication circuits,1998 McGraw-Hill.
[6] P. H. Young, Electronics communication techniques, 5th edition, 2004
Prentice-Hall.
[7] Gilmore R., Besser L.,Practical RF circuit design for modern wireless
systems, Vol. 1 & 2, 2003, Artech House.
[8] Ogata K., Modern control engineering, 4th edition, 2005, Prentice-Hall.

April 2012

2006 by Fabian Kung Wai Lee

Agenda

Positive feedback oscillator concepts.

Negative resistance oscillator concepts (typically employed for RF
oscillator).
Equivalence between positive feedback and negative resistance
oscillator theory.
Oscillator start-up requirement and transient.
Oscillator design - Making an amplifier circuit unstable.
Constant |1| circle.
Fixed frequency oscillator design.
Voltage-controlled oscillator design.

April 2012

2006 by Fabian Kung Wai Lee

1.0 Oscillation Concepts

April 2012

2006 by Fabian Kung Wai Lee

Introduction

Oscillators are a class of circuits with 1 terminal or port, which produce

a periodic electrical output upon power up.
Most of us would have encountered oscillator circuits while studying for
our basic electronics classes.
Oscillators can be classified into two types: (A) Relaxation and (B)
Harmonic oscillators.
Relaxation oscillators (also called astable multivibrator), is a class of
circuits with two unstable states. The circuit switches back-and-forth
between these states. The output is generally square waves.
Harmonic oscillators are capable of producing near sinusoidal output,
and is based on positive feedback approach.
Here we will focus on Harmonic Oscillators for RF systems.
Harmonic oscillators are used as this class of circuits are capable of
producing stable sinusoidal waveform with low phase noise.
April 2012

2006 by Fabian Kung Wai Lee

2.0 Overview of Feedback

Oscillators

April 2012

2006 by Fabian Kung Wai Lee

Classical Positive Feedback

Perspective on Oscillator (1)

Consider the classical feedback system with non-inverting amplifier,

Assuming the feedback network and amplifier do not load each other,
we can write the closed-loop transfer function as:
Non-inverting amplifier

Si(s)

E(s)

So(s)

A(s)
+
High impedance

Positive
Feedback

Feedback network

High impedance

F(s)

So
(s ) = 1 AA(s(s)F) (s ) (2.1a)
Si

T (s ) = A(s )F (s ) (2.1b)
Loop gain (the gain of the system
around the feedback loop)

Writing (2.1a) as: S o (s ) = 1 AA(s()sF) (s ) S i (s )

We see that we could get non-zero output at So, with Si = 0, provided
1-A(s)F(s) = 0. Thus the system oscillates!
April 2012

2006 by Fabian Kung Wai Lee

Classical Positive Feedback

Perspective on Oscillator (1)

The condition for sustained oscillation, and for oscillation to startup from
positive feedback perspective can be summarized as:
For sustained oscillation
For oscillation to startup

1 A(s )F (s ) = 0

A(s )F (s ) > 1

Barkhausen Criterion

arg( A(s )F (s )) = 0

(2.2a)
(2.2b)

Take note that the oscillator is a non-linear circuit, initially upon power
up, the condition of (2.2b) will prevail. As the magnitudes of voltages
and currents in the circuit increase, the amplifier in the oscillator begins
to saturate, reducing the gain, until the loop gain A(s)F(s) becomes one.
A steady-state condition is reached when A(s)F(s) = 1.
Note that this is a very simplistic view of oscillators. In reality oscillators
are non-linear systems. The steady-state oscillatory condition corresponds
to what is called a Limit Cycle. See texts on non-linear dynamical systems.
April 2012

2006 by Fabian Kung Wai Lee

Classical Positive Feedback

Perspective on Oscillator (2)

Positive feedback system can also be achieved with inverting amplifier:

Inverting amplifier

Si(s)

E(s)

-A(s)

So(s)

So
(s ) = 1 AA(s(s)F) (s )
Si

Inversion
F(s)

To prevent multiple simultaneous oscillation, the Barkhausen criterion

(2.2a) should only be fulfilled at one frequency.
Usually the amplifier A is wideband, and it is the function of the
feedback network F(s) to select the oscillation frequency, thus the
feedback network is usually made of reactive components, such as
inductors and capacitors.
April 2012

2006 by Fabian Kung Wai Lee

Classical Positive Feedback

Perspective on Oscillator (3)

In general the feedback network F(s) can be implemented as a Pi or T

network, in the form of a transformer, or a hybrid of these.
Consider the Pi network with all reactive elements. A simple analysis in
[2] and [3] shows that to fulfill (2.2a), the reactance X1, X2 and X3 need to
meet the following condition:
So(s)

E(s)

-A(s)

X 3 = ( X 1 + X 2 ) (2.3)

If X3 represents inductor, then

X1 and X2 should be capacitors.

X3

X1

April 2012

X2

2006 by Fabian Kung Wai Lee

10

Classical Feedback Oscillators

The following are examples of oscillators, based on the original circuit

using vacuum tubes.
+

Colpitt
oscillator
+

Hartley
oscillator

Armstrong
oscillator

Clapp
oscillator

April 2012

2006 by Fabian Kung Wai Lee

11

Example of Tuned Feedback Oscillator

(1)
A 48 MHz Transistor Common
-Emitter Colpitt Oscillator

2.0
1.5
1.0

R
RB1
R=10 kOhm

R
RC
R=330 Ohm

C
CD1
C=0.1 uF

VB

VL
C
Cc2
C=0.01 uF

pb_mot_2N3904_19921211
Q1
R
RB2
R=10 kOhm

0.5
0.0
-0.5

VC

C
Cc1
C=0.01 uF

VB, V
VL, V

V_DC
SRC1
Vdc=3.3 V

R
RE
R=220 Ohm

-1.0
R
RL
R=220 Ohm

-1.5

A( )F ( )

C
CE
C=0.01 uF

0.0

0.2

0.4

0.6

0.8

1.0

1.2

1.4

1.6

1.8

2.0

time, usec

1
0
Si(s)

L
C
L1
C1
L=2.2 uH
C=22.0 pF R=

C
C2
C=22.0 pF

t
E(s)

-A(s)

So(s)

F(s)
April 2012

2006 by Fabian Kung Wai Lee

12

Example of Tuned Feedback Oscillator

(2)
A 27 MHz Transistor Common-Base
Colpitt Oscilator
600

R
RC
R=470 Ohm

R
RB1
R=10 kOhm

VC

R
RE
R=100 Ohm

-400
L
L1
L=1.0 uH
R=
C
C2
C=100.0 pF

C
C3
C=4.7 pF

R
R1
R=1000 Ohm

-600
0.0

0.2

0.4

0.6

0.8

1.0

1.2

1.4

1.6

1.8

2.0

time, usec

E(s)

0
-200

pb_m ot_2N3904_19921211
Q1
VE

R
RB2
R=4.7 kOhm

Si(s)

200

VL
C
C1
C=100.0 pF

C
Cc2
C=0.1 uF

VB
C
Cc1
C=0.1 uF

400

C
CD1
C=0.1 uF

VE, mV
VL, mV

V_DC
SRC1
Vdc=3.3 V

So(s)

A(s)

F(s)

April 2012

2006 by Fabian Kung Wai Lee

13

Example of Tuned Feedback Oscillator

(3)
V_DC
SRC1
Vdc=3.3 V
R
RB1
R=10 kOhm

R
RC
R=330 Ohm

A 16 MHz Transistor Common-Emitter

Crystal Oscillator

C
CD1
C=0.1 uF

VC

VB
C
Cc1
C=0.1 uF

C
C1
C=22.0 pF

April 2012

VL
C
Cc2
C=0.1 uF

R
RL
R=220 Ohm

pb_mot_2N3904_19921211
Q1
R
RB2
R=10 kOhm

R
RE
R=220 Ohm

C
CE
C=0.1 uF

sx_stk_CX-1HG-SM_A_19930601
XTL1
Fres=16 MHz

C
C2
C=22.0 pF

2006 by Fabian Kung Wai Lee

14

Limitation of Feedback Oscillator

At high frequency, the assumption that the amplifier and feedback

network do not load each other is not valid. In general the amplifiers
input impedance decreases with frequency, and its output impedance
is not zero. Thus the actual loop gain is not A(s)F(s) and equation (2.2)
breakdowns.
Determining the loop gain of the feedback oscillator is cumbersome at
high frequency. Moreover there could be multiple feedback paths due
to parasitic inductance and capacitance.
It can be difficult to distinguish between the amplifier and the feedback
paths, owing to the coupling between components and conductive
structures on the printed circuit board (PCB) or substrate.
Generally it is difficult to physically implement a feedback oscillator
once the operating frequency is higher than 500MHz.

April 2012

2006 by Fabian Kung Wai Lee

15

3.0 Negative Resistance

Oscillators

April 2012

2006 by Fabian Kung Wai Lee

16

Introduction (1)

An alternative approach is needed to get a circuit to oscillate reliably.

We can view an oscillator as an amplifier that produces an output
when there is no input.
Thus it is an unstable amplifier that becomes an oscillator!
For example lets consider a conditionally stable amplifier.
Here instead of choosing load or source impedance in the stable
regions of the Smith Chart, we purposely choose the load or source
impedance in the unstable impedance regions. This will result in
either |1 | > 1 or |2 | > 1.
The resulting amplifier circuit will be called the Destabilized Amplifier.
As seen in Chapter 7, having a reflection coefficient magnitude for 1
or 2 greater than one implies the corresponding port resistance R1 or
R2 is negative, hence the name for this type of oscillator.
April 2012

2006 by Fabian Kung Wai Lee

17

Introduction (2)

For instance by choosing the load impedance ZL at the unstable region,

we could ensure that |1 | > 1. We then choose the source impedance
properly so that |1 s | > 1 and oscillation will start up (refer back to
Chapter 7 on stability theory).
Once oscillation starts, an oscillating voltage will appear at both the
input and output ports of a 2-port network. So it does not matter
whether we enforce |1 s | > 1 or |2 L | > 1, enforcing either one will
cause oscillation to occur (It can be shown later that when |1 s | > 1
at the input port, |2 L | > 1 at the output port and vice versa).
The key to fixed frequency oscillator design is ensuring that the criteria
|1 s | > 1 only happens at one frequency (or a range of intended
frequencies), so that no simultaneous oscillations occur at other
frequencies.

April 2012

2006 by Fabian Kung Wai Lee

18

Recap - Wave Propagation Stability

Perspective (1)

From our discussion of stability from wave propagation in Chapter 7

Zs or s
Source
b1

bss 213
bss 314

April 2012

Port 2

2-port
Network
a1

Z1 or 1

bs1
bss 12

Port 1

a1 = bs + bs 1s + bs 12s 2 + ...
bs
a1 =
1 1s
b1 = bs 1 + bs 12s + bs 13s 2 + ...
b1 =

bs
bss 1

b
1=
bs

1
1 1s

Compare with
equation (2.1a)

bss 212
bss 313

bs 1
1 1s

So
A(s )
(
s) =
Si
1 A(s )F (s )

Similar mathematical
form

2006 by Fabian Kung Wai Lee

19

Recap - Wave Propagation Stability

Perspective (2)

We see that the infinite series that constitute the steady-state incident
(a1) and reflected (b1) waves at Port 1 will only converge provided
| s1| < 1.
These sinusoidal waves correspond to the voltage and current at the
Port 1. If the waves are unbounded it means the corresponding
sinusoidal voltage and current at the Port 1 will grow larger as time
progresses, indicating oscillation start-up condition.
Therefore oscillation will occur when | s1 | > 1.
Similar argument can be applied to port 2 since the signals at Port 1
and 2 are related to each other in a two-port network, and we see that
the condition for oscillation at Port 2 is |L2 | > 1.

April 2012

2006 by Fabian Kung Wai Lee

20

10

Oscillation from Negative Resistance

Perspective (1)

Generally it is more useful to work with impedance (or admittance) when

designing actual circuit.
Furthermore for practical purpose the transmission lines connecting ZL
and Zs to the destabilized amplifier are considered very short (length 0).
In this case the impedance Zo is ambiguous (since there is no
transmission line).
To avoid this ambiguity, let us ignore the transmission line and examine
the condition for oscillation phenomena in terms of terminal impedance.
Very short Tline

Zs

Zo

Z1

Destabilized
Amp. and
Load

Z Z s Z Z1

April 2012

2006 by Fabian Kung Wai Lee

21

Oscillation from Negative Resistance

Perspective (2)

We consider Port 1 as shown, with the source network and input of the
amplifier being modeled by impedance or series networks.
Zs

Z1

jXs

Amplifier with load ZL

jX1

Source
Rs Network

V
R1

Z2
Vamp

Port 2

Port 1

ZL

Using circuit theory the voltage at Port 1 can be written as:

V=
April 2012

R1 + jX 1
Z1
Vs =
Vs
R1 + Rs + j ( X 1 + X s )
Z s + Z1
2006 by Fabian Kung Wai Lee

(3.1)
22

11

Oscillation from Negative Resistance

Perspective (3)

Furthermore we assume the source network Zs is a series RC network

and the equivalent circuit looking into the amplifier Port 1 is a series RL
network.
Zs

Z1

L1

Cs
Rs

V
R1

Vs

Z2
ZL

Vamp

Using Laplace Transform, (3.1) is written as:

R1 + sL1
(3.2a)
V (s ) =
Vs (s )
R1 + Rs + sL1 + sC1 s
(3.2b)
where
s = + j
April 2012

2006 by Fabian Kung Wai Lee

23

Oscillation from Negative Resistance

Perspective (4)

The expression for V(s) can be written in the standard form according
to Control Theory [8]:
2
V
(s ) = 1 2 s(RR1 ++ RsL1 ) 1 = sC2 s (R1 + sL1 )n2
(3.3a)
Vs
L1 s + s ( L ) + L C
s + 2ns + n
1

where

R1 + Rs
2

L1

Cs

1 s

= Damping Factor

n =

1
L1C s

= Natural Frequency

The transfer function V(s)/Vs(s) is thus a 2nd order system with two poles
p1, p2 given by:
2

p1, 2 = n n 1

(3.3b)

(3.4)

Observe that if (R1 + Rs) < 0 the damping factor is negative. This is
true if R1 is negative, and |R1| > Rs.
R1 can be made negative by modifying the amplifier circuit (e.g. adding
local positive feedback), producing the sum R1 + Rs < 0.
April 2012

2006 by Fabian Kung Wai Lee

24

12

Oscillation from Negative Resistance

Perspective (5)

Assuming ||<1 (under-damped), the poles as in (3.4) will be complex

and exist at the right-hand side of the complex plane.
From Control Theory such a system is unstable. Any small perturbation
will result in a oscillating signal with frequency n 2 1 that grows
exponentially.
A small disturbance
Im
v(t)

Rs + R1 | o < 0

or impulse starts the

exponentially growing
sinusoid

Re

Complex
pole pair

Complex Plane

Time
Domain

Usually a transient or noise signal from the environment will contain a

small component at the oscillation frequency. This forms the seed in
which the oscillation builts up.
April 2012

2006 by Fabian Kung Wai Lee

25

Oscillation from Negative Resistance

Perspective (6)

When the signal amplitude builds up, nonlinear effects such as

transistor saturation and cut-off will occur, this limits the of the
transistor and finally limits the amplitude of the oscillating signal.
The effect of decreasing of the transistor is a reduction in the
magnitude of R1 (remember R1 is negative). Thus the damping factor
will approach 0, since Rs+ R1 0.
Steady-state sinusoidal oscillation is achieved when =0, or
equivalently the poles become

p1, 2 =0 = jn

The steady-state oscillation frequency o corresponds to n,

n 2 =

1
L1C s

n L1 = n1Cs X 1 = X s

X1 + X s = 0
o

April 2012

2006 by Fabian Kung Wai Lee

26

13

Oscillation from Negative Resistance

Perspective (7)

From (3.3b), we observe that the steady-state oscillation frequency is

determined by L1 and Cs, in other words, X1 and Xs respectively.
Since the voltages at Port 1 and Port 2 are related, if oscillation occur
at Port 1, then oscillation will also occur at Port 2.
From this brief discussion, we use RC and RL networks for the source
and amplifier input respectively, however we can distill the more
general requirements for oscillation to start-up and achieve steadystate operation for series representation in terms of resistance and
reactance:

Rs + R1 |o < 0

Rs + R1 |o = 0

(3.5a)
(3.5b)

X s + X 1 | o = 0

X s + X 1 | o = 0

Start-up

(3.6a)
(3.6b)

Steady-state

April 2012

2006 by Fabian Kung Wai Lee

27

Illustration of Oscillation Start-Up and

Steady-State

The oscillation start-up process and steady-state are illustrated.

1.4

1.2

1.0

0.8

0.6

0.4

0.2

0.0

-0. 2

-0. 4

-0. 6

-0. 8
0

R1+Rs

10

20

30

40

Oscillation
start-up

50

60

70

80

90

10 0

110

120

Zs Z1

Steady-state

Zs

ZL

Destabilized
Amplifier

t
We need to note that this is a very simplistic view of oscillators.
Oscillators are autonomous non-linear dynamical systems, and the steady-state
condition is a form of Limit Cycles.
April 2012

2006 by Fabian Kung Wai Lee

28

14

Summary of Oscillation Requirements

Using Series Network

By expressing Zs and Z1 in terms of resistance and reactance, we

conclude that the requirement for oscillation are.
Zs

Z1

jXs
Source
Rs Network

Rs + R1 |o = 0
X s + X 1 | o = 0
Steady-state

jX1

Z2

Port 1

(3.6a)
(3.6b)

ZL

Vamp

R1

Port 2

Rs + R1 |o < 0
X s + X 1 | o = 0

(3.5a)
(3.5b)

Start-up

A similar expression for Z2 and ZL can also be obtained, but we shall not
beAprilconcerned
with these here.
2012
2006 by Fabian Kung Wai Lee
29

The Resonator

The source network Zs is usually called the Resonator, as it is clear

that equations (3.5b) and (3.6b) represent the resonance condition
between the source network and the amplifier input.
The design of the resonator is extremely important.
We shall see later that an important parameter of the oscillator, the
Phase Noise is dependent on the quality of the resonator.

April 2012

2006 by Fabian Kung Wai Lee

30

15

Summary of Oscillation Requirements

Using Parallel Network

If we model the source network and input to the amplifier as parallel

networks, the following dual of equations (3.5) and (3.6) are obtained.
Port 1
Gs

jBs

Z2
G1

jB1

ZL

Vamp

The start-up and steady-state conditions are:

Gs + G1 |o = 0

(3.7a)

Bs + B1 |o = 0

(3.7b)

Steady-state
April 2012

Gs + G1 |o < 0

Bs + B1 |o = 0

(3.8a)
(3.8b)

Start-up
2006 by Fabian Kung Wai Lee

31

Series or Parallel Representation? (1)

The question is which to use? Series or parallel network

representation? This is not an easy question to answer as the
destabilized amplifier is operating in nonlinear region as oscillator.
Concept of impedance is not valid and our discussion is only an
approximation at best.
We can assume series representation, and worked out the
corresponding resonator impedance. If after computer simulation we
discover that the actual oscillating frequency is far from our prediction
(if theres any oscillation at all!), then it probably means that the series
representation is incorrect, and we should try the parallel
representation.
Another clue to whether series or parallel representation is more
accurate is to observe the current and voltage in the resonator. For
series circuit the current is near sinusoidal, where as for parallel circuit
it is the voltage that is sinusoidal.
April 2012

2006 by Fabian Kung Wai Lee

32

16

Series or Parallel Representation? (2)

Reference [7] illustrates another effective alternative, by computing the

large-signal S11 of Port 1 (with respect to Zo) using CAD software.
1/S11 is then plotted on a Smith Chart as a function of input signal
magnitude at the operating frequency.
By comparing the locus of 1/S11 as input signal magnitude is gradually
increased with the coordinate of constant X or constant B circles on the
Smith Chart, we can decide whether series or parallel form
approximates Port 1 best.
We will adopt this approach, but plot S11 instead of 1/S11. This will be
illustrated in the examples in next section.
Do note that there are other reasons that can cause the actual
oscillation frequency to deviate a lot from prediction, such as frequency
stability issue (see [1] and [7]).

April 2012

2006 by Fabian Kung Wai Lee

33

4.0 Fixed Frequency

Negative Resistance
Oscillator Design

April 2012

2006 by Fabian Kung Wai Lee

34

17

Procedures of Designing Fixed

Frequency Oscillator (1)

Step 1 - Design a transistor/FET amplifier circuit.

Step 2 - Make the circuit unstable by adding positive feedback at radio
frequency, for instance, adding series inductor at the base for commonbase configuration.
Step 3 - Determine the frequency of oscillation o and extract Sparameters at that frequency.
Step 4 With the aid of Smith Chart and Load Stability Circle, make R1
< 0 by selecting L in the unstable region.
Step 5 (Optional) Perform a large-signal analysis (e.g. Harmonic
Balance analysis) and plot large-signal S11 versus input magnitude on
Smith Chart. Decide whether series or parallel form to use.
Step 6 - Find Z1 = R1 + jX1 (Assuming series form).

April 2012

2006 by Fabian Kung Wai Lee

35

Procedures of Designing Fixed

Frequency Oscillator (2)

Step 7 Find Rs and Xs so that R1 + Rs<0, X1 + Xs=0 at o. We can

use the rule of thumb Rs=(1/3)|R1| to control the harmonics content at
steady-state.
Step 8 - Design the impedance transformation network for Zs and ZL.
Step 9 - Built the circuit or run a computer simulation to verify that the
circuit can indeed starts oscillating when power is connected.
Note: Alternatively we may begin Step 4 using Source Stability
Circle, select s in the unstable region so that R2 or G2 is negative at
o .

April 2012

2006 by Fabian Kung Wai Lee

36

18

Making an Amplifier Unstable (1)

An amplifier can be made unstable by providing some kind of local

positive feedback.
Two favorite transistor amplifier configurations used for oscillator
design are the Common-Base configuration with Base feedback and
Common-Emitter configuration with Emitter degeneration.

April 2012

2006 by Fabian Kung Wai Lee

37

Making an Amplifier Unstable (2)

This is a practical model
of an inductor
Base bypass
capacitor

At 410MHz
S-PARAMETERS

DC
DC
DC1

S_Param
SP1
Start=410.0 MHz
Stop=410.0 MHz
Step=2.0 MHz

SStabCircle

S_StabCircle
S_StabCircle1
SSC=s_stab_circle(S,51)

StabFact

V_DC
SRC1
Vdc=4.5 V

R
Rb1
R=10 kOhm

L
LC
L=330.0 nH
R=

StabFact
StabFact1
K=stab_fact(S)

Common Base
Configuration

LStabCircle

L_StabCircle
L_StabCircle1
LSC=l_stab_circle(S,51)
Vout
Term
Term2
Num=2
Z=50 Ohm

C
Cc2
C=10.0 nF
L
LB
L=22 nH
R=

R
RLB
R=0.77 Ohm

C
Cb
C=10.0 nF

C
CLB
C=0.17 pF

Positive feedback
here
April 2012

pb_phl_BFR92A_19921214
Q1
R
Rb2
L
R=4.7 kOhm
LE
L=330.0 nH
R=

Vin
C
Cc1
C=10.0 nF

Term
Term1
Num=1
Z=50 Ohm

An inductor is added
in series with the bypass
capacitor on the base
terminal of the BJT.
This is a form of positive
series feedback.

R
Re
R=100 Ohm

2006 by Fabian Kung Wai Lee

38

19

Making an Amplifier Unstable (3)

freq
410.0MHz
freq
410.0MHz

K
-0.987
S(1,1)
1.118 / 165.6...

L Plane

s22 and s11 have magnitude > 1

S(1,2)
0.162 / 166.9...

S(2,1)
2.068 / -12.723

S(2,2)
1.154 / -3.535

Unstable Regions

April 2012

s Plane

2006 by Fabian Kung Wai Lee

39

Making an Amplifier Unstable (4)

S-PARAMETERS

DC
DC
DC1

V_DC
SRC1
Vdc=4.5 V

S_Param
SP1
Start=410.0 MHz
Stop=410.0 MHz
Step=2.0 MHz

SStabCircle

S_StabCircle
S_StabCircle1
SSC=s_stab_circle(S,51)

StabFact

R
Rb1
R=10 kOhm

StabFact
StabFact1
K=stab_fact(S)

L
LC
L=330.0 nH
R=

LStabCircle

L_StabCircle
L_StabCircle1
LSC=l_stab_circle(S,51)
Vout

C
Cc1
C=1.0 nF
Term
Term1
Num=1
Z=50 Ohm

C
Cc2
C=1.0 nF
pb_phl_BFR92A_19921214
Q1

R
Rb2
R=4.7 kOhm

C
Ce1
C=15.0 pF

C
Ce2
C=10.0 pF

Term
Term2
Num=2
Z=50 Ohm

Feedback

Common Emitter
Configuration

R
Re
R=100 Ohm

Positive feedback here

April 2012

2006 by Fabian Kung Wai Lee

40

20

Making an Amplifier Unstable (5)

S22 and S11 have magnitude > 1
freq
410.0MHz
freq
410.0MHz

K
-0.516
S(1,1)
3.067 / -47.641

S(1,2)
0.251 / 62.636

S(2,1)
6.149 / 176.803

S(2,2)
1.157 / -21.427

L Plane

s Plane

Unstable
Regions
April 2012

2006 by Fabian Kung Wai Lee

41

Precautions

The requirement Rs= (1/3)|R1| is a rule of thumb to provide the excess

gain to start up oscillation.
Rs that is too large (near |R1| ) runs the risk of oscillator fails to start up
due to component characteristic deviation.
While Rs that is too small (smaller than (1/3)|R1|) causes too much nonlinearity in the circuit, this will result in large harmonic distortion of the
output waveform.
Clipping, a sign of
too much nonlinearity

V2

V2
Rs too small
For more discussion about the Rs = (1/3)|R1| rule,
and on the sufficient condition for oscillation, see
[6], which list further requirements.
April 2012

2006 by Fabian Kung Wai Lee

Rs too large
42

21

Aid for Oscillator Design - Constant

|
1| Circle (1)

In choosing a suitable L to make |L | > 1, we would like to know the

range of L that would result in a specific |1 |.
It turns out that if we fix |1 |, the range of load reflection coefficient that
result in this value falls on a circle in the Smith chart for L .
The radius and center of this circle can be derived from:

Assuming = |1 |:

S D
1 = 11 L
1 S 22L

Tcenter =

April 2012

By fixing |1 | and changing L .

2 S 22* + D*S11
2

D S 22
2

(4.1a)

Radius =

S12 S 21
2

D 2 S 22

(4.1b)

2006 by Fabian Kung Wai Lee

43

Aid for Oscillator Design - Constant

|
1| Circle (2)

The Constant |1 | Circle is extremely useful in helping us to choose a

suitable load reflection coefficient. Usually we would choose L that
would result in |1 | = 1.5 or larger.
Similarly Constant |2 | Circle can also be plotted for the source
reflection coefficient. The expressions for center and radius is similar
to the case for Constant |1 | Circle except we interchange s11 and s22,
L and s . See Ref [1] and [2] for details of derivation.

April 2012

2006 by Fabian Kung Wai Lee

44

22

Example 4.1 CB Fixed Frequency

Oscillator Design

In this example, the design of a fixed frequency oscillator operating at

410MHz will be demonstrated using BFR92A transistor in SOT23
package. The transistor will be biased in Common-Base configuration.
It is assumed that a 50 load will be connected to the output of the
oscillator. The schematic of the basic amplifier circuit is as shown in
the following slide.
The design is performed using Agilents ADS software, but the author
would like to stress that virtually any RF CAD package is suitable for
this exercise.

April 2012

2006 by Fabian Kung Wai Lee

45

Example 4.1 Cont...

Step 1 and 2 - DC biasing circuit design and S-parameter extraction.

S-PAR AME T ER S

DC

S t ab F ac t

DC
D C1

V_DC
SR C1
Vdc =4.5 V

R
Rb1
R=10 kO hm

L
LC
L=330.0 nH
R=

S_Param
SP1
Start=410. 0 MH z
Stop=410.0 MHz
Step=2. 0 MH z

Port 2 - Output

C
Cb
C =1.0 nF

LB is chosen carefully so that the

unstable regions
in both L and s
planes are large
April 2012
enough.

R
Rb2
R=4.7 kOhm

Term
Term 2
Num=2
Z=50 Ohm

C
Cc1
C =1. 0 nF

SStabCircle

S_StabCircle
S_StabCircle1
source_s tabc ir=s_st ab_c irc le(S ,51)

pb_phl_BF R 92A_19921214
Q1
L
LE
L=220.0 nH
R=

LSt abCircle

L_St abCircle
L_St abCircle1
load_s tabcir=l_s tab_c irc le(S, 51)

C
Cc2
C =1. 0 nF
L
LB
L=12. 0 nH
R=

StabFact
StabFact 1
K=st ab_f act (S )

Term
Term 1
Num=1
Z=50 O hm

Port 1

Amplifier

Port 2

R
Re
R =100 Ohm

Port 1 - Input
2006 by Fabian Kung Wai Lee

46

23

Example 4.1 Cont...

freq
410.0MHz
freq
410.0MHz

K
-0.987
S(1,1)
1.118 / 165.6...

S(1,2)
0.162 / 166.9...

S(2,1)
2.068 / -12.723

S(2,2)
1.154 / -3.535

Unstable Regions

Load impedance here will result

in |1| > 1
April 2012

Source impedance here will result

in |2| > 1

2006 by Fabian Kung Wai Lee

47

Example 4.1 Cont...

Step 3 and 4 - Choosing suitable L that cause |1 | > 1 at 410MHz. We

plot a few constant |1 | circles on the L plane to assist us in choosing
a suitable load reflection coefficient.
LSC

This point is chosen

because it is on
real line and easily
matched.

|1 |=1.5
|1 |=2.0

L = 0.5<0

|1 |=2.5
Note: More difficult
to implement load
impedance near
edges of Smith
Chart

ZL = 150+j0

L Plane
April 2012

2006 by Fabian Kung Wai Lee

48

24

Example 4.1 Cont...

Step 5 To check whether the input of the destabilized amplifier is

closer to series or parallel form. We perform large-signal analysis and
observe the S11 at the input of the destabilized amplifier.
LSSP

V_DC
SRC1
Vdc=4.5 V

R
RB1
R=10 kOhm

L
LC
L=330.0 nH
R=

C
Cc2
C=1.0 nF
L
LB
L=12.0 nH
R=

C
CB
C=1.0 nF

pb_phl_BFR92A_19921214
Q1
R
RB2
R=4.7 kOhm

L
LE
L=220.0 nH
R=

Var
Eqn

LSSP
HB1
Freq[1]=410.0 MHz
Order[1]=5
LSSP_FreqAtPort[1]=
SweepVar="Poutv"
Start=-20
Stop=-5
Step=0.2

C
Cc1
C=1.0 nF

VAR
VAR1
Poutv=-10.0

Large-signal
S-parameter
Analysis control
in ADS software.

R
RL
R=150 Ohm

We are measuring
large-signal S11 looking
towards here
P_1Tone
PORT1
Num=1
Z=50 Ohm
P=polar(dbmtow(Poutv),0)
Freq=410 MHz

R
RE
R=100 Ohm

April 2012

2006 by Fabian Kung Wai Lee

49

Example 4.1 Cont...

Compare the locus of S11 and the constant X and constant B circles on
the Smith Chart, it is clear the locus is more parallel to the constant X
circle. Also the direction of S11 is moving from negative R to positive R
as input power level is increased. We conclude the Series form is more
appropriate.
Compare
Region where R or G is negative
1

Direction of S11 as magnitude

of P_1tone source is increased

S(1,1)

Boundary of
Normal Smith Chart

Locus of S11 versus P_1tone

power at 410MHz
(from -20 to -5 dBm)
April 2012

Region where R1 or G1 is positive

Poutv (-20.000 to -5.000)
2006 by Fabian Kung Wai Lee

50

25

Example 4.1 Cont...

Step 6 Using the series form, we find the small-signal input impedance
Z1 at 410MHz. So the resonator would also be a series network.
For ZL = 150 or L = 0.5<0:
S DL
1 = 11
= 1.422 + j 0.479
1 S 22 L

Z1 = Z o

1 + 1
= 10.257 + j 7.851
1 1
R1

X1

Step 7 - Finding the suitable source impedance to fulfill R1 + Rs<0, X1 +

Xs=0:
1

Rs =

R1 3.42
3
X s = X1 7.851

April 2012

2006 by Fabian Kung Wai Lee

51

Example 4.1 Cont...

The system block diagram:

Port 1

Port 2

Zs = 3.42-j7.851

Common-Base (CB)
Amplifier
with feedback

April 2012

2006 by Fabian Kung Wai Lee

ZL = 150

52

26

Example 4.1 Cont...

Step 5 - Realization of the source and load impedance at 410MHz.

Zs= 3.42-j7.851

ZL=150

49.44pF

3.42

27.27nH

CB Amplifier
@ 410MHz

1
C
1
C=
= 49.44 pF
7.851

3.49pF

50

7.851 =

April 2012

Impedance transformation
network
2006 by Fabian Kung Wai Lee

53

Example 4.1 Cont... - Verification Thru

Simulation

Vpp

BFR92A

Vpp = 0.9V
V = 0.45V
Power dissipated in the load:
2

April 2012

2006 by Fabian Kung Wai Lee

PL =

1V
2 RL

= 0.5

0.452
= 2.025mW
50
54

27

Example 4.1 Cont... - Verification Thru

Simulation

Performing Fourier Analysis on the steady state wave form:

The waveform is very clean with
little harmonic distortion. Although
we may have to tune the capacitor
Cs to obtain oscillation at 410 MHz.

484 MHz
April 2012

2006 by Fabian Kung Wai Lee

55

Example 4.1 Cont... The Prototype

Voltage at the base terminal and 50 Ohms load resistor of the
fixed frequency oscillator:

1.4

1.2

Vbb

1.0

0.8

0.6

0.4

0.2

0.0

Vout

-0.2

Output port

-0.4

-0.6

-0.8
0

10

20

30

40

50

60

70

80

90

100

110

120

Startup transient ns
April 2012

2006 by Fabian Kung Wai Lee

56

28

Example 4.2 450 MHz CE Fixed

Frequency Oscillator Design

Small-signal AC or S-parameter analysis, to show that R1 or G1 is

negative at the intended oscillation frequency of 450 MHz.
0

L
LC
L=220.0 nH
R=

R
RB
R=47 kOhm

-200
-300

-1000

-400
-1500
-500

R
RL
R=150 Ohm

C
Cc2
C=330.0 pF

-600

-2000
100

200

300

400

500

600

700

800

freq, MHz
C
C1
C=2.2 pF

pb_phl_BFR92A_19921214
Q1

0.020

0.015
-0.005
0.010
-0.010
0.005

Destabilized
amplifier

imag(Y(1,1))

C
C2
C=4.7 pF

There are simplified

expressions to find C1
and C2, see reference [5].
R
Here we just trial and
RE
R=220 Ohm error to get some
reasonable values.

0.000

real(Y(1,1))

DC_Block
DC_Block1
Term
Term1
Num=1
Z=50 Ohm

-500

real(Z(1,1))

S_Param
SP1
Start=100.0 MHz
Stop=800.0 MHz
Step=10.0 MHz

Selection of load
resistor as in
Example 4.1.

imag(Z(1,1))

V_DC
SRC1
Vdc=3.0 V

-100

S-PARAMETERS

0.000

-0.015
100

200

300

400

500

600

700

800

freq, MHz

April 2012

2006 by Fabian Kung Wai Lee

57

Example 4.2 Cont

The large-signal analysis to check for suitable representation.

LSSP

V_DC
SRC1
Vdc=3.0 V
R
RB
R=47 kOhm

L
LC
L=220.0 nH
R=

S11

LSSP
HB1
Freq[1]=450.0 MHz
Order[1]=7
LSSP_FreqAtPort[1]=
Sw eepVar="Poutv"
Start=-5
Stop=15
Step=0.2

C
Cc2
C=330.0 pF

C
C1
C=2.2 pF

VAR
VAR1
Poutv=-10.0

Since the locus of S11 is close in shape to

constant X circles, and it indicates R1 goes from
negative value to positive values as input power
is increased, we use series form to
represent the input network looking towards
the Base of the amplifier.

R
RL
R=150 Ohm

pb_phl_BFR92A_19921214
Q1

S(1,1)

DC_Block
DC_Block1
P_1Tone
PORT1
Num=1
Z=50 Ohm
P=polar(dbmtow (Poutv),0)
Freq=450 MHz

Var
Eqn

Compare
C
C2
C=4.7 pF

R
RE
R=220 Ohm

Boundary of
Normal Smith Chart
Poutv (-5.000 to 15.000)

April 2012

2006 by Fabian Kung Wai Lee

Direction of S11 as magnitude

of P_1tone source is increased
58
from -5 to +15 dBm

29

Example 4.2 Cont

Using a series RL for the resonator, and performing time-domain

simulation to verify that the circuit will oscillate.
VtPWL
SRC2
V_Tran=pw l(time, 0ns,0V, 2ns,0.1V, 4ns,0V)

1.0

TRANSIENT

R
RB
R=47 kOhm

VC

VL
C
Cc2
C=330.0 pF

VB
C
Cc1
L
C=1.0 nF
L1
L=39.0 nH
R=10

0.5

Tran
Tran1
StopTime=100.0 nsec
L
MaxTimeStep=1.0 nsec
LC
L=220.0 nH
R=

VL, V

V_DC
SRC1
Vdc=3.0 V

R
RL
R=150 Ohm

vL(t)

0.0
-0.5
-1.0
-1.5
0

C
C1
C=2.2 pF

20

60

80

100

time, nsec

Eqn VfL=fs(VL)
R
RE
R=220 Ohm

m1
freq= 450.0MHz
mag(VfL)=0.733

m1

0.8

0.6

mag(VfL)

C
C2
C=4.7 pF

40

pb_phl_BFR92A_19921214
Q1

Large coupling
capacitor

|VL(f)|

0.4

0.2

0.0

April 2012

2006 by Fabian Kung Wai Lee

0.0

0.5

1.0

1.5

2.0

2.5

3.0

3.5

4.0

4.5

5.0

59

freq, GHz

Example 4.3 Parallel Representation

An example where the network looking into the Base of the destabilized
amplifier is more appropriate as parallel RC network.
Var
VAR
Eqn
LSSP
VAR5
Poutv=1.0
LSSP
fo=2300
HB1
Freq[1]=fo MHz
Order[1]=8
LSSP_FreqAtPort[1]=fo MHz
SweepVar="Poutv"
Start=-7
Stop=12
Step=0.2

V_DC
VCC
Vdc=3.3 V
R
RB1
R=1000 Ohm

S11

C
Cdec1
C=100.0 pF
L
LC
L=2 nH
R=0.2

C
Cc2
C=1.0 pF
pb_phl_BFR92A_19921214
Q1
C
Cc1
C=1.2 pF

P_1Tone
PORT1
Num=1
Z=50 Ohm
P=polar(dbmtow(Poutv),0)
R
Freq=fo MHz
RB2
R=1000 Ohm

C
C1
C=0.6 pF {t}

S(1,1)

R
RL
R=50 Ohm

Direction of S11 as magnitude

of P_1tone source is increased
from -7 to +12 dBm

R
C
RE
C2
R=100 Ohm
C=0.7 pF {t}

April 2012

Poutv (-7.000 to 12.000)

2006 by Fabian Kung Wai Lee

Compare

S11 versus
Input power
60

30

Frequency Stability

The process of oscillation depends on the non-linear behavior of the

negative-resistance network.
The conditions discussed, e.g. equations (3.1), (3.8), (3.9), (3.10) and
(3.11) are not enough to guarantee a stable state of oscillation. In
particular, stability requires that any perturbation in current, voltage and
frequency will be damped out, allowing the oscillator to return to its
initial state.
The stability of oscillation can be expressed in terms of the partial
derivative of the sum Zin + Zs or Yin + Ys of the input port (or output
port).
The discussion is beyond the scope of this chapter for now, and the
reader should refer to [1] and [7] for the concepts.

April 2012

2006 by Fabian Kung Wai Lee

61

Some Steps to Improve Oscillator

Performance

To improve the frequency stability of the oscillator, the following steps

can be taken.
Use components with known temperature coefficients, especially
capacitors.
Neutralize, or swamp-out with resistors, the effects of active device
variations due to temperature, power supply and circuit load changes.
Operate the oscillator on lower power.
Reduce noise, use shielding, AGC (automatic gain control) and biasline filtering.
Use an oven or temperature compensating circuitry (such as
thermistor).
Use differential oscillator architecture (see [4] and [7]).

April 2012

2006 by Fabian Kung Wai Lee

62

31

Extra References for This Section

Some recommended journal papers on frequency stability of oscillator:

Kurokawa K., Some basic characteristics of broadband negative
resistance oscillator circuits, Bell System Technical Journal, pp. 19371955, 1969.
Nguyen N.M., Meyer R.G., Start-up and frequency stability in highfrequency oscillators,IEEE journal of Solid-State Circuits, vol 27, no. 5
pp.810-819, 1992.
Grebennikov A. V., Stability of negative resistance oscillator circuits,
International journal of Electronic Engineering Education, Vol. 36, pp.
242-254, 1999.

April 2012

2006 by Fabian Kung Wai Lee

63

Reconciliation Between Feedback and

Negative Resistance Oscillator
Perspectives

It must be emphasized that the circuit we obtained using negative

resistance approach can be cast into the familiar feedback form. For
instance an oscillator circuit similar to Example 4.2 can be redrawn as:
Negative Resistance
Oscillator

V_DC
VCC
Vdc=3.0 V

V_DC
VCC
Vdc=3.0 V
L
LC
L=2.2 nH {t}
R=0.2

L
LC
L=2.2 nH {t}
R=0.2
R
RB1
R=10000 Ohm {t}

R
RE
R=100 Ohm {t}

pb_phl_BFR92A_19921214
Q1
C
C1
C=1.0 pF {t}
C
Cc1
C=4.7 pF

C
C2
C=0.8 pF {t}

April 2012

R
RL
R=50 Ohm

pb_phl_BFR92A_19921214
Q1

R
RL
R=50 Ohm

C
Cc1
C=4.7 pF

VL
C
Cc2
C=1.0 pF

VL
C
Cc2
C=1.0 pF

L
L1
L=15.0 nH {t}
R=0.1

Amplifier

R
RB1
R=10000 Ohm {t}

R
RE
R=100 Ohm {t}

L
L1
L=15.0 nH {t}
R=0.1

2006 by Fabian Kung Wai Lee

C
C1
C=1.0 pF {t}
C
C2
C=0.8 pF {t}

Feedback
Network

64

32

5.0 Voltage Controlled

Oscillator

April 2012

2006 by Fabian Kung Wai Lee

65

About the Voltage Controlled

Oscillator (VCO) (1)

A simple transistor VCO using Clapp-Gouriet or CE configuration will be

designed to illustrate the principles of VCO.
The transistor chosen for the job is BFR92A, a wide-band NPN
transistor which comes in SOT-23 package.
Similar concepts as in the design of fixed-frequency oscillators are
employed. Where we design the biasing of the transistor, destabilize the
network and carefully choose a load so that from the input port (Port 1),
the oscillator circuit has an impedance (assuming series representation
is valid):

Z1 ( ) = R1 ( ) + jX 1 ( )

Of which R1 is negative, for a range of frequencies from 1 to 2.

Lower
April 2012

2006 by Fabian Kung Wai Lee

Upper
66

33

About the Voltage Controlled

Oscillator (VCO) (2)

Clapp-Gouriet
Oscillator Circuit
with Load

Zs

ZL

Z1 = R1 + jX1

April 2012

2006 by Fabian Kung Wai Lee

67

About the Voltage Controlled

Oscillator (VCO) (3)

If we can connect a source impedance Zs to the input port, such that

within a range of frequencies from 1 to 2:

Z s ( ) = Rs ( ) + jX s ( )
Rs ( ) < R1 ( ) R1 ( ) < 0

X s ( ) = X 1 ( )

The circuit will oscillate within this range of frequencies. By changing

the value of Xs, one can change the oscillation frequency.
The rationale is that only the initial spectral of the noise
signal fulfilling Xs = X1 will start the oscillation.

For example, if X1 is positive, then Xs must be negative, and it can be

generated by a series capacitor. By changing the capacitance, one
can change the oscillation frequency of the circuit.
If X1 is negative, Xs must be positive. A variable capacitor in series
with a suitable inductor will allow us to adjust the value of Xs.
April 2012

2006 by Fabian Kung Wai Lee

68

34

Schematic of the VCO

Initial noise
source to start
the oscillation

VtP WL
Vtrig
V_Tran=pwl(t ime, 0ns , 0V, 1ns,0. 01V, 2ns ,0V)
R
Rb
R=47 k Ohm
V_DC
Vcc
Vdc =3.0 V

Variable
capacitance
tuning network

R
V _D C
R1
R=4700 Ohm
S RC1
V dc=-1.5 V

Tran
Tran1
StopTim e=100. 0 ns ec
MaxTimeS tep=1.2 nsec

L
Lc
L=220.0 nH
R=

P ARAM ET ER SWEEP
ParamSweep
Sweep1
SweepVar="R load"
SimI ns tanc eNam e[1] ="Tran1"
SimI ns tanc eNam e[2] =
SimI ns tanc eNam e[3] =
SimI ns tanc eNam e[4] =
SimI ns tanc eNam e[5] =
SimI ns tanc eNam e[6] =
St art=100
St op=700
V ar
VAR
E qn
St ep=100
VAR 1
X=1. 0
R load=100

R
C
Rout
C c2
C =330. 0 pF R=50 O hm

L
L2
L=47. 0 nH
R=

C
Cb1
C=2. 2 pF

C
Cb3
C=4. 7 pF
C
Cb2
C=10. 0 pF

April 2012

T R ANS IE NT

DC
DC
D C1

pb_phl_BF R92A_19921214
Q1

R
RL
R=Rload

R
Re
R=220 O hm

di_s ms _bas 40_19930908

D1
C

2-port network

C b4
C =4.7 pF

2006 by Fabian Kung Wai Lee

69

More on the Schematic

L2 together with Cb3, Cb4 and the junction capacitance of D1 can

produce a range of reactance value, from negative to positive.
Together these components form the frequency determining network.
Cb4 is optional, it is used to introduce a capacitive offset to the junction
capacitance of D1.
R1 is used to isolate the control voltage Vdc from the frequency
determining network. It must be a high quality SMD resistor. The
effectiveness of isolation can be improved by adding a RF choke in
series with R1 and a shunt capacitor at the control voltage.
Notice that the frequency determining network has no actual
resistance to counter the effect of |R1()|. This is provided by the loss
resistance of L2 and the junction resistance of D1.

April 2012

2006 by Fabian Kung Wai Lee

70

35

Time Domain Result

1.0

0.5

0.0

-0.5

-1.0

-1.5
0

10

20

30

40

50

60

70

80

90

100

Vout when Vdc = -1.5V

April 2012

2006 by Fabian Kung Wai Lee

71

Load-Pull Experiment

Peak-to-peak output voltage versus Rload for Vdc = -1.5V.

Vout(pp)

1
100

200

300

400

500

600

700

800

RLoad

April 2012

2006 by Fabian Kung Wai Lee

72

36

Controlling Harmonic Distortion (1)

Since the resistance in the frequency determining network is too small,

large amount of non-linearity is needed to limit the output voltage
waveform, as shown below there is a lot of distortion.

Vout

April 2012

2006 by Fabian Kung Wai Lee

73

Controlling Harmonic Distortion (2)

The distortion generates substantial amount of higher harmonics.

This can be reduced by decreasing the positive feedback, by adding a
small capacitance across the collector and base of transistor Q1. This
is shown in the next slide.

April 2012

2006 by Fabian Kung Wai Lee

74

37

Controlling Harmonic Distortion (3)

The observant
person would
probably notice
that we can also
reduce the harmonic
distortion by introducing
a series resistance in
the tuning network.
However this is not
advisable as the phase
noise at the oscillators
output will increase (
more about this later).
Control voltage
Vcontrol

April 2012

Capacitor to control
positive feedback

DC
DC
DC1

TRANSIENT
Tran
Tran1
StopTime=280.0 nsec
MaxTimeStep=1.2 nsec

VtPWL
L
Vtrig
Lc
V_Tran=pwl(time, 0ns, 0V, 1ns,0.01V, 2ns,0V)
L=220.0 nH
R
R=
Rb
R=47 kOhm
I_Probe
V_DC
I_Probe
Iload
Vcc
IC
Vdc=3.0 V
C
Ccb
C=1.0 pF
L
L2
L=47.0 nH
C
R=
Cb1
pb_phl_BFR92A_19921214
C=6.8 pF
Q1
C
Cb3
C=4.7 pF
C
Cb2
C=10.0 pF

R
R1
V_DC
R=4700 Ohm
SRC1
Vdc=0.5 V

C
Cc2
C=330.0 pF

R
Rout
R=50 Ohm

R
RL
R=50 Ohm

R
Re
R=220 Ohm

di_sms_bas40_19930908
D1
C
Cb4
C=0.7 pF

2006 by Fabian Kung Wai Lee

75

Controlling Harmonic Distortion (4)

The output waveform Vout after this modification is shown below:

Vout

April 2012

2006 by Fabian Kung Wai Lee

76

38

Controlling Harmonic Distortion (5)

Finally, it should be noted that we should also add a low-pass filter

(LPF) at the output of the oscillator to suppress the higher harmonic
components. Such LPF is usually called Harmonic Filter.
Since the oscillator is operating in nonlinear mode, care must be taken
in designing the LPF.
Another practical design example will illustrate this approach.

April 2012

2006 by Fabian Kung Wai Lee

77

The Tuning Range

Actual measurement is carried out, with the frequency measured using

a high bandwidth digital storage oscilloscope.
410

D1 is BB149A,
a varactor
manufactured by
Phillips
Semiconductor (Now
NXP).

405
f

MHz

400

395

0.5

1.5

2.5

Vdc
April 2012

2006 by Fabian Kung Wai Lee

Volts

78

39

Phase Noise in Oscillator (1)

Since the oscillator output is periodic. In frequency domain we would

expect a series of harmonics.
In a practical oscillation system, the instantaneous frequency and
magnitude of oscillation are not constant. These will fluctuate as a
function of time.
vosc (t ) = (Vo + mnoise (t )) cos(t + + noise (t ))
These random fluctuations are noise, and in frequency domain the effect
of the spectra will smear out.
t

Ideal oscillator output

fo

2fo

3fo

Smearing

Real oscillator output

April 2012

2006 by Fabian Kung Wai Lee

fo

2fo

3fo

79

Phase Noise in Oscillator (2)

Mathematically, we can say that the instantaneous frequency and

magnitude of oscillation are not constant. These will fluctuate as a
function of time.
As a result, the output in the frequency domain is smeared out.
v(t)

T = 1/fo

Leesons expression

LPM 10 log

FkT
A

8Q1 L

( )]
fo 2
f offset

t
fo
v(t)

Large phase noise

f
Contains both phase
and amplitude modulation
of the sinusoidal waveform
at frequency fo

t
f
fo

Small phase noise

April 2012

2006 by Fabian Kung Wai Lee

80

40

Phase Noise in Oscillator (3)

Typically the magnitude fluctuation is small (or can be minimized) due

to the oscillator nonlinear limiting process under steady-state.
Thus the smearing is largely attributed to phase variation and is known
as Phase Noise.
Phase noise is measured with respect to the signal level at various
offset frequencies.
Signal level
vosc (t ) Vo cos(t + + noise (t ))
Phase noise is measured in
dBc/Hz @ foffset.
dBc/Hz stands for dB down
from the carrier (the c) in 1 Hz
bandwidth.
For example
-90dBc/Hz @ 100kHz offset
from a CW sine wave at
2.4GHz.

v(t)
- 90dBc/Hz
t

100kHz
f
fo

Assume amplitude limiting effect

Of the oscillator reduces amplitude fluctuation
April 2012

2006 by Fabian Kung Wai Lee

81

Reducing Phase Noise (1)

Requirement 1: The resonator network of an oscillator must have a high

Q factor. This is an indication of low dissipation loss in the tuning
network (See Chapter 3a impedance transformation network on Q
factor).
Xtune

X1

Tuning
Network with
High Q

Variation in Xtune
due to environment
causes small change
in instantaneous
frequency.

Xtune

X1

f
f

-X1

April 2012

2|X1|

Tuning
Network with
Low Q
f

-X1
Ztune = Rtune +jXtune
2006 by Fabian Kung Wai Lee

2|X1|

82

41

Reducing Phase Noise (2)

A Q factor in the tuning network of at least 20 is needed for medium

performance oscillator circuits at UHF. For highly stable oscillator, Q
factor of the tuning network must be in excess or 1000.
We have looked at LC tuning networks, which can give Q factor of up
to 40. Ceramic resonator can provide Q factor greater than 500, while
piezoelectric crystal can provide Q factor > 10000.
At microwave frequency, the LC tuning networks can be substituted
with transmission line sections.
See R. W. Rhea, Oscillator design & computer simulation, 2nd edition
1995, McGraw-Hill, or the book by R.E. Collin for more discussions on
Q factor.
Requirement 2: The power supply to the oscillator circuit should also
be very stable to prevent unwanted amplitude modulation at the
oscillators output.
April 2012

2006 by Fabian Kung Wai Lee

83

Reducing Phase Noise (3)

Requirement 3: The voltage level of Vcontrol should be stable.

Requirement 4: The circuit has to be properly shielded from
electromagnetic interference from other modules.
Requirement 5: Use low noise components in the construction of the
oscillator, e.g. small resistance values, low-loss capacitors and
inductors, low-loss PCB dielectric, use discrete components instead of
integrated circuits.

April 2012

2006 by Fabian Kung Wai Lee

84

42

Example of Phase Noise from VCOs

Comparison of two VCO outputs on a spectrum analyzer*.

VCO output
with high
phase noise

April 2012

VCO output
with low
phase noise

2006 by Fabian Kung Wai Lee

*The spectrum
analyzer internal
oscillator must
of course has
a phase noise of
an order of magnitude
lower than our VCO
under test.

85

More Materials

This short discussion cannot do justice to the material on phase noise.

For instance the mathematical model of phase noise in oscillator and
the famous Leesons equation is not shown here. You can find further
discussion in [4], and some material for further readings on this topic:
D. Schere, The art of phase noise measurement, Hewlett Packard
RF & Microwave Measurement Symposium, 1985.
T. Lee, A. Hajimiri, The design of low noise oscillators, Kluwer,
1999.

April 2012

2006 by Fabian Kung Wai Lee

86

43

More on Varactor

The varactor diode is basically a PN junction optimized for its linear

junction capacitance.
It is always operated in the reverse-biased mode to prevent
nonlinearity, which generate harmonics.
Vj

As we increase the negative

biasing voltage Vj , Cj decreases,
hence the oscillation frequency increases.
Cj
The abrupt junction varactor has high
Q, but low sensitivity (e.g. Cj varies
little over large voltage change).
The hyperabrupt junction varactor
Cjo
Forward biased has low Q, but higher sensitivity.

Reverse biased
Linear region

0
April 2012

Vj
2006 by Fabian Kung Wai Lee

87

A Better Variable Capacitor Network

The back-to-back varactors are commonly employed in a VCO circuit, so that at

low Vcontrol, when one of the diode is being affected by the AC voltage, the other
is still being reverse biased.
When a diode is forward biased, the PN junction capacitance becomes
nonlinear.
The reverse biased diode has smaller junction capacitance, and this dominates
the overall capacitance of the back-to-back varactor network.
This configuration helps to decrease the harmonic distortion.
To negative
resistance
amplifier

At any one time, at least one of

the diode will be reverse biased.
The junction capacitance of the
reverse biased diode will dominate
the overall capacitance of the
network.
Sep 2013

To suppress
RF signals

Vcontrol

2006 by Fabian Kung Wai Lee

Vcontrol

To suppress
RF signals

+
+

Vcontrol

Symbol
for Varactor
88

44

Example 5.1 VCO Design for

Frequency Synthesizer

To design a low power VCO that works from 810 MHz to 910 MHz.
Power supply = 3.0V.
Output power (into 50 load) minimum -3.0 dBm.

April 2012

2006 by Fabian Kung Wai Lee

89

Example 5.1 Cont

Checking the d.c. biasing and AC simulation.

DC
DC
DC1

V_DC
SRC1
Vdc=3.3 V
R
RB
R=33 kOhm

S-PARAMETERS
S_Param
SP1
Start=0.7 GHz
Stop=1.0 GHz
Step=1.0 MHz

b82496c3120j000
LC
param=SIMID 0603-C (12 nH +-5%)

100pF_NPO_0603
Cc2
pb_phl_BFR92A_19921214
Q1
4_7pF_NPO_0603
Term
Cc1
Term1
Num=1
Z=50 Ohm

Z11
April 2012

2_2pF_NPO_0603
C1

R
RL
R=100 Ohm

3_3pF_NPO_0603
C2
R
RE
R=100 Ohm

2006 by Fabian Kung Wai Lee

90

45

Example 5.1 Cont

Checking the results real and imaginary portion of Z1 when output is

terminated with ZL = 100.
m1
freq=775.0MHz
m1=-89.579

m2
freq=809.0MHz
m2=-84.412

-40
-50

imag(Z(1,1))
real(Z(1,1))

-60
-70

m2

-80

m1
-90
-100
-110
-120
0.70

0.72

0.74

0.76

0.78

0.80

0.82

0.84

0.86

0.88

0.90

0.92

0.94

0.96

0.98

1.00

freq, GHz

April 2012

2006 by Fabian Kung Wai Lee

91

Example 5.1 Cont

The resonator design.

S-PARAMETERS

PARAMETER SWEEP
ParamSweep
Sweep1
SweepVar="Vcontrol"
SimInstanceName[1]="SP1"
SimInstanceName[2]=
SimInstanceName[3]=
SimInstanceName[4]=
SimInstanceName[5]=
SimInstanceName[6]=
Start=0.0
Stop=3
Step=0.5

S_Param
SP1
Start=0.7 GHz
Stop=1.0 GHz
Step=1.0 MHz

April 2012

L
L2
L=33.0 nH
R=
100pF_NPO_0603
C2

VAR
VAR1
Vcontrol=0.2

L
L1
L=10.0 nH
R=

Vvar
V_DC
SRC1
Vdc=Vcontrol V

Var
Eqn

BB833_SOD323
D1

2006 by Fabian Kung Wai Lee

C
C3
C=0.68 pF

Term
Term1
Num=1
Z=50 Ohm

92

46

Example 5.1 Cont

The resonator reactance.

-X1 of the destabilized amplifier

120

m1
freq=882.0MHz
m1=64.725
Vcontrol=0.000000

-imag(VCO_ac..Z(1,1))
imag(Z(1,1))

100

80

m1
60

40

Resonator
reactance
as a function of
control voltage

The theoretical tuning

range

20

0
0.70

0.75

0.80

0.85

0.90

0.95

1.00

freq, GHz
April 2012

2006 by Fabian Kung Wai Lee

93

Example 5.1 Cont

The complete schematic with the harmonic suppression filter.

TRANSIENT
Tran
Tran1
StopT ime=1000.0 nsec
MaxTimeStep=1.0 nsec

DC

Low-pass filter

VtPWL
Src_trigger
V_T ran=pwl(time, 0ns,0V, 1ns,0.1V, 2ns,0V)

DC
DC1

V_DC
SRC1
Vdc=3.3 V
R
RB
R=33 kOhm

b82496c3120j000
L3
param=SIMID 0603-C (12 nH +-5%)
100pF_NPO_0603
Cc2

b82496c3150j000
L4
param=SIMID 0603-C (15 nH +-5%)

b82496c3100j000
L1
param=SIMID 0603-C (10 nH +-5%)
4_7pF_NPO_0603 C
Cc1
C6
C=2.2 pF

b82496c3330j000
L2
param=SIMID 0603-C (33 nH +-5%)
Vvar
R
R1
R=100 Ohm

V_DC
SRC2
Vdc=1.2 V

BB833_SOD323
D1

pb_phl_BFR92A_19921214
Q1
2_7pF_NPO_0603
C8

C
C5
C=0.68 pF

C
C7
C=3.3 pF

0_47pF_NPO_0603
C9

R
RL
R=100 Ohm

R
RE
R=100 Ohm

100pF_NPO_0603
C4

April 2012

2006 by Fabian Kung Wai Lee

94

47

Example 5.1 Cont

The prototype and the result captured from a spectrum analyzer (9 kHz
to 3 GHz).

Fundamental
-1.5 dBm

April 2012

Harmonic
VCO
suppression filter
- 30 dBm

2006 by Fabian Kung Wai Lee

95

Example 5.1 Cont

Examining the phase noise of the oscillator (of course the accuracy is
limited by the stability of the spectrum analyzer used).

-0.42 dBm

Span = 500 kHz

RBW = 300 Hz
VBW = 300 Hz

300Hz
April 2012

2006 by Fabian Kung Wai Lee

96

48

Example 5.1 Cont

VCO gain (ko) measurement setup:

Variable
power
supply

V_DC
SRC1
Vdc=3.3 V
R
RB
R=33 kOhm

b82496c3150j000
L4
param=SIMID 0603-C (15 nH +-5%)

100pF_NPO_0603
Cc2
b82496c3100j000
L1
param=SIMID 0603-C (10 nH +-5%)

R
Rattn
R=50 Ohm
4_7pF_NPO_0603
Cc1
C
C5
C=0.68 pF

Vvar
Port
Vcontrol
Num=1

b82496c3120j000
L3
param=SIMID 0603-C (12 nH +-5%)

R
Rcontrol
R=1000 Ohm

C
C6
C=2.2 pF

C
C7
C=3.3 pF

BB833_SOD323
D1

April 2012

pb_phl_BFR92A_19921214
Q1
2_7pF_NPO_0603
C8

Port
Vout
Num=2

Spectrum
Analyzer

0_47pF_NPO_0603
C9

R
RE
R=100 Ohm

2006 by Fabian Kung Wai Lee

97

Example 5.1 Cont

Measured results:
fVCO / MHz

950

900

850

ko 55 MHz = 40.74 MHz/Volt

800

1.35 Volt

750
0.0
April 2012

0.5

1.0

1.5

2.0

2.5

2006 by Fabian Kung Wai Lee

3.0

3.5

4.0

Vcontrol/Volts
98

49