Week 3 - How Computers Work - System Architecture

This describes a design architecture for an electronic digital computer with subdivisions of
a processing unit consisting of the following: an arithmetic logic unit and processor
registers, a control unit containing an instruction register and program counter, a
memory to store both data and instructions, external mass storage and input and output
peripherals.
When people mention computer architectures, there has to be reference to von Neumann
architecture." After his architecture established, virtually every electronic computer system
which was built followed his architecture.
Von Neumann architecture was originated from a 1945 computer architecture description
by a mathematician and physicist known by the name of John von Neumann. He wrote
two papers in 1945: Goldstine, von Neumann in 1963 and von Neumann in 1981. He
was a co author of a third paper in 1946, Burks, et al in 1963. In which this paper he was
the first person to distribute the requirements and the purpose of a electronic computer.
John von Neumann wrote another paper in 1946 paper with the arthurs named W. Burks
and Hermann H. Goldstine. The paper was titled "Preliminary Discussion of the Logical
Design of an Electronic Computing Instrument." The purpose of the paper was to have a
reflective impact on such machines to be developed.
A computer was constructed in 1952 by Von Neumann's design of the EDVAC. This was the
first computer which was constructed and operated in Manchester University in England by
Siewiorek in 1982. The computer ran its first program in 1948 which executed a 96 word
memory. Instructions executed in 1.2 milliseconds which was extraordinary at the time.
In todays "MIPS" terminology (millions of instructions per second), this instruction would be
an equivalent of 0.00083 MIPS. Some of the named supercomputers are can execute
instructions in excess of 1000 MIPS. Computers systems assembling the Cray systems and
the Control Data Cyber 200 models are part of the von Neumann architecture.
In recent years, a number of computer designers have claimed to be "non-von Neumann,"
but some agree to be partly. More emphasis is being put on the obligation from changing
the traditional architecture to achieve more operational and productive systems.
The fifth generation systems are expected to see evolvement to require the significant new
architecture. Von Neumann described design architectures with sectors of digital
computing which include: The processing unit comprising of arithmetic logic
unit and processor registers which is a control unit involving register instructions and
program counter. Von Neumann was the first to describe memory for data storage
with instructions, In addition to external mass storage connecting via input and output. This
memory and mass storage architecture has evolved to a stored program computer in which
an instruction fetch and a data operation is not possible to execute at once because they
share a common bus. This is referred to as the Von Neumann bottleneck which may cause
limitation to the performance of the system.
[3]

PC Architecture
Computer architecture is best described as electronics and computer engineering which are
conventions that describes a computer system. Best by specifying each component and
their relations, for example in high level computer architecture, computer engineers will
base most of their time focusing on how the central processing unit (CPU) performs and
the computer memory usage
Both electronic and computer engineers use PC architects before the process of designing
new computers. With emulation software, programs can be confirming a proposed
instruction set. However at this stage the design can simply be changed. Often collaboration
is made by compiler designers with the architect for improvements in the instruction set.
In recent years, time is measured in clock cycles by modern emulators to estimate energy
consumption in joules. This gives a realistic estimation of code size in bytes which may affect
the convenience of the user. A value of a computer design is estimated by its following: the
battery life, size and expense of the memory which is the largest physical component.
This is the architecture of Intel 965G with ICH8


Electric Basics
A power supply unit (PSU) installed in computer systems and uses high voltage. The mains
AC is converted to low voltage which is then regulated by the DC power for the internal
components for example the motherboard. Modern computer systems generally use
a switched-mode power supply this is an electronic power supply which works by
incorporating a switching regulator converting electrical power efficiently. The Input
voltage can be manually selected by some power supplies

System Buses
System buses where popular in the 1970s and 1980s. A system bus is best defined as the
major components of a computer system assembling the motherboard and hard disk drive
which is connected by a single computer bus. System busses where developed intended to
reduce costs and improve modularity. The functions of a data bus is combined to carry
information with an address bus controlling the recipient of the receiver. The Control bus is
used to regulate its operation. Variety of separate buses are utilised by modern computers.
This is a diagram of a single system computer bus


Address Bus

An address bus is also a computer bus which was invented to connect a series of lines of
multiple devices. Physical addresses are specified using address buses. When
a processor or DMA-enabled device needs to read or write to a memory location, the
memory location is specified on the address bus. This is the value of the physical address
being read or written sending process to the data bus.
amount of memory a system can address is regulated by the width of the address. For
example a can address 2
32
(4,294,967,296) can be addressed by a system with a 32-bit
address bus for memory locations. This means If each memory address holds one byte, the
addressable memory space is 4 GB.
Control bus
A control bus is also part of a computer bus which is used by CPUs for communicating with
other devices within the computer. The CPU gives control buses commands and the bus
carries commands and returns status signals from the devices.








Power-On Self-Test
Power-on self-test (POST) is a process performed by firmware or software routines
immediately after many digital electronic devices are powered on. This is often done on the
following computing devices: personal computers, PDAs, networking devices such as
routers, switches, intrusion detection systems and other monitoring devices. POST is
common in other devices such as, kitchen appliances, avionics, medical equipment and
laboratory test equipment.
Basic Input/Output System
Held in battery-backed memory (CMOS)
Holds basic system configuration
Includes boot sequence details
Loads bootstrap loader from master boot record on disk
Input/output is best described as the communication between an information processing
system for example a single computer and another information processing sytem outside
the network. This could possibly be another user of a information processing system in a
different country. The signals or data received by the system is known as the input, however
the outputs is the signals or data sent from the information processing system. The main
use of input/output is to enable devices of users to communicate with another. For
example, keyboard or a mouse are input devices for a computer, yet
CPU Socket
2 RAM Memory
Slots
monitors and printers are output devices. Devices such as modems and network cards
support both input and output and is able to communicate between multiple computer
systems


Generic Boot Sequence - pt. 1
Generic Boot sequence is also refered as the boot options and boot order. The purpose of
the boot sequence is to enable a computer systems devices to check and load information
before loading into the operating system. Lists the bootable devices which are listed in the
boot sequence, however by accessing the computer's BIOS, this list can be changed.
Here is an BIOS screenshot of a user changing the order of the boot sequence
Phoenix BIOS Boot screen.


In this BIOS Window the sequence has been set for the computer system to first select
removable devices and then boot from this devices. However if no devices are connected to
the computer drive, the BIOS will then attempt to boot from the hard drive. The BIOS will
only boot If an operating system is installed.
Disc drive (CD or DVD) drive, and hard drive are the most common devices that are listed in
the boot sequence. Modern computers may have a USB storage device in the boot
sequence for operating systems to be installed on.
The boot sequence would need to include a CD or DVD drive or a USB storage device when
installing an operating system since these devices typically have higher priority than a hard
drive. Despite once the operating system is installed, higher priority could be the hard drive
in the boot sequence.
Interrupt Handlers.
interrupt handlers is used in systems programming and is also known as Interrupt Service
Routine (ISR). ISR is a callback subroutine for the following: microcontroller
firmware, operating system or device driver. Interrupt handlers have a large number of
functions. The number of functions may vary depending upon the reasons how the
interruption was generated. This also varies on the speed of the interrupt handler
completing each execution. Event handlers which closely resembles another is best referred
as an interrupt handler. The process of event handlers begin when either hardware
interrupts or interrupts in instructions occur in software. Event Handlers can also be used
for servicing hardware devices.
In several operating systems - Linux, Unix, Mac OS X, Microsoft Windows, and some other
operating systems in the past, interrupt handlers are divided into two parts: the First-Level
Interrupt Handler (FLIH) and the Second-Level Interrupt Handlers (SLIH). FLIHs are also
known as hard interrupt handlers or fast interrupt handlers.
The Implementation of FLIH is minimum of specific platform interrupt handling. This is
similar to interrupt routines however there is a context switch In response to an interrupt.
The job of a FLIH is to load and execute quickly to service the interrupt. FLIH records
platform specific critical information which is only available at the interrupts presence.
SLIHs are also known as slow/soft interrupt handlers. The main role of a SLIH is to complete
long interrupt processing tasks, for example each SLIHs performs two actions, they either
have a dedicated kernel thread (task struct with no user space components) or SLIH
executes pool of kernel worker threads and processers.
These threads sit on a run queue in the operating system. Until the processor time is
available for the interrupt to perform. SLIHs generally have a longer execution time than
FLIH. Upper half is the name of FLIH In Linux, and lower half or bottom half for SLIHs, the
names given in other Unix like systems is different since both are a part of bottom half.
Interrupt handlers are divided intro two parts due to the release of several operating
systems: Linux, Unix, Mac, OS X and Microsoft Windows. The First Level Interrupt Handler
(FLIH) is commonly known as hard interrupt handlers or fast interrupt handlers.





Here is a diagram of multiple Interrupt Lines


PC IRQs
Here is an diagram example of Interruption.

Direct Memory Accessing
Modern computers and microprocessors feature Direct memory access (DMA.) This means
system memory can be accessed by certain hardware subsystems within the computer
system for reading and writing independently to the central processing unit. DMA is used by
many hardware systems such as: disk drive, controllers video cards, network
cards and sound cards.
Intra chip data transfer in multi-core processors uses DMA, especially multiprocessor
system-on-chips. This is its processing element which provided by its local memory, Intra
Chip Data is also referred as scratchpad memory.
The main purpose of direct memory access DMA) is for transferring data between a
computer systems local memory and the main memory. DMA channels are featured on
most modern computer systems enabling data transfer to and from devices with weaker
performance CPUs than computers which dont feature a DMA channel.
A multi core processor can transfer data to and from its local memory without over working
the processor time and allowing calculation to be done. Multiple data can be transferred at
once while the processer executes multitudes of data.
Here is a list of Default DMA Allocations
0 - Memory refresh
1 - Sound card (low DMA setting)
2 - Floppy disc
3 - Available
4 - Cascade for 0-3
5 - Sound card (high DMA setting)
6/7 - Available
Other devices
NIC, SCSI, Modem, LPT

Here is a flow chart of a typical PC Bus Architecture

Chipset on a MotherBoard

Peripheral Component Interconnect

PCI parallel, PCI express serial.
PCIe 2 is the twice speed of PCIe 1 and new PCIe 3 will be twice speed of PCIe 2 note
actually needs 10 cycles to send a single byte.
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