Model-Based Design: From Concept to Production

2011 The MathWorks, Inc. 1

A Family Watching Television 1958 USA Source: Wikimedia Commons

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Do you watch TV?

What do you watch?

News?
Movies? Sports?
Source: Wikimedia Commons

How many hours have you watched sports on TV at a stretch?

What do you think is the world record for watching sports on TV at a stretch?
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Source: ESPNZone Press Release, January 4, 2010.

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How do TV broadcasts get from one part of the world to another?

Digital Video and Internet Services via Satellite

QPSK and 8PSK Modulation LDPC Coding

DVB-S2 with ACM (Adaptive Coding Modulation) for IP services including Video over IP. Figure and DVB-S2 Logo adapted from ETSI Technical Report 102 376 v.1.1.1 (2005-02).
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Demonstration: DVB-S2 Communications Link

Modulation and Coding

Model-Based Design: From Concept to Production

RESEARCH REQUIREMENTS

DESIGN

Environment Models

TEST AND VERIFICATION

Physical Components Algorithms

IMPLEMENTATION
C, C++ MCU DSP VHDL, Verilog FPGA ASIC Structured Text PLC

INTEGRATION 8

Whats new to help you design and explore concepts?

RESEARCH REQUIREMENTS

Model multidomain systems Explore and optimize system behavior Collaborate across teams and continents
TEST AND VERIFICATION

DESIGN

Environment Models Physical Components Algorithms

IMPLEMENTATION
C, C++ MCU DSP VHDL, Verilog FPGA ASIC Structured Text PLC

INTEGRATION 9

Whats new to help you design and implement prototypes?

RESEARCH REQUIREMENTS

Model multidomain systems Explore and optimize system behavior Collaborate across teams and continents Generate efficient code Explore and optimize implementation tradeoffs Model concurrent systems
TEST AND VERIFICATION

DESIGN

Environment Models Physical Components Algorithms

IMPLEMENTATION
C, C++ MCU DSP VHDL, Verilog FPGA ASIC Structured Text PLC

INTEGRATION 10

Whats new to help you design, implement, and verify for production?
RESEARCH REQUIREMENTS

Model multidomain systems Explore and optimize system behavior Collaborate across teams and continents Generate efficient code Explore and optimize implementation tradeoffs Model concurrent systems Automate testing Detect design errors Support certification and standards
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DESIGN

Environment Models

TEST AND VERIFICATION

Physical Components Algorithms

IMPLEMENTATION
C, C++ MCU DSP VHDL, Verilog FPGA ASIC Structured Text PLC

INTEGRATION

Whats new to help you design and explore concepts?

RESEARCH REQUIREMENTS

Model multidomain systems Explore and optimize system behavior Collaborate across teams and continents
TEST AND VERIFICATION

DESIGN

Environment Models Physical Components Algorithms

IMPLEMENTATION
C, C++ MCU DSP VHDL, Verilog FPGA ASIC Structured Text PLC

INTEGRATION 12

How much electric energy does it take to run a big screen plasma HDTV for 72 hours?

500 Watts x 72 hours 36 kWh

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Wind is the fastest-growing source of power

Source: Wikipedia

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How do wind turbines work?

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Demonstration: Regulating Wind Turbine Output

Source: Wikipedia

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What We Saw

Model multidomain systems

Include electrical, hydraulic, and mechanical components

Explore and optimize system behavior

Modify design choices and meet specifications
Project

Collaborate across teams and continents

Identify and track changes and revisions with Simulink Projects

Utilities Folder
Component Folder

Test Data Folder

Configuration Set Folder

Project Metadata

Simulink Tools

Revision Control Interface

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DVB-S2: Time- and Event-Driven Subsystems

Queue and Service Time Models (Event-Driven)

Channel and System Models (Time-Driven)

Figure adapted from ETSI Technical Report 102 376 v.1.1.1 (2005-02).

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Discrete-Event Systems SimEvents 4.0

Model:
Channel messages/packets Queues, servers, switches

Analyze and optimize:

End-to-end latencies Throughput / Packet loss

New:
10-100x faster simulations Animation

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New Capabilities
Model multidomain systems

Create custom physical component models: Simscape

Model radio frequency (RF), digital baseband, and radar systems: SimRF, System toolboxes

10-100x faster simulations of discrete-event systems: SimEvents

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New Capabilities
Explore and optimize system behavior

Compare simulation runs: Simulation Data Inspector Save / restore simulation state

Automatically looptune complex Simulink controllers: Robust Control Toolbox

Run multiple scenarios

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New Capabilities
Collaborate across teams and continents

Easily manage multiple design variations

Utilize arrays of buses and For Each blocks for algorithm and signal vectorization

Modularize Stateflow designs using atomic subcharts

Variant selection conditions

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Whats new to help you design and implement prototypes?

RESEARCH REQUIREMENTS

Model multidomain systems Explore and optimize system behavior Collaborate across teams and continents Generate efficient code Explore and optimize implementation tradeoffs Model concurrent systems
TEST AND VERIFICATION

DESIGN

Environment Models Physical Components Algorithms

IMPLEMENTATION
C, C++ MCU DSP VHDL, Verilog FPGA ASIC Structured Text PLC

INTEGRATION 23

MATLAB Today Presentation:

Creating a Panoramic View Using Video Mosaicing

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How do real-time image processing systems work?

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Demonstration: Image Processing on Hardware

Real-Time Prototyping on FPGAs

parallel paths

critical path

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What We Saw

Generate efficient code

Fixed-point design VHDL / Verilog Reports: Traceability Resource Utilization, Optimization

Explore and optimize implementation tradeoffs

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New Capabilities
Generate efficient code
Average RAM reduction for industry models since R2008b

Many C/C++ improvements to optimize RAM, ROM, execution speed

102.00% 100.00% 98.00% 96.00% 94.00%

92.00%

Average

Code replacement optimization for data alignment (e.g., SIMD, Intel IPP, etc.)

90.00% 88.00% 86.00% 84.00% 8b 9a 9b 10a 10b 11a 11b

Automatic code generation for PLC and PAC devices: Simulink PLC Coder

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New Capabilities
Explore and optimize system implementation

Specify Embedded Coder C optimization objectives: Code Generation Advisor Assess memory & stack usage: Static Code Metrics Report AUTOSAR 3.2 support for automotive applications Automate scaling via design range (min/max) analysis: Simulink Fixed Point

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Prototype Concurrent Designs

xPC Target Turnkey

Perform real-time testing of control system applications Implement and distribute Simulink components as concurrent software (CPU) and hardware (FPGA) tasks Dynamically interact with deployed application from Simulink

Example Simulink Components

Mode Scheduler Low-Rate Outer Loop High-Rate Inner Loop

CPU Core 1

CPU CPU Core 2

FPGA

Connect to and communicate with hardware under test

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Whats new to help you design, implement, and verify for production?
RESEARCH REQUIREMENTS

Model multidomain systems Explore and optimize system behavior Collaborate across teams and continents Generate efficient code Explore and optimize implementation tradeoffs Model concurrent systems Automate testing Detect design errors Support certification and standards
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DESIGN

Environment Models

TEST AND VERIFICATION

Physical Components Algorithms

IMPLEMENTATION
C, C++ MCU DSP VHDL, Verilog FPGA ASIC Structured Text PLC

INTEGRATION

Electric motor + controller

Robotic Welding Machine

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How do electric motor controllers work?

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Demonstration: AC Motor Control

Verification

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What We Saw

Automate testing
Measure processor-in-the-loop execution time: Embedded Coder

Detect design errors

Identify and report divide-byzeros, overflows: Simulink Design Verifier

Support certification and standards

Generate System Design Description Report: Simulink Report Generator
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New Capabilities
Automate testing

Verify test completeness and automate test execution: Simulink Verification and Validation Generate test vectors for logic and state-based algorithms: Simulink Design Verifier

Verify code test completeness: LDRA

Create PIL implementation for your embedded processors with open API
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New Capabilities
Detect design errors

Statically detect overflows, range violation, division by zero, and dead logic: Simulink Design Verifier
Prove design does not enter known error state using assertion violation detection: Simulink Design Verifier Detect or prove absence of critical run-time errors and improve quality of C/C++ and Ada: Polyspace products
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New Capabilities
Support certification and standards

Code verification

Automate checking against modeling standards: Simulink Verification and Validation

Automate DO-178 source code reviews: Simulink Code Inspector Support existing and emerging standards EC 61508, ISO 26262, and DO-178: IEC Certification Kit DO Qualification Kit

Model
Embedded Coder

Source code

Code traceability

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Model-Based Design: From Concept to Production

RESEARCH REQUIREMENTS

Model multidomain systems Explore and optimize system behavior Collaborate across teams and continents Generate efficient code Explore and optimize implementation tradeoffs Model concurrent systems Automate testing Detect design errors Support certification and standards
39

DESIGN

Environment Models

TEST AND VERIFICATION

Physical Components Algorithms

IMPLEMENTATION
C, C++ MCU DSP VHDL, Verilog FPGA ASIC Structured Text PLC

INTEGRATION

Next Steps

Fill out evaluation forms Attend technical sessions in the afternoon Network with MathWorks staff and fellow attendees Ask questions

Watch a webinar: www.mathworks.com/company/events/webinars Attend a seminar: mathworks.com/seminars Contact your local sales representatives for trial licenses

Visit mathworks.com for more information

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