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High Step Up Ratio DC DC Converters Part - I

This document discusses high step-up ratio DC-DC converter topologies. It begins by explaining the need for high step-up ratio converters in applications involving low-voltage high-current energy sources and inverters that require an input voltage higher than the line voltage peak. It then reviews several low power and high power converter topologies that can achieve high step-up ratios, including those using coupled inductors and isolated versus non-isolated designs. The document focuses on analyzing the integrated Boost-Flyback converter topology and proposes modifications to reduce switch voltage stress and parasitic oscillations. Simulation and experimental results validating the modified integrated Boost-Flyback converter achieving a high step-up ratio are also presented.
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0% found this document useful (0 votes)
88 views

High Step Up Ratio DC DC Converters Part - I

This document discusses high step-up ratio DC-DC converter topologies. It begins by explaining the need for high step-up ratio converters in applications involving low-voltage high-current energy sources and inverters that require an input voltage higher than the line voltage peak. It then reviews several low power and high power converter topologies that can achieve high step-up ratios, including those using coupled inductors and isolated versus non-isolated designs. The document focuses on analyzing the integrated Boost-Flyback converter topology and proposes modifications to reduce switch voltage stress and parasitic oscillations. Simulation and experimental results validating the modified integrated Boost-Flyback converter achieving a high step-up ratio are also presented.
Copyright
© Attribution Non-Commercial (BY-NC)
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
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High Step-up Ratio DC-DC Converter Topologies

Part I
Speaker: G. Spiazzi
P. Tenti, L. Rossetto, G. Spiazzi, S. Buso, P. Mattavelli, L. Corradini Dept. of Information Engineering DEI University of Padova

Seminar Outline
Why we need high step-up ratio converters?
Application fields

Low power high step-up ratio topologies


Coupled inductors

High power high step-up ratio topologies


Non isolated Isolated

High Step-up Ratio Topologies


Why? Low-voltage high-current energy sources
Fuel-cells (some kW) Paralleled photovoltaic modules in domestic applications (some kW) Microinverter, i.e. connection of a single photovoltaic module to the grid (some hundred watts)

Step-down inverters require an input voltage higher than the maximum line voltage peak
3

Example of Microinverter
Utility grid

Microinverter structure

200-300W High Step-Up Microinverter single pv panel for single panel DC-DC

Modularity Reduction of partial shading effects Dedicated Maximum Power Point Tracker (MPPT)
4

Simple Boost Topology


Boost scheme including some parasitic elements:
Diode model IL
+

UD rD + L rS S Switch model

Io
+

rL

Ui

Ro Uo

Voltage conversion ratio


(neglecting inductor current ripple):

1 1 1 M= = F(d,Uo ,Ro ) 1 d 1 + rD (1 d) + rS d + rL + UD 1 d 2 Uo Ro (1 d)
5

Simple Boost Topology


Voltage conversion ratio M including conduction losses:
M
8

ideal Mmax

Ro
0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1
6

0 0

Duty-cycle

Simple Boost Topology


Converter efficiency:

1 0.95

Pout UoIo UoID = = = = M (1 d) = F(d,Uo ,Ro ) Pin UiIi UiIL

0.9

0.85

Ro

0.8

0.75

0.7 0

0.1

0.2

0.3

0.4

0.5

0.6

0.7

0.8

0.9

1
7

Duty-cycle

Low Power Applications


Example: Example integrated Boost-Flyback converter

ig Ld im Ug S

1:n21 Lm D2 + + C2 U2 Uo D1 + C1 U1

It can be seen as a flyback converter with a non dissipative snubber: D1 and C1 deliver to the output the energy stored in the transformer leakage inductance Ld
8

Integrated Boost-Flyback Converter


Ideal waveforms: - CCM operation of flyback section - DCM operation of boost section
Ug ig Ld im Lm iD2 D2 + + C2 U2 Uo S iD1 D1 + C1 U1

1:n21

im ig t iD1

iD2 t0 t1 t2 t3

t t

t4=Ts-t0

Advantages: ZCS turn on Soft diode turn off Reduced switch voltage stress
9

Integrated Boost-Flyback Converter


Problems: Parasitic oscillations at D2 turn off caused by its capacitance Cr resonating with transformer leakage inductances Ld and Ls
ur ig Ld im Ug S Lm 1:n21 is Ls Cr D2 + + C2 U2 Uo D1 + C1 U1

High voltage stress across D2

Dissipative R-C-D snubber is needed


10

Modified IBF Converter


ur ig Ld im Ug S Lm 1:n21 is Ls Cr x D + 2 + C2 U2 D3 Uo D1 + C1 U1
+

Clamping diode D3 added to the original topology


Advantages: Clean diode voltage waveforms without parasitic oscillations Energy transfer toward the output also during switch turn on interval Slight voltage gain increase due to resonances between parasitic components
11

Modified IBF Converter


ig im

Interval T01 = t1-t0


t iD1
ig Ld Ls im Ug Lm iD2 D2 + + C2 U2 Uo S C1
+

iD2

t t t

iD3 t0 t1 t2 t3 t4 t5 t6

U1

t7=Ts-t0

12

Modified IBF Converter


ig im

Interval T12 = t2-t1


t
ur

iD1

ig Ld Ls im Ug Lm

+ + +

Cr C2 U2 Uo S C1
+

iD2

t t t

iD3 t0 t1 t2 t3 t4 t5 t6

U1

t7=Ts-t0

13

Modified IBF Converter


ig im

Interval T23 = t3-t2


t iD1
ig Ld Ls im Ug Lm D3 C2 iD3
+ + +

iD2

t t t

U2 Uo

iD3 t0 t1 t2 t3 t4 t5 t6

C1

U1

t7=Ts-t0

Note: actual iD3 slope can be either positive or negative


14

Modified IBF Converter


ig im

Interval T34 = t4-t3


t iD1
ig Ld Ls im Ug Lm D3 C2 iD3
+ +

iD2

t t t

U2 Uo

iD1 S

iD3 t0 t1 t2 t3 t4 t5 t6

D1 + C1 U1

t7=Ts-t0

15

Modified IBF Converter


ig im

Interval T45 = t5-t4


t
ur

iD1

ig Ld Ls im Ug Lm

+ + +

Cr C2 U2 Uo iD1 D1 + C1 U1

iD2

t t t

iD3 t0 t1 t2 t3 t4 t5 t6

t7=Ts-t0

16

Modified IBF Converter


ig im

Interval T56 = t6-t5


t iD1
ig Ld Ls im Ug Lm iD2 D2 + + C2 U2 Uo iD1 D1 + C1 U1

iD2

t t t

iD3 t0 t1 t2 t3 t4 t5 t6

t7=Ts-t0

17

Modified IBF Converter


ig im

Interval T67 = t7-t6


t iD1
Ls im Lm iD2 D2 + + C2 U2 Uo

iD2

t t t

iD3 t0 t1 t2 t3 t4 t5 t6

C1

U1

t7=Ts-t0

18

Converter Parameters
Input voltage: Output voltage: Nominal output power: Switching frequency: Magnetizing inductance: Primary leakage inductance: Secondary leakage inductance: Ug = 25-35 V Uo = 400 V Po = 300 W fs = 100 kHz Lm = 20 H Ld = 0.4 H Ls = 2 H

19

Voltage Conversion Ratio


Comparison between calculations and spice simulations
M
21 17 13 9 5 0.4

M1
5.6 5.2 4.8 4.4 4 0.8

Uo M= Ug

U1 M1 = Ug

This unmatched point corresponds to a different topological sequence

0.5

0.6

0.7

Duty-cycle
20

Voltage Conversion Ratio


Effect of resonant intervals on the overall voltage gain
M
14 13 12 11 10 9 8 7 6 0.4 0.45 0.5 0.55

With parasitic components

Uo M= Ug

No parasitic components
0.6 0.65 0.7
21

Duty-cycle

Experimental Results
Ug = 35 V, Uo = 400 V, Po = 300 W
ux [100V/div] uDS [50V/div

ig [2.5A/div]

Peaking due to a small dip in the converter input voltage due to fast current rise time
22

Experimental Results
Ug = 35 V, Uo = 400 V, Po = 300 W
ig im ux uDS ux uDS

t
Impk

ig iD1 t0 t1 t2 iD2 t t t t3 t4 t5 t6

ig

iD3 t0 t1 t2 t3 t4 t5 t6

t7=Ts-t0
23

Experimental Results
Ug = 25 V, Uo = 400 V, Po = 300 W
ig

ux [100V/div] uDS [50V/div


Ug

Ld im Lm

Ls D3 C2 iD3

+ +

U2 Uo

C1

U1

ig [5A/div]

D3 turns off during the switch on interval


t0 t1 t2 t3
24

Measured Efficiency
Po = 300 W
fs = 100kHz

0.95

Po = 200 W
fs = 100kHz

0.94 0.93

0.94

fs = 200kHz
0.93

0.92 0.91 0.90 25

fs = 200kHz

0.92 25

27

29

31

33

35

27

29

31

33

35

Ug [V]

Ug [V]

25

Measured Efficiency
fs = 100 kHz

Ug = 35V
0.95

0.94

Ug = 25V
0.93

0.92 100

150

200

250

300

Po [W]
26

IBF Converter with Voltage Multiplier


Voltage multiplier cell
D2 C 2
+ +

U2

D3 ig Ug Ld im Lm S

C3

U3 Uo

D1 + C1 U1

27

IBF Converter with Voltage Multiplier


IBF converter with voltage multiplier cell versus modified IBF
ur D2 C 2
+ +

U2

ig Ld

1:n21 im Lm

is Ls

Cr x D + 2 + C2 U2 D3 Uo

D3 C3 ig Ug Ld im Lm S

U3 Uo

Ug S

D1 + C1 U1

D1 + C1 U1

Similar behavior with a higher degree of freedom in controlling the switch voltage stress
28

Converter Waveforms
BOOST section in DCM and FLYBACK section in CCM
Igpk Impk

ig
ur + Cr D2 x Np ig Ug Ld im Lm S D3 + C2 U2 is Ns + C3 U3 Uo D1 + C1 U1 +
Imvl

im

Im1 Im2

Ls

t
Impk

iD1
Im1/n21

-is(t2)

iD2
is(t5)

t t t

Im2/n21

iD3 t0 t1 t2 t3 t4

iD3(t3)

t5 t6

t7=Ts-t0
29

Experimental Prototype
Design example:
From the design constraints: M= Uo / Ug=400/35=11.42 Input voltage: M1= U 1/ Ug=75/35=2.143 Ug = 2535V Output voltage: Numerically solving: Uo = 400V d = 0.519, n21 = 4.589 Nominal output power: M2 = U 2/ Ug = 4.823 Po = 300W M3 = M-M1-M2 = U 3/ Ug = 4.454 Switching frequency: fs = 100kHz M 150V rated mosfet Boost output: calculated voltage U1 = 75V gains (continuous 25 Magnetizing inductance: curves) and simulation Lm = 20H results (dotted) 20 Primary leakage inductance: Ld = 0.4H 15 Secondary leakage 10 inductance: Ls = 2H
Based on desired current ripple and DCMCCM mode at nominal power

M1
5 4 3 2 1 0.8
30

5 0.4

0.5

0.6

0.7

Duty-cycle

Experimental results
ux

uDS
ux: 100V/div; uDS: 20V/div; ig: 5A/div

Measured main waveforms in a switching period Ug = 35V, Vo = 400V, Po = 300W


ur + Cr + D2 C2 U2 is Ns x L D3 s im Lm S + C3 U3 Uo D1 + C1 U1 +

ig

Np ig

ux ux uDS uDS
Ug

Ld

zero current turn on


ig t0 t1 t2 t3 t4 t5 ig

layout stray inductances resonance

Details of turn on and turn off intervals

t6

31

Converter efficiency
The converter efficiency was measured as a function of input voltage, at Po=300W,Fig.1, and at Ug=[25V,35V] and variable output power, Fig. 2
Efficiency

Efficiency

0.96

Ug = 35V

0.95

0.95
0.94

0.94

Ug = 25V

0.93 25

27

29

31

33

35

0.93 100

150

200

250

300

Ug [V]

Po [W]

Fig.1

Fig.2

32

Isolated IBF Converter


ur + Cr + D2 C2 U2 is Ns x L D3 s im Lm S + C3 U3 Uo D1 + C1 U1 +

Np ig Ug Ld

For isolation, the lossless snubber D1-C1 is substituted by an active clamp

ig id Ld i C UAC + AC m SAC Lm D2 Np + Cr ur Ls io + C2 U2 + is Uo Ro

Ug

D1

Ns + C1 U1

33

Isolated IBF Converter


Advantages: ZVS turn on Soft diode turn off Reduces switch voltage stress Clean diode voltage waveforms without parasitic oscillations Energy transfer toward the output also during switch turn on interval Reduced active clamp circulating current

34

Converter Operation
Hp: negligible capacitor voltage ripples
id
im(t0) Imvl id(t0) Impk

Interval T01 = t1-t0


ig id Ld im Lm D2 Np Ls io + C2 U2 + is Uo Ro

im t

iSAC

Ug

t iD2
Ug

Ns + C1 U1

t iD1 t0 t1 t2 t3 t4 t5 t6=Ts-t0 t

Soft D2 turn off


35

Converter Operation
Hp: negligible capacitor voltage ripples
id
im(t0) Imvl id(t0) Impk

Interval T12 = t2-t1


ig id Ld im Lm Np + Cr ur Ls io + C2 U2 + is Uo Ro

im t

iSAC

Ug

t iD2
Ug

Ns + C1 U1

t iD1 t0 t1 t2 t3 t4 t5 t6=Ts-t0 t

36

Converter Operation
Hp: negligible capacitor voltage ripples
id
im(t0) Imvl id(t0) Impk

Interval T23 = t3-t2


ig id Ld im Lm Np Ls io + C2 U2 + is Uo Ro

im t

iSAC

Ug

t iD2
Ug

D1

Ns + C1 U1

t iD1 t0 t1 t2 t3 t4 t5 t6=Ts-t0 t

Note: actual iD1 slope can be either positive or negative


37

Converter Operation
Hp: negligible capacitor voltage ripples
id
im(t0) Imvl Impk

Interval T34 = t4-t3


id io + C2 U2 + is Uo Ro Ld Lm Np Ls

im t

id(t0)

i C UAC + AC m SAC

iSAC t iD2
Ug D1

Ns + C1 U1

t iD1 t0 t1 t2 t3 t4 t5 t6=Ts-t0 t

Soft D1 turn off


38

Converter Operation
Hp: negligible capacitor voltage ripples
id
im(t0) Imvl Impk

Interval T45 = t5-t4


id io + Cr ur Ls + C2 U2 + is Uo Ro

im t
Ld Lm Np

id(t0)

i C UAC + AC m SAC

iSAC t iD2
Ug

Ns + C1 U1

t iD1 t0 t1 t2 t3 t4 t5 t6=Ts-t0 t

Reduced active clamp circulating current


39

Converter Operation
Hp: negligible capacitor voltage ripples
id
im(t0) Impk

im
Imvl

Interval T56 = t6-t5


id(t0) id Ld i C UAC + AC m SAC Lm D2 Np Ls io + C2 U2 + is Uo Ro Ns + C1 U1

iSAC t iD2
Ug

t iD1 t3 t4 t5 t6=Ts-t0 t

t0 t1 t2

40

Converter Parameters
Input voltage: Output voltage: Nominal output power: Switching frequency: Magnetizing inductance: Primary leakage inductance: Ug = 25-35 V Uo = 400 V Po = 300 W fs = 100 kHz Lm = 20 H Ld = 0.4 H

Secondary leakage inductance: Ls = 2 H


41

Experimental Results
Ug = 35 V, Uo = 400 V, Po = 300 W (2s/div)
uD1 [100V/div]

uDS [20V/div] id [5A/div]

Peaking due to a small dip in the converter input voltage due to the fast current rise time
42

Experimental Results
Ug = 35 V, Uo = 400 V, Po = 300 W (2s/div)
uD1 [100V/div]

uDS [20V/div] id [5A/div]

The resonant phase reduces the active clamp circulating current

43

Experimental Results
Ug = 35 V, Uo = 400 V, Po = 300 W (2s/div)
Ld C UAC + AC SAC Lm D2 + Cr ur Ls + D1 C1 + C2 + Uo Ro

390 pF external capacitor added


-

Ug

id [5A/div]

The resonant phase reduces the active clamp circulating current

44

Detail of Main Switch Turn On


Ug = 35 V, Uo = 400 V, Po = 300 W
id
im(t0) Imvl Impk

Time scale: 500ns/div


uD1 [100V/div] uDS [20V/div] t

im

id(t0)

iSAC t iD2
Ug

id [5A/div]

t iD1 t0 t1 t2 t3 t4 t5 t6=Ts-t0 t t6 = t0 t1 t2
45

Detail of Main Switch Turn Off


Ug = 35 V, Uo = 400 V, Po = 300 W
id
im(t0) Imvl Impk

Time scale: 500ns/div


uD1 [100V/div] uDS [20V/div] t

im

id(t0)

iSAC t iD2
Ug

id [5A/div]

t iD1 t0 t1 t2 t3 t4 t5 t6=Ts-t0 t
46

t3 t4 t5

Zero Voltage Switching


Detail of the main switch turn on (nominal output power)
uGS [5V/div]

uD1 [100V/div] uDS [20V/div]

id [5A/div]

[200ns/div]

47

Different Operating Mode


Ug = 25 V, Uo = 400 V, Po = 100 W
id Ld D2 Lm io + C2 U2 + Uo Ro D1 + C1 U1 im

uD1 [100V/div] uDS [20V/div]

id [2A/div]

D1 turns off during the switch on interval

48

Measured Efficiency
Power stage only

Ug = 35V
0.95 0.94

Po = 300 W

0.94

Ug = 25V

0.93

0.93

0.92

0.92 100

150

200

250

300

0.91 25

27

29

31

33

35

Po [W]

Ug [V]

49

Comments
There are different topologies presented in literature whose behavior is very similar to the Integrated Boost-Flyback converter. These topologies have a drawback of a discontinuous input current waveform, that make the use of such converters for higher power levels at least problematic. For high power applications, a continuous input current represents a very nice feature

50

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