Analysis and Design of Analog Integrated Circuits Lecture 10 Frequency Response of Amplifiers

Michael H. Perrott February 29, 2012

Copyright 2012 by Michael H. Perrott All rights reserved.

M.H. Perrott

Open Loop Versus Closed Loop Amplifier Topologies

Open Loop
Source
Zsrc Vsrc Vin

Closed Loop
Zf

Source Amp Vout

Vsrc Zsrc Vin

Amp

Vout

Vout/Vin

Vout/Vin

(dB)

(dB)

w0 w1 w2

w (rad/s)

w0

w1 w2

w (rad/s)

Open loop want all bandwidth limiting poles to be as high in frequency as possible Closed loop want one pole to be dominant and all other parasitic poles to be as high in frequency as possible

M.H. Perrott

OCT Method of Estimating Amplifier Bandwidth

MidBand Gain 20log(Vout/Vin) (dB) w (rad/s) Note: w (rad/s) f (Hz) = 2

w0

w1 w2

OCT method calculates

- Compute the effective resistance R -

by the following steps:

thj

seen by each capacitor, Cj, with other caps as open circuits AC coupling caps are not included considered as shorts Form the open circuit time constant Tj = RthjCj for each capacitor Cj Sum all of the open circuit time constants

M.H. Perrott

1 BW Pm rad /s j =1 Rthj Cj

Another Useful Analysis Tool: Miller Effect

Zf

iin Vin Zin

Vout

Derive input impedance (assume gain of amplifier = A):

Zin Vin Vin Vin Zf Zf = = = = iin (Vin Vout )/Zf Vin AVin 1A

Consider the case where Zf is a capacitor

Zf = 1 sC Zin = 1 s(1 A)C

- For negative A, input impedance sees increased cap value - For A = 1, input impedance sees no influence from cap - For A > 1, input impedance sees negative capacitance!
M.H. Perrott

Can be used to create active inductor for a specific frequency

Key Capacitances for CMOS Devices

Top View Side View ID VGS E G Cov S D W Cjsb LD B E L Cj(0) 1 + VSB Cj(0) 1 + VDB B B E junction bottom wall cap (per area) WE + WE + Cjsw(0) 1 + VSB Cjsw(0) 1 + VDB B B junction sidewall cap (per length) (W + 2E)
(make 2W for "4 sided" perimeter in some cases)

Cov Cgc Ccb L LD D Cjdb

VD>V

source to bulk cap: Cjsb = drain to bulk cap: Cjsd =

(W + 2E) 2 C W(L-2LD) 3 ox
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overlap cap: Cov = WLDCox + WCfringe

gate to channel cap: Cgc =

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channel to bulk cap: Ccb - ignore in this class

CMOS Hybrid- Model with Caps (Device in Saturation)

RD RG ID RG RD vgs Cgs Cgd gmvgs -gmbvs ro Cdb

RS

Csb

vs

RS

Cgs = Cgc + Cov = Cgd = Cov Csb = Cjsb Cdb = Cjdb

2 C W(L-2LD) + Cov 3 ox

(area + perimeter junction capacitance) (area + perimeter junction capacitance)

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M.H. Perrott

OCT Thevenin Resistance Calculations

Rthgd ID Rthgd RG Rthgs RS Rthgs vgs RD RG Cgd Cgs gmvgs -gmbvs ro RD

vs

RS

Cgs: Thevenin resistance between gate and source

Rth gs = RS (1 + RD /ro ) + RG (1 + (gmb + 1/ro )RS + RD /ro ) 1 + (gm + gmb )RS + (RS + RD )/ro

Cgd: Thevenin resistance between gate and drain

Rth gd = (RD + RG )(1 rods /ro ) + rods gm RG
where rods = ro || RD 1 + (gm + gmb )RS

M.H. Perrott

OCT Example: Design Wide Bandwidth Amplifier

RL Vout Rin CL Vin

ID

Assumptions: gm = 1/(100), = 0, = 0 Cgs = 10fF, Cgd = 3fF Csb = 5fF, Cdb = 4fF Rin = 4k RL = 1k CL = 100fF

Step 1: identify AC coupling versus OCT capacitors

- AC coupling caps will be regarded as shorts

Step 2: calculate individual OCT time constants Step 3: identify long OCT time constants and modify circuit to improve its bandwidth

M.H. Perrott

Step 1: Identify OCT Capacitors

RL

Rth3 (Cgd) Rin Vin Rth2 (Cgs)

Assumptions: gm = 1/(100), = 0, = 0 Cgs = 10fF, Cgd = 3fF Vout Csb = 5fF, Cdb = 4fF Rin = 4k RL = 1k Rth1 (CL+Cdb) CL = 100fF

Which time constants are easy to calculate? How do we efficiently calculate the more difficult cases?

M.H. Perrott

Step 2: OCT Time Constant Calculations

RL

Rth3 (Cgd) Rin Vin

Assumptions: gm = 1/(100), = 0, = 0 Cgs = 10fF, Cgd = 3fF Vout Csb = 5fF, Cdb = 4fF Rin = 4k RL = 1k Rth1 (CL+Cdb) CL = 100fF

Rth2 (Cgs)

Easy ones: Rth1 = RL ||Rth d = RL || = RL = 1k 1 = 1k 104f F = 104ps Rth2 = Rin ||Rth g = Rin || = Rin = 4k 2 = 4k 10fF = 40ps
where rods

Use formula for 3: Rth gd = (RD + RG )(1 rods /ro ) + rods gm RG

RD = ro || = RD = RL 1 + (gm + gmb )RS

Rth 3 = (RL + Rin )(1 0) + RL gm Rin = 5.5k + 40k = 45.5k

M.H. Perrott

3 = 45.5k 3f F = 136.5ps

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Step 3: Identify Largest OCT Time Constant

RL

Rth3 (Cgd) Rin Vin Rth2 (Cgs)

Assumptions: gm = 1/(100), = 0, = 0 Cgs = 10fF, Cgd = 3fF Vout Csb = 5fF, Cdb = 4fF Rin = 4k RL = 1k Rth1 (CL+Cdb) CL = 100fF

Time constant associated with Cgd is the longest:

3 = 45.5k 3f F = 136.5ps

Why is this time constant so large given that it is associated with the lowest value capacitor? How do we change the amplifier topology to reduce this time constant value?
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M.H. Perrott

The Miller Effect Analysis Provides Helpful Intuition

RL Cgd Rin Vin Vout

Cgd

A
Cin Cin

Notice that Cgd is in the feedback path of the common source amplifier Recall Miller effect calculation: Cin = (1 A)Cgd

- For this amplifier:

A = gm RL Cin = (1 + gm RL )Cgd = 11 Cgd = 33f F

This analysis agrees well with OCT calculation of 136.5ps Can we change the amplifier topology to lower this time constant?
M.H. Perrott
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3 = Rin Cin = 4k 33f F = 132ps

Consider Adding a Cascode Device

RL Vout Vbias Cgd1 Rin M1 Vin Cin M2

Examine the impact of this topological change using the Miller Effect analysis
A = gm1 1 gm2 3 = Rin Cin = 4k 6fF = 24ps 1 Cin = (1 + 1)Cgd1 = 2 Cgd1 = 6f F

Cascode device dramatically reduces the Cgd1 time constant!

M.H. Perrott
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Does the Miller Effect Impact the Cascode Device?

RL Cgd2 Vbias M2 Vout

Rin M1 Vin

Observe that the capacitance seen by Vbias is not of concern since this voltage is not part of the signal path The signal path sees the time constant:

- This time constant is much smaller than the other time

M.H. Perrott

4 = RL ||Rth d2 Cgd2 RL Cgd2 = 1k 3f F = 3ps

constants of the amplifier

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Perform OCT Calculations for Updated Amplifier

Rth4 (Cgd2) Vbias Rth5 (Cgs2) Rth3 (Cgd1) Vin Rin Rth2 (Cgs1) M1 Rth6 (Cds1+Csb2) RL Vout M2 Rth1 (CL+Cdb2)

Assumptions for all devices: gm = 1/(100), = 0, = 0 Cgs = 10fF, Cgd = 3fF Csb = 5fF, Cdb = 4fF Rin = 4k RL = 1k CL = 100fF

Rth5 = Rth s2 ||Rth d1 1/gm2 || = 100 5 = 100 10f F = 1ps

M.H. Perrott

Rth4 = RL ||Rth d2 RL = 1k 3 = 1k 3f F = 3ps

Rth2 = Rin ||Rth g1 = Rin = 4k 2 = 4k 10f F = 40ps

Rth1 = RL ||Rth d2 = RL = 1k 1 = 1k 104f F = 104ps

Rth6 = Rth d1 ||Rth s2 = ||1/gm2 = 100 6 = 100 9f F = 0.9ps

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Perform OCT Calculations for Updated Amplifier

Rth4 (Cgd2) Vbias Rth5 (Cgs2) Rth3 (Cgd1) Vin Rin Rth2 (Cgs1) M1 Rth6 (Cds1+Csb2) RL Vout M2 Rth1 (CL+Cdb2)

Assumptions for all devices: gm = 1/(100), = 0, = 0 Cgs = 10fF, Cgd = 3fF Csb = 5fF, Cdb = 4fF Rin = 4k RL = 1k CL = 100fF

Use Thevenin formula for Cgd calculation: Rth3 = (RD 1 + RG1 )(1 rods /ro1 ) + rods gm1 RG1
where rods

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+ Rin )(1 0) + gm1 Rin = 4.1k + 4k = 8.1k gm 2 gm 2 3 = 8.1k 3f F = 24.3ps

Rth 3 = (

RD 1 = ro1 || 1 + (gm1 + gmb1 )RS 1

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Identify Longest OCT Time Constant

Rth4 (Cgd2) Vbias Rth5 (Cgs2) Rth3 (Cgd1) Vin Rin Rth2 (Cgs1) M1 Rth6 (Cds1+Csb2) RL Vout M2 Rth1 (CL+Cdb2)

Assumptions for all devices: gm = 1/(100), = 0, = 0 Cgs = 10fF, Cgd = 3fF Csb = 5fF, Cdb = 4fF Rin = 4k RL = 1k CL = 100fF

The load capacitance now presents the largest time constant:

Rth1 = RL ||Rth d2 = RL = 1k 1 = 1k 104f F = 104ps

Can we change the amplifier topology to lower this time constant?

M.H. Perrott
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Add a Source Follower to the Output

RL M3 Vbias M2 Vout

Vin

Rin

M1

Ibias

CL

For all devices: gm = 1/(100), = 0, = 0 Cgs = 10fF, Cgd = 3fF Csb = 5fF, Cdb = 4fF Rin = 4k RL = 1k CL = 100fF

Key idea: reduce the time constant associated with CL by decreasing the Thevenin resistance that it sees

- Previous design presented R - Source follower presents R

= 1K to CL ths3 = 1/gm3 = 100 to CL

L

Source follower should reduce CL time constant by a factor of ten!

M.H. Perrott
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Calculation of New CL Time Constant

Rth8 (Cgd3) Rth4 (Cgd2) Vbias Rth5 (Cgs2) Rth3 (Cgd1) Vin Rin Rth2 (Cgs1) M1 RL M3 M2 Rth7 (Cgs3) Ibias Rth6 (Cds1+Csb2) Vout

For all devices: gm = 1/(100), = 0, = 0 Cgs = 10fF, Cgd = 3fF Csb = 5fF, Cdb = 4fF Rin = 4k RL = 1k CL = 100fF

Rth1 (CL+Csb2)

Formal calculation:
Rth1 = Rth s3 = 1/gm3 = 100 1 = 100 104f F = 10.4ps
How large are the additional time constants created by M3?

M.H. Perrott

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Calculation of Additional Time Constants from M3

Rth8 (Cgd3) Rth4 (Cgd2) Vbias Rth5 (Cgs2) Rth3 (Cgd1) Vin Rin Rth2 (Cgs1) M1 RL M3 M2 Rth7 (Cgs3) Ibias Rth6 (Cds1+Csb2) Vout

For all devices: gm = 1/(100), = 0, = 0 Cgs = 10fF, Cgd = 3fF Csb = 5fF, Cdb = 4fF Rin = 4k RL = 1k CL = 100fF

Rth1 (CL+Csb2)

M.H. Perrott

Rth8 = RL ||Rth d2 RL = 1k 8 = 1k 3f F = 3ps RS 3 (1 + RD3 /ro3 ) + RG3 (1 + (gmb3 + 1/ro3 )RS 3 + RD3 /ro3 ) Rth7 = 1 + (gm3 + gmb3 )RS 3 + (RS 3 + RD3 )/ro3 1 + RD3 /ro3 + RG3 (gmb3 + 1/ro3 ) 1+0+0 Rth7 = = = 100 gm3 + gmb3 + 1/ro3 gm 3 + 0 + 0 7 = 100 10f F = 1ps

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Estimate Bandwidth Based on OCT Calculations

Rth8 (Cgd3) Rth4 (Cgd2) Vbias Rth5 (Cgs2) Rth3 (Cgd1) Vin Rin Rth2 (Cgs1) M1 RL M3 M2 Rth7 (Cgs3) Ibias Rth6 (Cds1+Csb2) Rth1 (CL+Csb2) Vout

1 = 2 = 3 = 4 = 5 = 6 = 7 = 8 =

10.4ps 40ps 24.3ps 3ps 1ps 0.9ps 1ps 3ps

11.96 BW = 1.9GHz 2
M.H. Perrott
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BW Pm

1 1 = 11.96 Grad /s = 83.6ps j =1 Rthj Cj

Summary

Two techniques prove very useful when designing amplifiers for desired frequency response behavior

- Open Circuit Time Constant method - Miller Effect analysis

Thevenin resistance analysis in combination with the above offers tremendous insight for designing amplifier topologies

- OCT method allows quick discovery of large time constants - Miller effect provides intuition of the impact of placing capacitors within feedback - Awareness of impedances presented by various
amplifier stages allows intuitive approach to achieve reduction of large time constants

M.H. Perrott

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