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Digital Logic Lab 7

This document discusses encoders, decoders, and demultiplexers. It describes the 74148 8x3 priority encoder chip, which takes 8 binary inputs and outputs a 3-bit binary encoded value. It also describes the 74139 dual 2-to-4 line decoder/demultiplexer chip, which can decode 2-bit addresses to select 4 output lines or function as a demultiplexer. The objective is to study these components and verify their truth tables by building circuits and testing them in the lab.

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Dinesh Pudasaini
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130 views

Digital Logic Lab 7

This document discusses encoders, decoders, and demultiplexers. It describes the 74148 8x3 priority encoder chip, which takes 8 binary inputs and outputs a 3-bit binary encoded value. It also describes the 74139 dual 2-to-4 line decoder/demultiplexer chip, which can decode 2-bit addresses to select 4 output lines or function as a demultiplexer. The objective is to study these components and verify their truth tables by building circuits and testing them in the lab.

Uploaded by

Dinesh Pudasaini
Copyright
© Attribution Non-Commercial (BY-NC)
Available Formats
Download as DOCX, PDF, TXT or read online on Scribd
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Kantipur City College

Putalisadak Kathmandu
Digital logic BIT –II

Experiment No 7

Title: Encoder, Decoder and DE multiplexer

Objectives: To study the operation of Encoder, Decoder and DE multiplexer and to verify their
respective truth table.

Theory:

Encoder: An encoder performs a function that is the opposite of decoder. It receives one or more
signals in an encoded format and output a code that can be processed by another logic circuit. One of the
advantages of encoding data, or more often data addresses in computers, is that it reduces the number of
required bits to represent data or addresses.

74148 8 x 3 Octal to Binary Priority Encoder

The 74148 is a priority encoder with active-low inputs for decimal digits. There are nine inputs lines
(including an enable input) and five output lines, of which three represents the binary code for the octal
digit. Refer to appendix A for IC pinconfiguration. Function of various pins of this IC is described below:

The Priority Encoder solves the problems of encoder by allocating a priority level to each input. The
priority encoders output corresponds to the currently active input which has the highest priority. So
when an input with a higher priority is present, all other inputs with a lower priority will be ignored.

• 0 through 7:Active low data inputs representing the octal digits


• A2, A1, A0:Active low output lines representing the binary code
• E1: Active low enable Input
• E0:Active low output indicating none of the inputs ishigh
• GS:Active low output indicating any of the inputs is high
• VCC and GND:Supply connections lines
Kantipur City College
Putalisadak Kathmandu
Digital logic BIT –II

Table for a 8-to-3 bit priority encoder is given as:

Binary
Digital Inputs
Output
D7 D6 D5 D4 D3 D2 D1 D0 Q2 Q1 Q0
0 0 0 0 0 0 0 1 0 0 0
0 0 0 0 0 0 1 X 0 0 1
0 0 0 0 0 1 X X 0 1 0
0 0 0 0 1 X X X 0 1 1
0 0 0 1 X X X X 1 0 0
0 0 1 X X X X X 1 0 1
0 1 X X X X X X 1 1 0
1 X X X X X X X 1 1 1
Decoder and DE-MUX

The 74139 (common variants 74LS139, 74HC139) is a dual 2-to-4-line decoder/DE multiplexer in the
7400 series. Each side of the chip is a decoder with an active low enable from a 2-bit address to four
active low signals. The two decoders can be wired independently, or a /Y from one decoders can be wired
to the /E on the other to calculate more complex combinational logic functions.

Lab Work:

Connect the circuit diagrams for encoder and decoder/De mux separately and verify their respective truth
table.

Discussion/Conclusion
Kantipur City College
Putalisadak Kathmandu
Digital logic BIT –II

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