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AIC Sample Problems

1. The exam will focus on small signal models, common source amplifiers, and differential amplifiers. Questions will involve analyzing circuits to find transconductance, output resistance, and voltage gain. 2. Sample exam questions include analyzing current mirrors, common gate/drain amplifiers, and common source amplifiers under various loading conditions. Parameters like transconductance, output resistance, and voltage gain will be calculated. 3. A CMOS common source amplifier will be analyzed to find DC biases, transistor parameters, and AC parameters including transconductance, output resistance, and voltage gain. Output voltage swing will also be calculated.

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103 views

AIC Sample Problems

1. The exam will focus on small signal models, common source amplifiers, and differential amplifiers. Questions will involve analyzing circuits to find transconductance, output resistance, and voltage gain. 2. Sample exam questions include analyzing current mirrors, common gate/drain amplifiers, and common source amplifiers under various loading conditions. Parameters like transconductance, output resistance, and voltage gain will be calculated. 3. A CMOS common source amplifier will be analyzed to find DC biases, transistor parameters, and AC parameters including transconductance, output resistance, and voltage gain. Output voltage swing will also be calculated.

Uploaded by

ruchi0690
Copyright
© Attribution Non-Commercial (BY-NC)
Available Formats
Download as PDF, TXT or read online on Scribd
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EEE 433 Sample Exam I Analog Circuit Design Fall 2013

Closed Notes & Books

Note: The exam will be closed books, closed notes. I will hand out the Formula sheet in the class. The focus will be on small signal model, CS amp, and Diff amp (to the end of what we will cover on Thursday 9/26). 1. Examples in the book 2. HW problems given in class Consider the following circuits: Find Gm, Rout, and Gain Av. 3. Ideal Current Mirror Load

4. Non-Ideal Load with PMOS

5. CS with resistor degeneration (with and without body effect)

6. Consider the CMOS Amp Circuit Shown Below with active Load(W/L)1=20m/1m; (W/L)2=40m/1m ; VthN=|VThP|=0.5V; nCox=200A/V2 ; pCox=100A/V2 ; IREF=100A; VAn=|VAp|=5V/m. Find the DC parameters in for the Transistor Q1 and Q2 (W/L)2=(W/L)3 VDSAT-n , VDSAT-p; and IDS = ? Find the AC parameters, Gain, gm, Rout, and Rin for the Circuit.

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EEE 433 Sample Exam I Analog Circuit Design Fall 2013

Closed Notes & Books

7. Draw the small signal of Common Gate, and find the output impedance, Gm, and gain. 8. Draw the small signal of Common Drain (source Follower), and find the output impedance, Gm, and gain. 9. Consider the CMOS CS Amp Circuit with VDD=5, Vb=4 V, I=50A, VDSAT = 0.5 VthN= 0.5, VThP= -0.5V nCox=100A/V2 ; pCox= 50A/V2 N=0.1 V-1, P=0.1 V-1. a. Draw the DC biasing circuit for Vb, and show how to DC bias Vout b. Find W/L and Calculate the DC parameters for the Transistor M1, M2. (For DC Calculations, ignore .) c. Find the AC parameters, gm, Rout, and Voltage Gain Av0. d. Calculate the Maximum output Voltage Swing (peak to peak) while both devices are in Saturation. Plot the output AC + DC voltage at maximum swing. 10. Consider Common Drain circuit. Bulk is connected to the ground. (Vbs is not zero). a. Draw the Small signal model. b. Find the AC output impedance Rout of the Amp. Show all your work in terms of KCL, etc. c. Find the AC Voltage Gain Av = ? 11. Consider a diode connected NMOS Circuit, a. Draw the DC biasing circuit and the AC input signals for measuring the AC small signal impedance at the drain. b. Draw the small signal for the diode connected NMOS and find the AC small signal impedance at the drain. 12. Consider the following circuit, draw the small signal circuit and find the out impedance Rout =? . Assume M1 and M2 are in saturation.

13. Consider the following Differential Amp. a) Calculate the differential-Mode Gain Ad. And common mode gain ACM b) Find CMRR Formulas:

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EEE 433 Sample Exam I Analog Circuit Design Fall 2013

Closed Notes & Books

Triode Region: VGS < VT , VDS < VDSAT ; VDSAT = VGS VT ;


' iD = K n (

W 1 ) (VGS VT )V DS V 2 1 + V DS L 2 DS

Saturation Region:

1 ' W g = K ( )(V VT - V DS ); ds r0 n L GS g = K ' (W )V n m L DS


VGS > VT , VDS > VDSAT ; VDSAT =VGS VT ;

1 W i D = cox ( )(VGS VT )2 (1 + V DS ) 2 L
' VA VA L 1 ro = I D = I D = I D ; 2i D W ' W gm = = 2kn ( )i D = nCox L (VGS VTH ) (VGS VT ) L

Amp Parameters: Rin = Av = vi ii vo vi , Ro = , Gm = vx ix io vi

RL =

vi =0( SC )

RL =

RL =0( SC )

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