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Combinational Devices and ASM Charts

This document contains an 8-question homework assignment on combinational logic devices and asynchronous sequential machines (ASM) charts. The questions involve determining output waveforms for logic circuits, identifying faulty gates, constructing timing diagrams for adders and decoders, and developing block diagrams and ASM charts to model sequential circuits from written descriptions.

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Sunny Kumar
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© Attribution Non-Commercial (BY-NC)
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195 views

Combinational Devices and ASM Charts

This document contains an 8-question homework assignment on combinational logic devices and asynchronous sequential machines (ASM) charts. The questions involve determining output waveforms for logic circuits, identifying faulty gates, constructing timing diagrams for adders and decoders, and developing block diagrams and ASM charts to model sequential circuits from written descriptions.

Uploaded by

Sunny Kumar
Copyright
© Attribution Non-Commercial (BY-NC)
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
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Combinational Devices & ASM Charts Homework Problem Set

Student Name: .. Student Number: .. Session ID (C1 or C2): . Table ID (1-11): ... Group ID (A, B, C):

Homework Problem Set: Combinational Devices & ASM Charts

We will collect these sheets from students at the start of class. Please write clearly and legibly. Answer all questions on this sheet. You may attach additional pages if necessary.

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Combinational Devices & ASM Charts Homework Problem Set

Question 1: (8 marks - 2 per each waveform) Determine the output waveform X for the logic circuit shown below by rst nding the intermediate waveform at each of the points Y1, Y2, Y3, and Y4. Use the input waveforms provided in the timing diagram below.

A B

Y1

Y3

X Y2 Y4

C D

Y1

Y2

Y3

Y4

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Combinational Devices & ASM Charts Homework Problem Set

Question 2: (3 marks) Assuming a propagation delay through each gate os 10 ns, determine if the desired output waveform X in the gure below (a pulse with a minimum tW = 25 ns positioned as shown) will be generated properly with the given inputs. (The grid on the timing diagram is on a 10 ns spacing.) Show your working clearly on the timing diagram below.

A B C D E X

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Combinational Devices & ASM Charts Homework Problem Set

Question 3: ( 2 marks - 1 for the faulty gate + 1 for the type of failure) The circuit below is a logic circuit under test. The observed waveforms are shown. The output waveform is incorrect for the inputs that are applied to the circuit. Assuming that one gate in the circuit has failed, with its output either an apparent constant HIGH or a constant LOW, determine the faulty gate and the type of failure.

A B C D E F

G1

G2

G4

G3

D E

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Combinational Devices & ASM Charts Homework Problem Set

Question 4: ( 4 marks - 2 for each waveform) The input waveforms below are applied to a 2-bit adder. Determine the waveforms for the sum and the output carry in relation to the inputs by constructing a timing diagram.

A0

A1

B0 B1 Cin

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Combinational Devices & ASM Charts Homework Problem Set

Question 5: ( 2 marks) BCD numbers are applied sequentially to the BCD-to-decimal decoder shown below. Draw a timing diagram, showing each output in the proper relationship with the others and with the inputs.

0 1 2 A0 A1 A2 A3 1 2 4 8 3 4 5 6 7 8 9

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Combinational Devices & ASM Charts Homework Problem Set

A0

A1

A2 A3

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Combinational Devices & ASM Charts Homework Problem Set

Question 6: (2 marks) If the data-select lines of the multiplexer shown below are sequenced by the given waveform, determine the output waveform with D0 = 0, D1 = 1, D2 = 1, D3 = 0.

S0 S1 D0 D1 D2 D3

0 1 0 1 2 3 Y

S0

S1

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Combinational Devices & ASM Charts Homework Problem Set

Question 7: (5 marks - 2 for block diagram and 3 for ASM chart)

A clock mode digital system called a start signal generator is to be designed having two inputs READY and GO, and an output Z. The output is to remain 0 until the following sequence of events takes place: READY must go to 1 Following that, Z will go to 1 for a clock period as soon as GO is 1. READY and GO will never be 1 simultaneously. After completion of one entire cycle the READY input must go to 1 to repeat the sequence. Develop a block diagram and an ASM chart.

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Combinational Devices & ASM Charts Homework Problem Set

Question 8: (5 marks - 2 for block diagram and 3 for ASM chart)

Draw a block diagram and an ASM chart having the following description. The circuit has control input C, a clock, and outputs x, y and z. If C = 1, on every rising edge of the clock the outputs x, y and z change through the sequence 000 -> 010 -> 1000 -> 110 -> 000, and so repeats. If C = 0, the circuit holds the present state.

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