CALL FOR CONTRIBUTIONS

DACs technical program offers the best-in-class solutions that promise to advance Electronic Design Automation (EDA) and Embedded Systems and Software (ESS). DAC 2012 is seeking submissions that deal with design technologies and algorithms, addressing all aspects of electronic design across several submission categories. Submission Categories: In addition to well established EDA and ESS subjects, special focus areas in 2012 include embedded software and architectures, multi-core, security, virtualization, energy harvesting, emerging devices, cloud computing, parallelization, 3D, design for manufacturability, cyber-physical systems, bio interfaces, bio sensors, and bio design automation. New SUBMISSION format in 2012: Please note DACs new submission procedures. Authors are asked to submit their work in two stages. In stage one (Abstraction Submission), a title, abstract, and a list of all co-authors must be submitted at the DAC web submission website. In stage two (Manuscript Submission), the paper itself is submitted. Authors are responsible for ensuring that their manuscript submission meets all guidelines, and that the PDF is readable. To ensure fairness for all submitters, there will be no grace periods to fix problematic submission. New RESAERCH PAPER format in 2012: DAC encourages authors to submit in addition to the 6 pages self-contained paper up to 4 pages of supplemental material (similar in concept to appendices) that may include derivations, formal proofs, extensive experimental findings, commentary, traps for the wary, and/or detailed examples. The manuscript should stand on its own. Each section (numbered S1, S2, ... ) within the supplementary material should clarify or expand on a concept already discussed in the 6-page manuscript. The four pages are supplemental for the benefit of the reader. Papers without the supplementary material will not be penalized during the review process. Authors are responsible for ensuring that their manuscript meets the paper-length guidelines. There will be no resubmissions to correct this issue. New DACs FAQs: Consult our list of Frequently Asked Questions, for each type of submission area. DAC invites submissions in the following categories: Electronic Design Automation (EDA) Research Papers Embedded Systems and Software (ESS) Research Papers Perspectives Papers (new) Work-in-Progress (WIP) Abstracts Wild and Crazy Ideas (WACI) short papers User Track Extended Abstracts Special Session Proposals Tutorial & Panel Proposals Workshop Proposals Colocated Conference Proposals

Electronic Design Automation (EDA) Research Papers

ABSTRACT SUBMISSION: DUE BEFORE 5:00pm MT, (-7:00 GMT) November 29, 2011 MANUSCRIPT SUBMISSION: DUE BEFORE 5:00pm MT, (-7:00 GMT) December 5, 2011
All research paper submissions MUST adhere to the following rules, and papers that do not adhere to these rules will not be considered for any resubmission. 1. be in PDF format only 2. contain an abstract of approximately 60 words clearly stating the significant contribution, impact, and results of the submission 3. the paper must not exceed ten pages (including the abstract, figures, tables, and references, supplemental material), double-columned, 9-pt or 10-pt font, and the manuscript must not exceed a total of ten pages including the paper and the supplementary material. 4. MUST NOT identify the author(s) by their name(s) or affiliation(s) anywhere on the manuscript or abstract, with all references to the author(s)s own previous work or affiliations in the bibliographic citations being in the third person. 5. list all authors and their affiliations in the web-based submission form (i.e., not in the paper); the addition of new authors will not be permitted at the time of manuscript submission, or to an accepted paper. DAC papers go through a double-blind review process; i.e., the identity of authors and reviewers is only known to the TPC co-chairs. DAC ensures that there are no conflicts of interest between authors and reviewers. DAC will compare each submission against a vast database and any paper with significant similarity to previously published works or with papers that are simultaneously under review with other venues with archival publications (e.g., conferences, symposia, journals, and workshops with archival proceedings). Duplicate submissions will be rejected. Furthermore, DAC will notify the technical chair of the venue where the duplicate was submitted. Format templates are available on the DAC website. All research papers will be reviewed as finished papers. Preliminary submissions will be at a disadvantage. A listing of titles of all accepted papers will be posted on the DAC web site on February 10, 2012. Accept/reject notices will be sent to all authors by email on February 20, 2012, and will be available thereafter to all authors by logging into the DAC website after Feb. 10, 2012. Complete instructions for final paper submission and required release forms will be available on the DAC website by March 6, 2012. Authors of accepted papers must sign and submit a copyright release form for their paper. All conference presenters will be required to register at the time of final paper submission, present their paper and participate in a research poster session. ACM and IEEE reserve the right to exclude a paper from archival distribution after the conference if the paper is not presented by one of the co-authors at the conference, or in other exceptional cases. DAC will support the IEEE Prohibited Authors List. Select authors of submitted DAC papers that are not accepted for publication in 2012 will be invited in mid-February 2012 to participate in Work-In-Progress (WIP) poster sessions. They will be asked to submit a 100 word abstract to publish on the website (and not in the proceedings). Authors will also be given the option to post their poster presentation on dac.com.

SUBMISSION CATEGORIES FOR EDA RESEARCH PAPERS

Authors of research papers are required to specify a category from the list below. Authors of submissions that cover cross-cutting topics (e.g. low-power, reliability, 3-D, etc.) should select a category that is closest to the essential contribution of the submission. Authors may choose a second submission category to accommodate cross-cutting contributions. Please note the separate categories for embedded systems and software topics. R2. System-Level Design & Codesign R2.1 System specification, modeling, simulation, verification, and performance analysis R2.2 Scheduling, HW/SW partitioning, HW/SW interface synthesis R2.3 IP and platform-based design R2.4 Security and IP protection R2.5 Design of Multiprocessor System-On-Chip (MPSOC) R2.6 Application-specific processor design tools R3. System-Level Communication and Networks-on-Chip R3.1 Modeling and performance analysis R3.2 Communications-based design, communication and network synthesis R3.3 Optimization for energy, fault tolerance, reliability R3.4 Interfacing and software issues, beyond-the-die communication R3.5 NoC design methodologies, case studies and prototyping R4. Power Analysis and Low-Power Design R4.1 System-level power design and thermal management R4.2 System/Architectural low-power techniques: partitioning, scheduling, and resource management R4.3 High-level power estimation and optimization R4.4 Gate-level power analysis and optimization R4.5 Device and circuit techniques for low-power design R4.6 Power-aware and energy-efficient wireless protocols, algorithms and design techniques R5. Verification R5.1 Functional, transaction-level, RTL, and gate-level modeling and verification of hardware design R5.2 Dynamic simulation, equivalence checking, formal (and semiformal) verification model and property checking R5.3 Emulation and hardware simulators or accelerator engines R5.4 Modeling languages and related formalisms, verification plan development and implementation R5.5 Assertion-based verification, coverage analysis, constrained random testbench generation R6. High-Level Synthesis, Logic Synthesis, and FPGAs R6.1 Combinational, sequential and asynchronous logic synthesis R6.2 Library mapping, cell-based design and optimization R6.3 Transistor and gate sizing, resynthesis R6.4 Interactions between logic design and layout or physical synthesis R6.5 High-level, behavioral, algorithmic, and architectural synthesis, C to gates tools and methods R6.6 Resource scheduling, allocation, and synthesis R6.7 Logic synthesis and physical design techniques for FPGAs R6.8 Configurable and reconfigurable computing R7. Circuit, Interconnect and Manufacturing Simulation and Analysis R7.1 Electrical, thermal, and electro-thermal simulation R7.2 Model order reduction methods R7.3 Interconnect and substrate modeling and extraction R7.4 High-frequency and electromagnetic simulation of circuits R7.5 Process technology characterization, and modeling R7.6 Technology CAD and fab automation R8. Timing Analysis, Integrity and Design Reliability R8.1 Deterministic and statistical timing analysis R8.2 Signal integrity and substrate noise R8.3 Power delivery analysis and optimization R8.4 Electrical and thermal reliability R8.5 Soft errors R8.6 Novel clocking methodologies

R9. Physical Design R9.1 Floorplanning, partitioning, placement R9.2 Buffer insertion, routing, interconnect planning R9.3 Physical verification and design rule checking R9.4 Automated synthesis of clock networks R9.7 Physical design of 3-D integrated circuits R9.8 System-in-package design, package-board codesign R10. Design for Manufacturability R10.1 Reticle enhancement, lithography-related design optimizations R10.2 Design for manufacturability, yield, defect tolerance, cost issues, and DFM impact R10.3 Design for resilience under manufacturing variations R11. Analog, Mixed-Signal, and RF R11.1 Analog, mixed-signal, and RF design methodologies R11.2 Automated synthesis R11.3 Analog, mixed-signal, and RF simulation R11.4 High-frequency design and advanced antenna design for wireless design R12. Testing R12.1 Test quality/reliability, current based test, delay test, low-power test R12.2 Digital fault modeling, automatic test generation, fault simulation R12.3 Digital design for test, test data compression, built-in self test R12.4 Memory test and repair, FPGA testing R12.5 Fault-tolerance and online testing R12.6 Analog/mixed-signal/RF testing, system-in-package (SIP) testing R12.7 Board- and system-level test, system-on-chip (SOC) testing R12.8 Silicon debug and diagnosis, post-silicon design validation R13. Design Automation for System & Synthetic Biology R13.1 Design methodologies for system & synthetic biology R13.2 Tools for engineering parts and devices R13.3 Tools for protein and pathway engineering R13.4 Tools for bridging experimental and computational frameworks R14. New and Emerging Design Technologies (including but not restricted to) R14.1 New transistor structures, devices, and novel process technologies R14.2 Nanotechnologies, nanowires, nanotubes R14.3 Optical devices and communication R14.4 Quantum computing R14.5 Biologically-based or biologically-inspired computing systems R14.6 MEMS, sensors, actuators, imaging devices R14.7 Cyber-physical systems R15. EDA Wild and Crazy Ideas (WACI)

Embedded Systems and Software (ESS) Research Papers

ABSTRACT SUBMISSION: DUE BEFORE 5:00pm MT, (-7:00 GMT) November 29, 2011 MANUSCRIPT SUBMISSION: DUE BEFORE 5:00pm MT, (-7:00 GMT) December 5, 2011
The ESS Track at DAC 2011 was a huge hit, resulting in more than 33% of the conferences technical content focused on ESS. Authors of Research Papers on all aspects of Embedded Systems and Software are encouraged to submit from the topic category from the list below. Authors may choose a second submission category (both from the regular research topics as well as from the focus embedded topics) to accommodate cross-cutting contributions. All Embedded Systems and Software paper submissions must adhere to the same rules outlined for the EDA Research Papers.

Select authors of submitted DAC Embedded Systems and Software papers that are not accepted for publication in 2012 will be invited in mid-February 2012 to participate in Work-In-Progress (WIP) poster sessions. They will be asked to submit a 100-word summary to publish on the website (and not in the proceedings). Authors will also be given the option to post their poster presentation on dac.com. E1. Embedded System Specification and Software Engineering E1.1 Domain-specific programming languages E1.2 Software architectures and software engineering E1.3 Model- and component-based embedded software design E1.4 Software frameworks E1.5 Hardware/software co-specification techniques E2. Embedded Software E2.1 Real-time operating systems and middleware E2.2 Middleware and virtual machines E2.3 OS Runtime support for resources management E2.4 Software techniques for multicore, GPU, multithreaded embedded architectures E2.5 Compilation strategies, code transformation and parallelization techniques for embedded systems E2.6 Static and dynamic timing analysis for embedded systems E2.7 Hardware-dependent software E2.8 Customized interfaces and protocols E2.9 I/O management in embedded systems: device drivers, timers, etc. E3. Architectures for Embedded Systems E3.1 Many- and multi-core embedded architectures E3.2 Application-specific platforms and embedded processors (ASIP) design E3.3. Design of heterogeneous distributed embedded systems including wireless sensor networks E3.4 Run-time and design time reconfigurable platforms and processors E3.5 Architectures for self-adaptive computing systems E3.6 On-chip memory architectures and management: scratchpads, compiler controlled memories, etc. E3.7 Custom storage organizations: flash, etc. E3.8 Custom communication design E4. Embedded System Validation, Verification, Security, Dependability E4.1 Formal verification E4.2 System validation E4.3 Testing and regression analysis E4.4 Hardware/software co-validation E4.5 Hardware and software security and dependability techniques E4.6 Verification techniques for software correctness E5. Embedded Systems Platforms and Case Studies E5.1 Platforms and design flows for domain-specific applications (e.g., avionics, automotive, medical, mobile, multimedia, etc.) E5.2 IP-based design E5.3 Rapid prototyping E5.4 Packaging issues E5.5 Case studies E6. Embedded systems design methodologies E6.1 Modeling embedded constraints: performance, reliability, power, security, etc. E6.2 Early estimation and co-simulation of embedded systems designs E6.3 Multiple-constraint-driven embedded system design exploration, synthesis and optimization E6.4 Design methodologies for pervasive distributed networked embedded systems E6.5 Design methodologies for runtime reconfiguration management, self-adaptive systems and autonomous embedded systems E6.6 System level power management and optimization in embedded systems E7. Embedded Systems and Software (ESS) Wild and Crazy Ideas (WACI)

Perspectives PAPER SUBMISSION

ABSTRACT SUBMISSION: DUE BEFORE 5:00pm MT, (-7:00 GMT) November 29, 2011 MANUSCRIPT SUBMISSION: DUE BEFORE 5:00pm MT, (-7:00 GMT) December 5, 2011
This year, DAC will be soliciting a new class of papers that do not necessarily require original research content. The purpose of this category is to provide a forum for valuable, but non-traditional content for the DAC program. Submissions in this category are limited to 8 pages in length and will undergo a thorough review process in the appropriate technical subcommittee, and integrated within the technical sessions. Accepted papers will be published in the proceedings. Authors must specify their submission as a Perspective submission during the ABSTRACT SUBMISSION stage. Examples for submissions in this category include, but are not limited to: * Surveys or historical perspectives on an important problem * New problem formulations and benchmarks * Critiques of a current subset of CAD literature (e.g., parallel CAD, floorplanning,..) * Descriptions of new, yet relatively unexplored CAD problems * Commentary on keynote or plenary talks from other EDA conferences that have not been published * Visualization of complex design or algorithmic data * New design / algorithm quality metrics or quantification methods * Applications of EDA algorithms to non-traditional EDA applications * Detailed comparisons and analysis of previously published approaches to better quantify value * Position papers that present opinions on important problems and how it can be attacked

WORK-IN-PROGRESS (WIP) ABSTRACTS

SUBMISSION DUE BEFORE 5:00pm MT, (-7:00 GMT) March 12, 2012 Authors are invited to submit a one-page abstract.
In contrast to other tracks at DAC, this track aims to provide authors an opportunity for early feedback on work-inprogress or to share early results. A WIP submission must be one page in length, in PDF format, and clearly specify a technical problem, outline a solution, and provide some early results. WIP submissions will be accepted for presentation at a poster session. A WIP submission will not be included in the DAC proceedings. The 100-word summary abstract will be published on the website. A WIP presentation at DAC is not considered a DAC publication. WIP submissions will be reviewed by the Technical Program Committee and expert external reviewers, but no specific feedback will be provided. Acceptance notices will be available by logging in to the DAC website after April 16, 2012. The 100-word summary abstract will be placed on the dac.com website once the submission is accepted. WIP authors are at liberty to submit an extended version of their work to other conferences and to journals without violating common codes of ethics. Some authors of submitted DAC research and embedded systems and software papers that are not accepted for publication in 2012 will be given WIP pre-selected status. These authors will be invited in mid-February 2012 to participate in the WIP poster sessions. The authors will be asked to submit a 100-word summary abstract to be published on the website (and not in the proceedings). WIP submissions received by the WIP deadline are expected to be competitive with the WIP pre-selected submissions. The number of planned poster sessions will be commensurate with the quality of WIP submissions.

USER TRACK PAPERS EXTENDED ABSTRACTS

ABSTRACT SUBMISSION DUE BEFORE 5:00pm MT, (-7:00 GMT) January 16, 2012
The User Track addresses practical and pressing issues facing IC designers, application engineers, and design-flow developers. Contributions provide insights and experiences with in-house and commercial EDA tool flows. User Track submissions may describe the application of EDA tools to the design of a novel electronic system, or the integration of EDA tools within a design flow or methodology to produce such systems. A User Track submission may be problem-

specific in scope (e.g., analysing substrate coupling during floorplanning) or may address a specific application domain (e.g., designing wireless handsets). The User Track has two components: a presentation track that runs parallel to other DAC tracks, and a poster track. User Track presentations and posters are not included in the DAC proceedings. However, User Track material will be posted on the DAC website after the conference. A Best Presentation award will be selected from the User Track accepted submissions. The award will be based on both the quality of the submission and the DAC presentation itself. The award will be presented prior to the Thursday Keynote. To spare authors the many hours of preparation associated with a regular paper submission, User Track submissions are in the form of a two-page extended abstract. Authors of accepted submissions will be invited to present a poster during a User Track poster session. Authors of particularly high-quality submissions will be invited to submit their work in the form of a slide presentation for a second review round. Authors of successful second-round submissions will be invited to present their work orally during a User Track session. SUBMISSION DETAILS An extended abstract is expected to include the following details: 1) A title 2) Name, affiliation, phone number and email addresses for all authors. Authors may NOT be added after the confirmation forms are returned (once the abstract is selected), so be sure to list all authors in the initial submission. 3) An introduction that specifies the context and motivation of the submission. Examples: identify challenges associated with the task accomplishing with the tools; clarify where in the design process the tools are used; explain why the problem addressed is of interest to the audience. 4) A summary of the specific contributions of your work. Examples: innovative use of tools to achieve a specific goal; user enhancements to the tool or the tool flow; dealing with scalability; details of integrating IP; study of design trade-offs; interfacing with manufacturing. 5) A summary that highlights results. Results are needed to evaluate the impact of your contribution. Metrics that could be used include productivity enhancement, improved quality of silicon, decreased complexity, and reduced time-to-market.

6)

Citations, if appropriate

Extended abstracts are limited to two pages. Up to two additional pages of references, diagrams, and figures may be included as you deem appropriate. Submissions must be in PDF and can be formatted as single or double column. Enough detail must be provided for the Technical Program Committee to evaluate the potential quality and interest of a poster or presentation at DAC. A one or two-paragraph summary will not fulfil this requirement. USER TRACK SUBMISSION CATEGORIES User Track authors must specify one of the three primary categories from the list below. U1. Embedded Systems and Software U1.1 Architectural exploration, design and optimization U1.2 Software specification, models and frameworks U1.3 Security for embedded systems and software U1.4 Validation and verification U1.5 Design methodologies and flows U1.6 Case studies

U2. Silicon Design (Front-End) U2.1 System and high-level hardware synthesis U2.2 Power/area/performance trade-offs and low-power design U2.3 Bus and network communication U2.4 Logic simulation U2.5 Validation, test planning, and coverage U2.6 FPGAs and emulation U2.7 Formal verification U3. Silicon Design (Back-End) U3.1 Physical synthesis tools and techniques U3.2 Floor planning U3.3 Timing and circuit analysis; circuit optimization U3.4 Reliability U3.5 Interconnect simulation and analysis U3.6 Physical design and manufacturability U3.7 Manufacturing test and silicon debug U3.8 Analog, mixed-signal, and RF design U3.9 Custom, standard cell, and FPGA design flows U3.10 Tool control and integration

WILD AND CRAZY IDEAS (WACI) PAPERS

ABSTRACT SUBMISSION: DUE BEFORE 5:00pm MT, (-7:00 GMT) November 29, 2011 MANUSCRIPT SUBMISSION: DUE BEFORE 5:00pm MT, (-7:00 GMT) December 5, 2011
DAC invites submissions with genuinely forward-looking, radical, and innovative ideas in the area of electronic design or electronic design automation. The WACI sessions feature novel (and even preliminary or unproven) technical ideas. The aim of WACI is to promote revolutionary and way-out ideas that do not fit the conventional mold, that inspire discussion among conference attendees, that create a buzz, and that get people talking. Research that incrementally improves on prior work is not suited for this category. Submissions to the Wild and Crazy Ideas track must not exceed a total of two pages, but must otherwise follow the above rules and deadlines for the research papers. Unlike a DAC research paper that explores a specific technology problem and proposes a complete solution to it, with extensive experimental results, a WACI paper could present less developed but highly innovative ideas related to areas relevant to DAC. All WACI accepted papers will be required to post a two-minute video describing the work as part of the acceptance process. DAC 2010 WACI videos may be seen at http://www.dac.com/47th+dac+videos+waci+videos.aspx

SPECIAL SESSION PROPOSALS

SUBMISSIONS DUE BEFORE 5:00pm MT, (-7:00 GMT) November 2, 2011
A special session is devoted to a topic of strong contemporary or future interest. The topic must represent an emerging area that does not yet receive sufficient focus from research papers. A submission must list at least three inspiring speakers who address the topic from different angles. Special session proposals must include descriptions of the proposed papers and speakers, and the importance of the special session to the DAC audience. DAC reserves the right to restructure all special session proposals. For early feedback on a proposal topic, please contact the program co-chairs.

PANEL PROPOSALS
SUBMISSIONS DUE BEFORE 5:00pm MT, (-7:00 GMT) November 2, 2011
The panel topic should be interesting, timely, informative, and enlightening. The topic should be relevant to one or more segments of DAC attendees. A good panel session explores a single, high-level issue or question and has representatives of differing viewpoints. Panel suggestions may include anything that might appeal to the DAC community. DAC is encouraging traditional topics in EDA; for example, DFM, Verification and Physical Design. Special focus areas in 2012 include embedded software and architectures, multi-core, security, virtualization, energy harvesting, emerging devices, cloud computing, parallelization, 3D, design for manufacturability, cyber-physical systems. DAC reserves the right to restructure all panel suggestions.

TUTORIAL PROPOSALS
SUBMISSIONS DUE BEFORE 5:00pm MT, (-7:00 GMT) November 2, 2011
In 2012, DAC tutorials will be scheduled as two-hour, short tutorials presented multiple times on tutorial day such that attendees can cover three topics of their choice. The preferred structure for a tutorial is to have a single speaker for a given session. DAC is looking for tangible, hands-on topics that provide immediate value for the attendee. The areas can cover: Traditional EDA topics (for example How to architect a parallel timing analyzer) Hot design topics (for example How to design a low -power memory controller) Emerging software development topics (for example How to get started on writing iPhone apps)

COLOCATED EVENT PROPOSALS

SUBMISSIONS DUE BEFORE 5:00pm MT, (-7:00 GMT) December 2, 2011
Join Us and Colocate Your Event at DAC! DAC Colocated Conferences are meetings that have already obtained event sponsorship from IEEE, ACM, the EDA Consortium or another organization. DAC invites you to colocate your conference with DAC, whether it is a conference, meeting or some other special event. Colocated Conferences must have a common sponsor with DAC, such as IEEE CEDA, ACM/SIGDA, or EDAC, be at least four hours long and have goals synergistic with those of DAC. Additionally, your conference/event must be financed and organized by you, have its own banking account to pay invoices and cover additional expenses.

WORKSHOP PROPOSALS
SUBMISSIONS DUE BEFORE 5:00pm MT, (-7:00 GMT) January 19, 2011
DAC invites you to organize a workshop on topics related to design, design methodologies, and design automation. DAC workshops are considered a central part of DACs technical program and span anywhere from two to nine hours. A workshop organizer is responsible for developing the agenda, selecting, inviting and confirming the speakers, and communicating the workshop details to the DAC office. DACs responsibility includes the financial management, setting registration fees, coordinating the logistics of the event and publicity.