TPS61160A TPS61161A
www.ti.com SLVS937A MARCH 2009 REVISED JULY 2011
White LED Driver With PWM Brightness Control in 2mm x 2mm QFN Package
Check for Samples: TPS61160A, TPS61161A
1
FEATURES
2.7V to 18V Input Voltage Range 26V Open LED Protection for TPS61160A 38V Open LED Protection for TPS61161A 200mV Reference Voltage With 2% Accuracy PWM Interface for Brightness Control Built-in Soft Start Up to 90% Efficiency 2mm 2mm 0.8mm 6-pin QFN Package With Thermal Pad
DESCRIPTION
With a 40-V rated integrated switch FET, the TPS61160A/61A is a boost converter that drives LEDs in series. The boost converter runs at 600kHz fixed switching frequency to reduce output ripple, improve conversion efficiency, and allows for the use of small external components. The default white LED current is set with the external sensor resistor Rset, and the feedback voltage is regulated to 200mV, as shown in the typical application. During the operation, the LED current can be controlled by a pulse width modulation (PWM) signal applied to the CTRL pin through which the duty cycle determines the feedback reference voltage. In PWM dimming mode, the TPS61160A/61A does not burst the LED current; therefore, it does not generate audible noises on the output capacitor. For maximum protection, the device features integrated open LED protection that disables the TPS61160A/61A to prevent the output from exceeding the absolute maximum ratings during open LED conditions. The TPS61160A/61A is available in a space-saving, 2mm 2mm QFN package with thermal pad.
APPLICATIONS
Cellular Phones Portable Media Players Ultra Mobile Devices GPS Receivers White LED Backlighting for Media Form Factor Display
VI 3 V to 18 V
L1 22 mH
D1
38V MAX
C1 1 mF
TPS61161A VIN SW FB
C2 1 mF
ON/OFF DIMMING CONTROL C3 220 nF
CTRL
COMP GND
Rset 10 W
L1: TDK VLCF5020T-220MR75-1 C1: Murata GRM188R61E105K C2: Murata GRM21BR71H105K D1: ONsemi MBR0540T1
20 mA
Figure 1. Typical Application of TPS61161A
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters.
Copyright 20092011, Texas Instruments Incorporated
TPS61160A TPS61161A
SLVS937A MARCH 2009 REVISED JULY 2011 www.ti.com
This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage. ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more susceptible to damage because very small parametric changes could cause the device not to meet its published specifications.
ORDERING INFORMATION (1)
TA 40C to 85C (1) (2) OPEN LED PROTECTION 26V (typical) 38V (typical) PACKAGE (2) TPS61160ADRV TPS61161ADRV PACKAGE MARKING OBV OBT
For the most current package and ordering information, see the TI Web site at www.ti.com. The DRV package is available in tape and reel. Add R suffix (TPS61160ADRVR) to order quantities of 3000 parts per reel or add T suffix (TPS61160ADRVT) to order 250 parts per reel.
ABSOLUTE MAXIMUM RATINGS
over operating free-air temperature range (unless otherwise noted)
Supply Voltages on VIN VI Voltages on CTRL (2) Voltage on FB and COMP Voltage on SW (2) PD TJ TSTG (1) (2) Continuous Power Dissipation Operating Junction Temperature Range Storage Temperature Range
(2) (2) (1)
VALUE 0.3 to 20 0.3 to 20 0.3 to 3 0.3 to 40 See Dissipation Rating Table 40 to 150 65 to 150
UNIT V V V V C C
Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under recommended operating conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. All voltage values are with respect to network ground terminal.
DISSIPATION RATINGS
BOARD PACKAGE Low-K (1)DRV High-K (1) (2)
(2)
RJC 20C/W 20C/W
RJA 140C/W 65C/W
DERATING FACTOR ABOVE TA = 25C 7.1 mW/C 15.4 mW/C
TA < 25C 715 mW 1540 mW
TA = 70C 395 mW 845 mW
TA = 85C 285 mW 615 mW
DRV
The JEDEC low-K (1s) board used to derive this data was a 3in3in, two-layer board with 2-ounce copper traces on top of the board. The JEDEC high-K (2s2p) board used to derive this data was a 3in3in, multilayer board with 1-ounce internal power and ground planes and 2-ounce copper traces on top and bottom of the board.
RECOMMENDED OPERATING CONDITIONS
MIN VI VO L fdim Duty CIN CO TA TJ (1) (2) Input voltage range, VIN Output voltage range Inductor (1) PWM dimming frequency (2) PWM duty cycle resolution at 10kHz at 30kHz Input capacitor Output capacitor
(1)
TYP
MAX 18 38 22 100
UNIT V V H kHz % F
2.7 VIN 10 5 0.5 1.5 1 0.47 40 40
10 85 125
F C C
Operating ambient temperature Operating junction temperature
These values are recommended values that have been successfully tested in several applications. Other values may be acceptable in other applications but should be fully tested by the user. The device can support the frequency range from 1kHz to 5kHz based on the specification, toff . The output ripple needs to be considered in the range of 1kHz to 5kHz.
Copyright 20092011, Texas Instruments Incorporated
TPS61160A TPS61161A
www.ti.com SLVS937A MARCH 2009 REVISED JULY 2011
ELECTRICAL CHARACTERISTICS
VIN = 3.6 V, CTRL = VIN, TA = 40C to 85C, typical values are at TA = 25C (unless otherwise noted)
PARAMETER SUPPLY CURRENT VI IQ ISD UVLO Vhys V(CTRLh) V(CTRLl) R(CTRL) toff VREF V(REF_PWM) IFB fS Dmax tmin_on Isink Isource Gea Rea fea Input voltage range, VIN Operating quiescent current into VIN Shutdown current Undervoltage lockout threshold Undervoltage lockout hysterisis CTRL logic high voltage CTRL logic low voltage CTRL pull down resistor CTRL pulse width to shutdown Voltage feedback regulation voltage Voltage feedback regulation voltage under brightness control Voltage feedback input bias current Oscillator frequency Maximum duty cycle Minimum on pulse width Comp pin sink current Comp pin source current Error amplifier transconductance Error amplifier output resistance Error amplifier crossover frequency N-channel MOSFET on-resistance N-channel leakage current N-Channel MOSFET current limit Start up current limit Time step for half current limit Open LED protection threshold Open LED protection threshold on FB VREF filter time constant VREF ramp up time Thermal shutdown threshold Thermal shutdown threshold hysteresis Measured on the SW pin, TPS61160A TPS61161A Measured on the FB pin, percentage of Vref, Vref = 200 mV and 20 mV 25 37 5 pF connected to COMP VIN = 3.6 V VIN = 3.0 V VSW = 35 V, TA = 25C D = Dmax D = Dmax 0.56 0.7 0.4 5 26 38 50% 180 213 160 15 s s C C 27 39 240 VFB = 100 mV VFB = 50 mV VFB = 20 mV VFB = 200 mV 500 90 600 93 40 100 100 320 6 500 0.3 0.6 0.7 1 0.84 400 CTRL high to low VIN = 2.7 V to 18 V VIN = 2.7 V to 18 V 400 2.5 196 47 17 200 50 20 204 53 23 2 700 A kHz % ns A A mho M kHz 800 1.2 0.4 1600 Device PWM switching no load CRTL=GND, VIN = 4.2 V VIN falling 2.2 70 2.7 18 1.8 1 2.5 V mA A V mV V V k ms mV mV TEST CONDITIONS MIN TYP MAX UNIT
ENABLE AND REFERENCE CONTROL
VOLTAGE AND CURRENT CONTROL
POWER SWITCH RDS(on) ILN_NFET OC and OLP ILIM ILIM_Start tHalf_LIM Vovp V(FB_OVP) tREF tstep Tshutdown Thysteresis A A ms V A
THERMAL SHUTDOWN
Copyright 20092011, Texas Instruments Incorporated
TPS61160A TPS61161A
SLVS937A MARCH 2009 REVISED JULY 2011 www.ti.com
DEVICE INFORMATION
TOP VIEW
FB
Thermal Pad
VIN
COMP
CTRL
GND
SW
6-PIN 2mm x 2mm x 0.8mm QFN
TERMINAL FUNCTIONS
TERMINAL NAME VIN SW GND FB COMP CTRL Thermal Pad NO. 6 4 3 1 2 5 I/O I I O I O I DESCRIPTION The input supply pin for the IC. Connect VIN to a supply voltage between 2.7V and 18V. This is the switching node of the IC. Connect the inductor between the VIN and SW pin. This pin is also used to sense the output voltage for open LED protection Ground Feedback pin for current. Connect the sense resistor from FB to GND. Output of the transconductance error amplifier. Connect an external capacitor to this pin to compensate the regulator. Control pin of the boost regulator. Enable and disable IC. PWM signal can be applied to the pin for LED brightness dimming as well. The thermal pad should be soldered to the analog ground plane. If possible, use thermal via to connect to ground plane for ideal power dissipation.
Copyright 20092011, Texas Instruments Incorporated
TPS61160A TPS61161A
www.ti.com SLVS937A MARCH 2009 REVISED JULY 2011
FUNCTIONAL BLOCK DIAGRAM
D1
C2
Rset
FB SW Reference Control
Error Amplifer
L1
OLP COMP
2
Vin
C1 PWM Control
C3
CTRL
Soft Start-up
Ramp Generator
Current Sensor
Oscillator
GND 3
TYPICAL CHARACTERISTICS TABLE OF GRAPHS
FIGURE Efficiency TPS61160A/61A Efficiency TPS61160A Efficiency TPS61161A Current limit Current limit PWM dimming linearity Output ripple at PWM dimming Switching waveform Start-up Open LED protection VIN = 3.6 V; PWM Freq = 10 kHz and 40 kHz 8 LEDs; VIN = 3.6 V; ILOAD = 20 mA; PWM Freq = 10 kHz 8 LEDs; VIN = 3.6 V; ILOAD = 20 mA; L = 22 H 8 LEDs; VIN = 3.6 V; ILOAD = 20 mA; L =22 H 8 LEDs; VIN = 3.6 V; ILOAD = 20 mA; L = 22 H TA = 25C VIN = 3.6 V; 4, 6, 8, 10 LEDs; L = 22 H Figure 2 Figure 3 Figure 4 Figure 5 Figure 6 Figure 7 Figure 8 Figure 9 Figure 10 Figure 11
Copyright 20092011, Texas Instruments Incorporated
TPS61160A TPS61161A
SLVS937A MARCH 2009 REVISED JULY 2011 www.ti.com
EFFICIENCY vs OUTPUT CURRENT
100 VI = 3.6 V 90 4 LEDs 6 LEDs
EFFICIENCY vs OUTPUT CURRENT
100 VI = 4.2 V 90
80
8 LEDs
80
Efficiency - %
VI = 3 V VI = 3.6 V
Efficiency - %
10 LEDs 70
70
60 4 (12.8 V), 6 (19.2 V) LEDs 8 (25.6 V),10 (32 V) LEDs
60
50
50 6 LEDs - TPS61160A
40 0 10 20 30 Output Current - mA 40 50
40 0 10 20 30 Output Current - mA 40 50
Figure 2. EFFICIENCY vs OUTPUT CURRENT
100 VI = 12 V 90
Figure 3. SWITCH CURRENT LIMIT vs DUTY CYCLE
1000
900
Switch Current Limit - mA
800
80
Efficiency - %
VI = 3.6 V VI = 5 V
700
70
600
60
500
50 10 LEDs - TPS61161A 40 0 10 20 30 Output Current - mA 40 50
400
300 20
30
40
50 60 Duty Cycle - %
70
80
90
Figure 4.
Figure 5.
Copyright 20092011, Texas Instruments Incorporated
TPS61160A TPS61161A
www.ti.com SLVS937A MARCH 2009 REVISED JULY 2011
SWITCH CURRENT LIMIT vs TEMPERATURE
1000
200 10 kHz, 40 kHz
FB VOLTAGE vs PWM DUTY CYCLE
900
160
Switch Current Limit - mA
800
FB Voltage - mV
120
700
600
80
500
40
400 300 -40
-20
20
40 60 80 Temperature - C
100
120
140
20
40 60 PWM Duty Cycle - %
80
100
Figure 6. OUTPUT RIPPLE at PWM DIMMING
PWM 2 V/div
SW 20 V/div
Figure 7. SWITCHING WAVEFORM
VOUT 20 mV/div AC
VOUT 20 mV/div AC
ILED 10 mA/div
IL 200 mA/div
t - 100 ms/div
t - 1 ms/div
Figure 8. START-UP
CTRL 5 V/div
OPEN LED 5 V/div
Figure 9. OPEN LED PROTECTION
VOUT 10 V/div COMP 500 mV/div
FB 200 mV/div VOUT 10 V/div IL 200 mA/div
IL 200 mA/div
t - 2 ms/div
t - 100 ms/div
Figure 10.
Figure 11.
Copyright 20092011, Texas Instruments Incorporated
TPS61160A TPS61161A
SLVS937A MARCH 2009 REVISED JULY 2011 www.ti.com
DETAILED DESCRIPTION OPERATION
The TPS61160A/61A is a high efficiency, high output voltage boost converter in small package size that is ideal for driving white LED in series. The serial LED connection provides even illumination by sourcing the same output current through all LEDs, eliminating the need for expensive factory calibration. The device integrates 40V/0.7A switch FET and operates in pulse width modulation (PWM) with 600kHz fixed switching frequency. For operation see the block diagram. The duty cycle of the converter is set by the error amplifier output and the current signal applied to the PWM control comparator. The control architecture is based on traditional current-mode control; therefore, a slope compensation is added to the current signal to allow stable operation for duty cycles larger than 50%. The feedback loop regulates the FB pin to a low reference voltage (200mV typical), reducing the power dissipation in the current sense resistor.
SOFT START-UP
Soft-start circuitry is integrated into the IC to avoid a high inrush current during start-up. After the device is enabled, the voltage at FB pin ramps up to the reference voltage in 32 steps, each step takes 213s. This ensures that the output voltage rises slowly to reduce the input current. Additionally, for the first 5msec after the COMP voltage ramps, the current limit of the switch is set to half of the normal current limit spec. During this period, the input current is kept below 400mA (typical). See the start-up waveform of a typical example, Figure 10.
OPEN LED PROTECTION
Open LED protection circuitry prevents IC damage as the result of white LED disconnection. The TPS61160A/61A monitors the voltage at the SW pin and FB pin during each switching cycle. The circuitry turns off the switch FET and shuts down the IC when both of the following conditions persist for 8 switching clock cycles: (1) the SW voltage exceeds the VOVP threshold and (2) the FB voltage is less than half of regulation voltage. As a result, the output voltage falls to the level of the input supply. The device remains in shutdown mode until it is enabled by toggling the CTRL pin logic. To allow the use of inexpensive low-voltage output capacitor, the TPS61160A/61A has different open lamp protection thresholds. The threshold is set at 26V for the TPS61160A and 38V for the TPS61161A. Select the appropriate device so that the product of the number of external LEDs and each LED's maximum forward voltage plus the 200mV reference voltage does not exceed the minimum OVP threshold or (nLEDS X VLED(MAX)) + 200 mV VOVP(MIN).
SHUTDOWN
The TPS61160A/61A enters shutdown mode when the CTRL voltage is logic low for more than 2.5ms. During shutdown, the input supply current for the device is less than 1A (max). Although the internal FET does not switch in shutdown, there is still a DC current path between the input and the LEDs through the inductor and Schottky diode. The minimum forward voltage of the LED array must exceed the maximum input voltage to ensure that the LEDs remain off in shutdown; however, in the typical application with two or more LEDs, the forward voltage is large enough to reverse bias the Schottky and keep leakage current low.
CURRENT PROGRAM
The FB voltage is regulated by a low 0.2V reference voltage. The LED current is programmed externally using a current-sense resistor in series with the LED string. The value of the RSET is calculated using Equation 1: V I LED + FB RSET (1) Where ILED = output current of LEDs VFB = regulated voltage of FB RSET = current sense resistor The output current tolerance depends on the FB accuracy and the current sensor resistor accuracy.
Copyright 20092011, Texas Instruments Incorporated
TPS61160A TPS61161A
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PWM BRIGHTNESS DIMMING
When the CTRL pin is constantly high, the FB voltage is regulated to 200mV typically. However, the CTRL pin allows a PWM signal to reduce this regulation voltage; therefore, it achieves LED brightness dimming. The relationship between the duty cycle and FB voltage is given by Equation 2. V FB + Duty 200 mV (2) Where Duty = duty cycle of the PWM signal 200 mV = internal reference voltage As shown in Figure 12, the IC chops up the internal 200mV reference voltage at the duty cycle of the PWM signal. The pulse signal is then filtered by an internal low pass filter. The output of the filter is connected to the error amplifier as the reference voltage for the FB pin regulation. Therefore, although a PWM signal is used for brightness dimming, only the WLED DC current is modulated, which is often referred as analog dimming. This eliminates the audible noise which often occurs when the LED current is pulsed in replica of the frequency and duty cycle of PWM control. Unlike other scheme which filters the PWM signal for analog dimming, TPS61160A/61A regulation voltage is independent of the PWM logic voltage level which often has large variations. For optimum performance, use the PWM dimming frequency in the range of 5kHz to 100kHz. The requirement of minimum dimming frequency comes from the output ripple. Low frequency causes high output ripple. Since the CTRL pin is logic only pin, applying an external RC filter to the pin does not work.
VBG 200 mV CTRL
Error Amplifier
COMP
FB
Figure 12. Block Diagram of Programmable FB Voltage Using PWM Signal To use lower PWM dimming, add an external RC network connected to the FB pin as shown in the additional typical application (Figure 15).
UNDERVOLTAGE LOCKOUT
An undervoltage lockout prevents operation of the device at input voltages below typical 2.2V. When the input voltage is below the undervoltage threshold, the device is shutdown and the internal switch FET is turned off. If the input voltage rises by undervoltage lockout hysteresis, the IC restarts.
THERMAL SHUTDOWN
An internal thermal shutdown turns off the device when the typical junction temperature of 160C is exceeded. The device is released from shutdown automatically when the junction temperature decreases by 15C.
Copyright 20092011, Texas Instruments Incorporated
TPS61160A TPS61161A
SLVS937A MARCH 2009 REVISED JULY 2011 www.ti.com
APPLICATION INFORMATION MAXIMUM OUTPUT CURRENT
The overcurrent limit in a boost converter limits the maximum input current and thus maximum input power for a given input voltage. Maximum output power is less than maximum input power due to power conversion losses. Therefore, the current limit setting, input voltage, output voltage and efficiency can all change maximum current output. The current limit clamps the peak inductor current; therefore, the ripple has to be subtracted to derive maximum DC current. The ripple current is a function of switching frequency, inductor value and duty cycle. The following equations take into account of all the above factors for maximum output current calculation. 1 IP = 1 1 + ) L Fs ( Vout + Vf - Vin Vin (3) Where: Ip = inductor peak to peak ripple L = inductor value Vf = Schottky diode forward voltage Fs = switching frequency Vout = output voltage of the boost converter. It is equal to the sum of VFB and the voltage drop across LEDs. I out_max + Vin
I lim * I P2
Vout
h
(4)
Where: Iout_max = maximum output current of the boost converter Ilim = over current limit = efficiency For instance, when VIN is 3.0V, 8 LEDs output equivalent to VOUT of 26V, the inductor is 22H, the Schottky forward voltage is 0.2V; and then the maximum output current is 65mA in typical condition. When VIN is 5V, 10 LEDs output equivalent to VOUT of 32V, the inductor is 22H, the Schottky forward voltage is 0.2V; and then the maximum output current is 85mA in typical condition.
INDUCTOR SELECTION
The selection of the inductor affects steady state operation as well as transient behavior and loop stability. These factors make it the most important component in power regulator design. There are three important inductor specifications, inductor value, DC resistance and saturation current. Considering inductor value alone is not enough. The inductor value determines the inductor ripple current. Choose an inductor that can handle the necessary peak current without saturating, according to half of the peak-to-peak ripple current given by Equation 3, pause the inductor DC current given by: I in_DC + Vout Iout Vin h (5) Inductor values can have 20% tolerance with no current bias. When the inductor current approaches saturation level, its inductance can decrease 20% to 35% from the 0A value depending on how the inductor vendor defines saturation current. Using an inductor with a smaller inductance value forces discontinuous PWM when the inductor current ramps down to zero before the end of each switching cycle. This reduces the boost converters maximum output current, causes large input voltage ripple and reduces efficiency. Large inductance value provides much more output current and higher conversion efficiency. For these reasons, a 10H to 22H inductor value range is recommended. A 22H inductor optimized the efficiency for most application while maintaining low inductor peak to peak ripple. Table 1 lists the recommended inductor for the TPS61160A/61A. When recommending inductor value, the factory has considered 40% and +20% tolerance from its nominal value.
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TPS61160A/61A has built-in slope compensation to avoid sub-harmonic oscillation associated with current mode control. If the inductor value is lower than 10H, the slope compensation may not be adequate, and the loop can be unstable. Therefore, customers need to verify the inductor in their application if it is different from the recommended values. Table 1. Recommended Inductors for TPS61160A/61A
PART NUMBER LQH3NPN100NM0 VLCF5020T-220MR75-1 CDH3809/SLD A997AS-220M L ( H) 10 22 10 22 DCR MAX () 0.3 0.4 0.3 0.4 SATURATION CURRENT (mA) 750 750 570 510 SIZE (L W H mm) 331.5 552.0 441.0 441.8 VENDOR Murata TDK Sumida TOKO
SCHOTTKY DIODE SELECTION
The high switching frequency of the TPS61160A/61A demands a high-speed rectification for optimum efficiency. Ensure that the diode average and peak current rating exceeds the average output current and peak inductor current. In addition, the diodes reverse breakdown voltage must exceed the open LED protection voltage. The ONSemi MBR0540 and the ZETEX ZHCS400 are recommended for TPS61160A/61A.
COMPENSATION CAPACITOR SELECTION
The compensation capacitor C3 (see the block diagram), connected from COMP pin to GND, is used to stabilize the feedback loop of the TPS61160A/61A. Use a 220nF ceramic capacitor for C3.
INPUT AND OUTPUT CAPACITOR SELECTION
The output capacitor is mainly selected to meet the requirements for the output ripple and loop stability. This ripple voltage is related to the capacitors capacitance and its equivalent series resistance (ESR). Assuming a capacitor with zero ESR, the minimum capacitance needed for a given ripple can be calculated by C out +
V out * V in Iout
Vout Fs V ripple
(6)
where, Vripple = peak-to-peak output ripple. The additional output ripple component caused by ESR is calculated using: V ripple_ESR + I out RESR
(7)
Due to its low ESR, Vripple_ESR can be neglected for ceramic capacitors, but must be considered if tantalum or electrolytic capacitors are used. Care must be taken when evaluating a ceramic capacitors derating under dc bias, aging and AC signal. For example, larger form factor capacitors (in 1206 size) have a resonant frequencies in the range of the switching frequency. So the effective capacitance is significantly lower. The DC bias can also significantly reduce capacitance. Ceramic capacitors can loss as much as 50% of its capacitance at its rated voltage. Therefore, leave the margin on the voltage rating to ensure adequate capacitance at the required output voltage. The capacitor in the range of 1F to 4.7F is recommended for input side. The output requires a capacitor in the range of 0.47F to 10F. The output capacitor affects the loop stability of the boost regulator. If the output capacitor is below the range, the boost regulator can potentially become unstable. For example, if use the output capacitor of 0.1F, a 470nF compensation capacitor has to be used for the loop stable. The popular vendors for high value ceramic capacitors are: TDK (http://www.component.tdk.com/components.php) Murata (http://www.murata.com/cap/index.html)
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LAYOUT CONSIDERATIONS
As for all switching power supplies, especially those high frequency and high current ones, layout is an important design step. If layout is not carefully done, the regulator could suffer from instability as well as noise problems. To reduce switching losses, the SW pin rise and fall times are made as short as possible. To prevent radiation of high frequency resonance problems, proper layout of the high frequency switching path is essential. Minimize the length and area of all traces connected to the SW pin and always use a ground plane under the switching regulator to minimize inter-plane coupling. The loop including the PWM switch, Schottky diode, and output capacitor, contains high current rising and falling in nanosecond and should be kept as short as possible. The input capacitor needs not only to be close to the VIN pin, but also to the GND pin in order to reduce the IC supply ripple. Figure 13 shows a sample layout.
Rset C1 Vin
LEDs Out
FB Vin
L1 CTRL
COMP CTRL
C3
GND SW
C2 GND
Place enough VIAs around thermal pad to enhance thermal performance Minimize the area of this trace
LEDs IN
Figure 13. Sample Layout
THERMAL CONSIDERATIONS
The maximum IC junction temperature should be restricted to 125C under normal operating conditions. This restriction limits the power dissipation of the TPS61160A/61A. Calculate the maximum allowable dissipation, PD(max), and keep the actual dissipation less than or equal to PD(max). The maximum-power-dissipation limit is determined using Equation 8: P D(max) + 125C * T A RqJA
(8)
where, TA is the maximum ambient temperature for the application. RJA is the thermal resistance junction-to-ambient given in Power Dissipation Table. The TPS61160A/61A comes in a thermally enhanced QFN package. This package includes a thermal pad that improves the thermal capabilities of the package. The RJA of the QFN package greatly depends on the PCB layout and thermal pad connection. The thermal pad must be soldered to the analog ground on the PCB. Using thermal vias underneath the thermal pad as illustrated in the layout example. Also see the QFN/SON PCB Attachment application report (SLUA271).
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ADDITIONAL TYPICAL APPLICATIONS
Vin 3 V to 5 V L1 10 mH D1
C1 1 mF
TPS61160A VIN SW FB GND
C2 0.47 mF
ON/OFF DIMMING CONTROL C3 220 nF
CTRL COMP
Rset 10 W
20 mA
L1: Murata LQH3NPN100NM0 C1: Murata GRM188R61A105K C2: Murata GRM188R61E474K D1: ONsemi MBR0540T1
Figure 14. Li-Ion Driver for 6 White LEDs
L1 10 mH D1
C1 TPS61160A VIN ON/OFF DIMMING CONTROL C3 220nF CTRL SW FB D2
C2
100
R2 COMP GND R1 RFLTR Rset 10 W
L1: Murata LQH3NPN100NM0 C1: Murata GRM188R61A105K C2: Murata GRM188R61E474K D1: ONsemi MBR0540T1 D2: ONsemi MMSZ4711
CFLTR
Figure 15. Li-Ion Driver for 6 White LEDs With External PWM Dimming Network For assistance in selecting the proper values for Rset, R1-R3, RFLTR, CFLTR and D2 for the specific application, refer to SLVA471 and/or SLVC366.
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Vin 3 V to 5 V
L1 22 mH
D1
C1 TPS61161A VIN ON/OFF DIMMING CONTROL CTRL COMP C3 220 nF
L1: TDK VLCF5020T-220MR75-1 C1: Murata GRM188R61A105K C2: Murata GRM21BR71H105K D1: ONsemi MBR0540T1
C2
SW FB GND Rset 10 W
20mA
Figure 16. Li-Ion Driver for 8 White LEDs
14
Copyright 20092011, Texas Instruments Incorporated
PACKAGE OPTION ADDENDUM
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11-Apr-2013
PACKAGING INFORMATION
Orderable Device TPS61160ADRVR TPS61160ADRVT TPS61161ADRVR TPS61161ADRVT Status
(1)
Package Type Package Pins Package Drawing Qty SON SON SON SON DRV DRV DRV DRV 6 6 6 6 3000 250 3000 250
Eco Plan
(2)
Lead/Ball Finish CU NIPDAU CU NIPDAU CU NIPDAU CU NIPDAU
MSL Peak Temp
(3)
Op Temp (C) -40 to 85 -40 to 85 -40 to 85 -40 to 85
Top-Side Markings
(4)
Samples
ACTIVE ACTIVE ACTIVE ACTIVE
Green (RoHS & no Sb/Br) Green (RoHS & no Sb/Br) Green (RoHS & no Sb/Br) Green (RoHS & no Sb/Br)
Level-2-260C-1 YEAR Level-2-260C-1 YEAR Level-2-260C-1 YEAR Level-2-260C-1 YEAR
OBV OBV OBT OBT
(1)
The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above. Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4)
Multiple Top-Side Markings will be inside parentheses. Only one Top-Side Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation of the previous line and the two combined represent the entire Top-Side Marking for that device. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. Addendum-Page 1
PACKAGE OPTION ADDENDUM
www.ti.com
11-Apr-2013
Addendum-Page 2
PACKAGE MATERIALS INFORMATION
www.ti.com 8-Apr-2013
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device
Package Package Pins Type Drawing SON SON SON SON SON SON DRV DRV DRV DRV DRV DRV 6 6 6 6 6 6
SPQ
Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) 180.0 180.0 180.0 180.0 179.0 180.0 8.4 8.4 8.4 8.4 8.4 8.4 2.3 2.3 2.3 2.3 2.2 2.3
B0 (mm) 2.3 2.3 2.3 2.3 2.2 2.3
K0 (mm) 1.15 1.15 1.15 1.15 1.2 1.15
P1 (mm) 4.0 4.0 4.0 4.0 4.0 4.0
W Pin1 (mm) Quadrant 8.0 8.0 8.0 8.0 8.0 8.0 Q2 Q2 Q2 Q2 Q2 Q2
TPS61160ADRVR TPS61160ADRVT TPS61161ADRVR TPS61161ADRVR TPS61161ADRVT TPS61161ADRVT
3000 250 3000 3000 250 250
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com 8-Apr-2013
*All dimensions are nominal
Device TPS61160ADRVR TPS61160ADRVT TPS61161ADRVR TPS61161ADRVR TPS61161ADRVT TPS61161ADRVT
Package Type SON SON SON SON SON SON
Package Drawing DRV DRV DRV DRV DRV DRV
Pins 6 6 6 6 6 6
SPQ 3000 250 3000 3000 250 250
Length (mm) 210.0 210.0 210.0 210.0 195.0 210.0
Width (mm) 185.0 185.0 185.0 185.0 200.0 185.0
Height (mm) 35.0 35.0 35.0 35.0 45.0 35.0
Pack Materials-Page 2
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