SystemC Schuster
SystemC Schuster
SystemC
Alexandra Schuster
Vienna University of Technology
4. Juni 2007
SystemC
Table of contents
1 Introduction
SystemC Introduction
History
SystemC was rst announced 1999 as a open source project SystemC V1.0 was released on March 2000
it provided modeling constructs similar to those used for RTL
The actual Version of SystemC is 2.1 Since December 2005: IEEE 1666 standard
SystemC Introduction
Purpose of SystemC
Today, problems arise from the use of dierent design languages, incompatible tools and fragmented tool ows SystemC is entirley based on C++ The creation of a system-level model is possible with SystemC and standard C++ development tools SystemC provides hardware and software development team with an executable specication of the system
Model types
Functional Model
one level higher than TLM and is used for runtime performance
Synthese
Take care, some data types, loops and so on are not synthesizable
oat, double, loops with no constant boundary, pointer, I/O-Streams, SC THREAD,...
Library Overview
Data Types
sc bit sc logic sc int sc uint sc bigint sc biguint sc bv sc lv sc xed sc uxed sc x sc ux 2-valued single Bit (0,1) 4-valued single Bit (0,1,X,Z) 1 to 64 Bit signed integer 1 to 64 Bit unsigned integer arbitrary precision signed integer arbitrary precision unsigend integer vector of sc bit vector of sc logic templated signed xed point type templated unsigend xed point type templated signed xed point type templated unsigned xed point type
Floating point operations are seldom used in hardware because it consumes to many hardware resources. Typical example for the use of xed point type: DSP applications sc xed and sc uxed are setup at compile time and do not change. sc x and sc ux can use variables to determine word length, integer word length, ...
Modules
Modules are the basic building blocks for partitioning a design Modules allow designers to hide internal data representation and algorithms Therefore, designers are forced to use public interfaces to other modules Modules can contain
ports processes internal data hierarchically other modules
Modules
Modules are declared with the SystemC keyword SC MODULE, e.g.: SC MODULE(nameOfModule); The module is initiated by the constructor SC CTOR, e.g.: SC CTOR(nameOfModule);
Ports of a module are the external interface that pass information to and from a module, and trigger actions within the module. Modes of operation:
Input (sc in porttype ) Output (sc out porttype ) In- and Output (sc inout porttype )
Processes
Processes provide the mechanism for simulating concurrent behavior A process is a member function of a module and called whenever signals, this process is sensitive to, change value Types of processes:
method process (SC METHOD)
A SC METHOD process is triggered by events. These events must be declared in the sensitive list
Example of a process
1 2 3 4 5 6 7 8 9 10 11 12 13
SC MODULE( Adder ) { s c i n <i n t > a; s c i n <i n t > b; s c o u t <i n t > c ; v o i d compute ( ) { c = a + b; } SC CTOR( Adder ) { SC METHOD( compute ) ; s e n s i t i v e << a << b ; } };
Advantages
simulation performance standardized modeling language: enable system level design and IP exchange at multiple abstraction levels provide the hardware and software development team with an executable specication of the system SystemC has a xed-point numeric type Open Source Licence - free development and simulation packets most designers familiar with C++???
SystemC Sources
Bibliography
Hannes Muhr. Einsatz von SystemC in Hardware/Software-Codesign Diplomarbeit: TU Wien, 2000 Thorsten Gr otker. System Design with SystemC Kluwer Academic Publishers, New York. 2002 Frank Ghenassia Transaction Level Modeling with SystemC Springer, 2005 IEEE Computer Society IEEE Standard SystemC Language Reference Manual IEEE Std 1666, 2006 SystemC Users Guide www.systemC.org, 2002