Complete Data Sheet
Complete Data Sheet
As the first isolated power module on the world SEMIPACK 1 was invented in 1975 by SEMIKRON. Now SEMIPACK has already become a complete family with different case sizes and configurations. SEMIPACK products have the widest output current range up to 1200 A, reverse voltage from 600V to 2200V. At present, there are three production locations for SEMIPACK products: SKSK (Slovakia), aimed at soldered and bonded modules; SKCNP (China) specializes in pressure contact modules and SKI (Italy), which manufactures fast diode modules and special types. Features Semiconductor chips soldered onto ceramic isolated metal baseplate (SEMIPACK 02 and some SEMIPACK 3 modules) or pressure contact modules (SEMIPACK 3,4,5,6) with very high load cycle capability. SEMIPACK products consist of thyristor modules, rectifier diode modules and fast diode modules. The respondent current rating and voltage class is given below: For thyristor modules: current rating is from 15A to 800A, voltage class is from 600V to 2200V. For rectifier diode modules: current rating is from 15A to 1200A, voltage class is from 600V to 2200V. For fast diode modules: current rating is from 40A to 205A, voltage class is from 400V to 1700V. Optimum heat transfer to heat sink thanks to ceramic isolated metal baseplate with AI3O2 (SEMIPACK 0,1,2) or AIN (SEMIPACK 3,4,5,6) Insolating substrate and copper baseplate. Thyristor chips in SEMIPACK 36 with amplifying gate to reduce the gate current Fast diode modules with diodes in diffusion, Epitaxial and CAL (Controlled Axial Lifetime) technology up to 600 A and 1700 V. UL recognized; file no. E 63 532
Housings of SEMIPACK
Fig.1 SEMIPACK products family SEMIPACK has 7 different housing sizes, from SEMIPACK 0 to SEMIPACK 6. Below are mean dimensions of different housings:
Case SEMIPACK 0 SEMIPACK 1 SEMIPACK 2 SEMIPACK 3 SEMIPACK 4 SEMIPACK 5 SEMIPACK 6 Length (mm) Width (mm) Height (mm) 61 93 94 115 101 150 140 21 20 29 51 50 60 70 23.2 30 30 52 52 52 90
Fig. 2 Main dimensions of different SEMIPACK housing sizes For SEMIPACK products, standard tolerance of catalogue drawings is +/-0.5mm.
Mounting/Assembly Instructions
Preparation, surface specifications In order to ensure good thermal contact and to obtain the thermal contact resistance values specified in the datasheets, the contact surface of the heat sink must be clean and free from dust particles, as well as fulfilling the following mechanical specifications: unevenness: < 50m over a distance of 100 mm Roughness Rz: < 10m Before assembly onto the heat sin, the module baseplate or the contact surface of the heat sink is to be evenly coated with a thin layer (approx. 50m) of a thermal compound such as Wacker- Chimie P12. For even distribution we recommend using a hard rubber roller or a silk screen process.
Applying Thermal Paste A thin layer of thermal paste has to be applied onto the heat sink surface or the underside of the module. A layer thickness of 50 m 100 m is recommended for Silicone Paste P 12 from WACKER CHEMIE. The thickness of the layer can be determined using a measurement gauge as shown in Fig.9.2
Fa. ELCOMETER Intruments GmbH Ulmer Str. 68 73431 Aalen Tel.-Nr.: +49-7361-52806-0 Internet: www.elcometer.de Fig.2 Wet film thickness gauge 5-150 m SEMIKRON recommends using screen printing to apply thermal paste. In certain cases a hard rubber roller might be suitable for the application of thermal paste.
Type Designation
Type designation
SK KT 280 / 22 E H4 1 2 3 4 5 6
1: SEMIKRON compenent 2: Topology of internal connection, pls refer to Fig.1-2 3: Rated current (ITAV [A]) 4: Voltage class (VRRM[V]) 5: dv/dt class5 D: 500 V/s E: 1000 V/s G: 2000 V/s 6: Option, where applicable, e.g. H4= Visol 4.8 kV/1s Topologies SEMPACK products are available as single component elements or double packs with internal, functional interconnection. 10 available tologies are given as below:
Technical Details
- Data sheet captions Explanations of data sheet values Explanation of electrical parameters The terms in [ ] apply to thyristors only Insulation voltage Visol The insulation voltage of SEMIPACK modules is a guaranteed value for the insulation between the terminals and the base plate. The limiting value 3.6 kVrms specified for 1 s subject to 100 % production testing. All terminals - including the gate connections - must be interconnected during dielectric testing. All specifications for the final product's dielectric test voltage are described in the IEC publications IEC 60146-1-1: 1991 and EN 60146-1-1: 1994 Section 4.2.1 (=VDE 0558 T1-1: 1993), EN 50 178: 11.1997 (= DIN EN 50 178 (VDE 0160): 1998, as well as in UL 1557: 1997. For railway applications, for instance, please refer to the specifications of the IEC 61287-1 standard. Non-repetitive peak reverse voltage VRSM; [Non-repetitive peak off-state voltage VDSM] Maximum permissible value for non-repetitive, occasionally transient peak voltages. Repetitive peak reverse and off-state voltages [VDRM] and V
RRM
Maximum
permissible value for repetitive transient off-state and reverse voltages. Direct reverse voltages VR for continuous duty Maximum permissible direct reverse voltage for stationary operation for diodes (V R) [or thyristors (VD, VR)]. This value is 0.7 VRRM [ 0.7 VDRM]. Mean forward [on-state] current IFAV, [ITAV] The symbols IFAV, [ITAV] are used to refer to both the mean current values in general and the current limits. The limiting values are absolute maximum continuous values for the on-state current load of a diode [thyristor] for a given current waveform and given cooling conditions (e.g. case temperature Tc). At this current value, the maximum permissible junction temperature is reached, with no margins for overload or worst-case reserves. The recommended maximum continuous current is therefore approximately 0.8 ITAV . For operation frequencies of between 40 Hz and 200 Hz the maximum mean on-state current can be taken from Fig. 1 of the datasheet. If standard diodes and thyristors
(diodes/thyristors for line application) are operated at frequencies of between 200 Hz and 500 Hz, further current reduction should be carried out to compensate for the switching losses that are no longer negligible. RMS forward [on-state] current IFRMS, [ITRMS] The symbols IFRMS, [ITRMS] are used to refer to both the mean current values and the current limits. The limiting values are absolute maximum values for the continuous on-state current for any chosen current waveform and cooling conditions. Surge forward [on-state] current IFSM [ITSM] Crest value for a surge current in the form of a single sinusoidal half wave which lasts for 10 ms. After occasional current surges with current values up to the given surge forward current, the diode [thyristor] can withstand the reverse voltages specified in Fig. 8 or Fig. 16 of the datasheets. Surge current characteristics IF(OV), [IT(OV)] Crest values for full or part sinusoidal half wave currents lasting between 1 ms and 10 ms or for sequential sinusoidal half wave currents with a maximum duration of 10 ms, permissible under fault conditions only, i.e. the diode [thyristor] may only be subjected to this value occasionally; the controllability of a thyristor may be lost during overload. The overload current depends on the off-state voltage value across the component (cf. Fig. 8 or Fig. 16 of the datasheets). i2t value This value is given to assist in the selection of suitable fuses to provide protection against damage caused by short circuits and is given for junction temperatures of 25 and 125 The i C C.
2
t value of the fuse for the intended input voltage and the
prospective short circuit in the device must be lower than the i2t of the diode [thyristor] for t = 10 ms. When the operating temperature increases, the i2t value of the fuse falls more rapidly than the i2 t value of the diode [thyristor], a comparison between the i2t of the diode (thyristor) for 25 and the i 2t value of the (unloaded) fuse is C generally sufficient. The i2t value is calculated from the surge on-state current ITSM using the equation:
thw
i
0
2 TS
2 dt = I TSM
t hw 2
thw is the duration of the half sinewave for which ITSM has been specified. Thus at 50 Hz thw/2 = 0,005 s. i2t has practically the same value for 60 as for 50 Hz since the 10% higher ITSM is balanced out by the lower value for thw : 1.12 8.3 10. [Critical rate of rise of on-state current (di/dt)cr] Immediately after the thyristor has been triggered, only part of the chips conducts the current flow, meaning that the rate rise of the on-state current has to be limited. The critical values specified apply to the following conditions: repetitive loads of between 50 and 60 Hz; a peak current value corresponding to the crest value of the permissible on-state current for sinusoidal half waves; a gate trigger current that is five times the peak trigger current with a rate of rise of at least 1 A/s. The critical rate of rise for on-state current falls as the frequency increases, but rises as the peak on-state current decreases. For this reason, for frequencies > 60 Hz and pulses with a high rate of rise of current, the peak on-state current must be reduced to values below those given in the datasheets. [Critical rate of rise of off-state voltage (dv/dt)cr] The values specified apply to an exponential increase in off-state voltage to 0.66 V
DRM.
If these values are exceeded, the thyristor can break over and self trigger.
Direct reverse [off-state] current IRD [IDD] Maximum reverse or off-state [for thyristors] current for the given temperature and maximum voltage. This value depends exponentially on the temperature. Direct forward [on-state] voltage VF [VT] Maximum forward voltage across the main terminals for a given current at 25 C. Threshold voltage V(TO) [VT(TO)] and Forward [on-state] slope resistance rT These two values define the forward characteristics (upper value limit) and are used to calculate the instantaneous value of the forward power dissipation PF [PT] or the mean forward power dissipation PFAV [PTAV]:
PF[T] = VT(TO) * IF[T] + rT * i2F[T] PF[T]AV = VT(TO) * IF[T]AV + rT * I2F[T]RMS I2F[T]RMS / I2F[T]AV = 360 / for square-wave pulses I2F[T]RMS / I2F[T]AV = 2.5 or I2F[T]RMS / I2F[T]AV = (/2) 2 * 180 / for [part] sinusoidal half waves : Current flow angle iF[T]: Instantaneous forward current value IF[T]RMS: RMS forward [on-state] current IF[T]AV: Mean forward [on-state] current [Latching current IL] Minimum anode current which at the end of a triggering pulse lasting 10 s will hold the thyristor in its on-state. The values specified apply to the triggering conditions stipulated in the section on "Critical rate of rise of on-state current". [Holding current IH] Minimum anode current which will hold the thyristor in its on-state at a temperature of 25 If the thyristor is switched on at temperatu res below 25 the values C. C, specified may be exceeded. Recovery charge Qrr Qrr is the total charge which flows through the main circuit (current-time area) during commutation against the reverse recovery time trr. The corresponding characteristic in the datasheet shows this value's dependence on the forward current threshold value IFM [ITM] before commutation, as well as the forward current rate of fall di/dt (cf. Fig. 1).
Fig. 1 Current curve during diode/thyristor turn-off The following relations exist between trr, Qrr, the current fall time tf and the peak reverse recovery current IRM (cf. Fig. 1): trr = IRM / (- diF[T]/dt) + tf trr = SQR ( 2 * Qrr / (- diF[T]/dt) + t f2 / 4 ) + tf / 2 IRM = 2 * Qrr / trr IRM = SQR ( 2 * Qrr * (- diF[T]/dt) + t f2 / 4 * (- diF[T]/dt)2 ) - tf / 2 * (- diF[T]/dt) If the fall rate of the forward current IF [IT ] is very low, tf will be small in comparison to trr and the equations can be simplified as follows: trr = SQR ( 2 * Qrr / (- diF[T]/dt) ) IRM = SQR ( 2 * Qrr * (- diF[T]/dt) ) Further details, in particular with regard to fast diode switching, can be found in the section "Fast rectifier diodes" under "Diode turn-off". [Circuit commutated turn-off time tq] The circuit commutated turn-off time lies in the range of several hundred s and constitutes the time required for a thyristor to discharge to allow it to take on forward
voltage again. This value is defined as the time that elapses between zero crossing of the commutation voltage and the earliest possible load with off-state voltage. In the case of thyristors for phase-commutated converters and a.c. converters, the circuit commutated turn-off time is usually of no significance. For this reason, the datasheets contain typical values only, and no guarantee is given for these values. [Gate trigger voltage VGT and Gate trigger current IGT ] Minimum values for square-wave triggering pulses lasting longer than 100 s or for d.c. with 6 V applied to the main terminals. These values will increase if the triggering pulses last for less than 100 s. For 10 s, for instance, the gate trigger current IGT would increase by a factor of between 1.4 and 2. Firing circuits should therefore be arranged in such as way that trigger current values are 4 to 5 times larger than IGT. If the thyristor is loaded with reverse blocking voltage, no trigger voltage may be applied to the gate in order to in order to avoid a non-permissible increase in off-state power losses and the formation of hot spots on the thyristor chip. [Gate non-trigger voltage VGD und Non-trigger current IGD ] These trigger voltage and current values will not cause the thyristor to fire within the permissible operating temperature range. Inductive or capacitive interference in the triggering circuits must be kept below these values. [Time definitions for triggering] Fig. 2 shows the characteristics of gate trigger signal VG and anode-cathode voltage VAK which define the time intervals for the triggering process.
Fig. 2 Time definitions for thyristor triggering [Gate-controlled delay time tgd]: Time interval between the start of a triggering pulse and the point at which the anode-cathode voltage falls to 90 % of its starting value. The datasheet specifies a typical value which is applicable, provided the following conditions are fulfilled: - Square-wave gate pulse, duration 100 s - Anode-cathode starting voltage 0.5 VDRM - On-state current after firing approx. 0.1 ITAV @ 85 C - Junction temperature during firing approx. 25 C [Gate controlled rise time tgr]: Period within which the anode-cathode voltage falls from 90 % to 10 % of its starting value during firing. [Gate current pulse duration tgt]: The sum of the gate controlled delay time tgd and the gate controlled rise time t gr. Thermal resistances Rth(x-y) and thermal impedances Z th(x-y) For SEMIPACK modules, thermal resistances/impedances are given for the heat flow between points "x" and "y". The indices uses are as follows:
j - junction c - case/base plate s - sink r - reference point a - ambient The contact thermal resistance case to heat sink Rth(c-s) applies provided the assembly instructions are followed. In such cases, the given dependences of the internal thermal resistance junction to case Rth(j-c) on the current waveform and the current flow angle should take into account any deviations from the maximum instantaneous value of the mean junction temperature calculated. The values given in the datasheet tables apply to sinusoidal half waves only. Values for other current waveforms can be taken from Fig. 7 of the datasheet. The thermal resistance junction to ambient Rth(j-a) to be used in Fig. 1 and Fig.11 of the datasheet comprises the following components: Rth(j-a) = Rth(j-c) + Rth(c-s) + N * Rth(h-a) where N: the number of thyristors or diodes operating simultaneously on one heat sink. The thermal resistance Rth(h-a) of the heat sink decreases as the following items increase: power dissipation, the cooling air flow rate, the number of SEMIPACK modules mounted and the distance between the individual modules. The transient thermal impedances in the SEMIPACK modules Zth(j-c) and Zth(j-s) are shown in the diagrams shown in Fig. 6 and Fig 14 of the datasheets as a function of the time t. For times > 1 s, the transient thermal impedance Z th(s-a) of the heat sink must be added to this in order to calculate the total thermal impedance. For this purpose, the datasheets for SEMIKRON heat sinks normally contain a diagram illustrating the given thermal impedance Zth(s-a) or Zth(c-a) as a function of the time t. When several components are being mounted on one heat sink, in order to calculate
the transient thermal impedance of one component, the thermal heat sink impedance must be multiplied by the total number of components N. Temperatures The most important referential value for calculating limiting values is the maximum permissible virtual junction temperature Tvj. At most in the event of a circuit fault (e.g. when a fuse is activated) may this value be exceeded briefly (cf. "Surge on-state current"). Another important reference point for the permissible current capability is the case temperature Tc. In SEMIPACK modules, the measuring point for Tc (Reference point/Reference temperature Tcref ) is the hottest point of the baseplate beneath the hottest chip, measured through a hole in the heat sink. The heat sink temperature Ts is of particular interest for defining power dissipation and heat sink. In SEMIPACK modules the measuring point for Ts (Reference point/Reference temperature Tsref) is the hottest point of the heat sink besides the baseplate, measured from above on the side wall of the module (cf. also IEC 60747-1, Am. 1 to Am. 3 and IEC 60747-15 cls.7.4.3).
The permissible ambient conditions without current or voltage stress are described, among other things, by the maximum permissible storage temperature Tstg. The parameter T stg is also the maximum permissible case temperature which must not be exceeded as a result of internal or external temperature rise. Mechanical limiting values The limiting values for mechanical load are specified in the datasheets, e.g.: Mn : Max. tightening torque for terminal screws and fasteners Ft : Max. permissible mounting force (pressure force) for capsule devices a : Max. permissible amplitude of vibration or shock acceleration in x, y and z direction. If SEMIPACK modules with no hard mould are to be used in rotating applications, the soft mould mass may come away and leak. In such cases, Please contact SEMIKRON for there applications.
- Rth, IT(F)MS, etc. Measuring Thermal Resistance Rth(j-c) and Rth(c-s) The definition for thermal resistance Rth is the difference between two defined temperatures divided by the power loss P which gives rise to the temperature difference under steady state conditions:
R th(1 2 ) = T T1 T2 = PV PV (1)
Depending upon the choice of the two temperatures the following thermal resistances can be distinguished: - thermal resistance junction to case Rth(j-c), - thermal resistance case to heatsink Rth(c-s), - thermal resistance heatsink to ambient Rth(s-a), - thermal resistance junction to ambient Rth(j-a), etc. The data sheet values for the thermal resistances are based on measured values. As can be seen in equation (1), the temperature difference T has a major influence on the Rth value. As a result, the reference points and the measurement methods will have a major influence too. SEMIKRON measures the Rth(j-c) and Rth(c-s) using method A shown in Fig.1. This means the reference points are as follows:
For Rth(j-c) they are a virtual junction of the chip (Tj) and the bottom side of the
module (Tc), measured directly underneath the chip via a drill hole in the heat sink. Reference point 1 in Fig.1.
For Rth(c-s) once again the bottom side of the module (Tc), measured as described
above. The heat sink temperature Ts is measured on the top of the heat sink surface as close to the chip as possible.
Fig.1 Method A as used for SEMIPACK, location of reference points for Rth measurement
Fig.2. The main difference is the second reference point for the measurement of Rth(cs).
See reference point 2 in Fig.2. This reference point is very close to the bottom side
of the module inside the heat sink, i.e. in a drill hole. Due to the temperature
distribution inside the heat sink (as shown in Fig.3), the temperature difference T (= Tc-Ts) is very small, meaning that Rth(c-s) will be very small, too.
Fig.3 shows the temperature distribution and the location of the reference points for
the different measurement methods. If equation (1) is taken into consideration, it is clear that Rth(c-s) in method B must be smaller. That said, the reduction in Rth(c-s) must ultimately be added to Rth(s-a) (see Fig.4), meaning that at least the thermal resistance Rth(j-a) between junction and the ambient turns out to be the same, regardless of what measurement method is used.
Fig.3 Thermao distribution and positions of different reference points for Tj, Tc, Ts and Ta for the methodes A and B
Fig.4 Comparison of the resulting Rth values for the different methods
For further information on the measurement of thermal resistances please refer to:
(2)
For SEMIPACK modules, the coefficients Rn, n , please refer to the tables on page 16 Transient thermal impedance analytical elements in data book).
Peak value of overload current IT(OV) permissible under fault conditions normalised to the surge on-state current ITSM shown as a function of the duration of the fault t. The parameter is the peak reverse voltage to be reapplied immediately after the fault current has ceased. For faults lasting longer then 10 ms the graph assumes the current waveform to be a series of half sinewaves of 8.3 or 10 ms duration occurring at a rate of one every 16.6 or 20 ms. 0. VRRM: no reverse voltage reapplied, . VRRM: a voltage equal to half the repetitive peak reverse voltage rating reapplied, 1. VRRM: a voltage equal to the full repetitive peak reverse voltage rating reapplied.
Insulation test
The insulation voltage of SEMIPACK modules is a guaranteed value for the insulation between the terminals and the base plate. The limiting value 3.6 KVrms specified for 1 s is subject to 100% production testing. All terminals including the gate connections - must be interconnected during dielectric testing. All specifications for the final products dielectric test voltage are described in the IEC publications IEC 60146-1-1.
Thermal cycling load tests using pulsed loading and constant cooling
Tests which use external heating and cooling of the component deviate from actual operation conditions in so far as here the component under test is uniformally heated and cooled, whereas in reality a varying temperature grandient occurs between the silicon chip and the outside. Therefore it is recommended, particularly for the type
tests of a newly development component, that a further test method is used, which makes it possible in a short time to go through a large number of cycles giving similar stresses to those which occur in the actual working environment. To achieve this the component under test is brought in close contact with a water cooled heatsink, so that the case temperature is kept almost constant, and by applying short, high current pulses the silicon chip is cyclically heated up to almost its maximum allowable virtual junction temperature. During the intervals between the pulses the junction cools down very rapidly. This method produces periodically a high temperature gradient between the silicon chip and the mounting surface.
Lifetime Calculations
The lifetime of a power module is limited by mechanical fatigue of the package. This fatigue is caused by thermally induced mechanical stress caused by different coefficients of thermal expansion (CTE). This means that in the course of heating (power on) and cooling (power off) = temperature swing (power cycle), the materials try to expand differently on account of their different CTEs. Since the materials are joined, however, they are unable to expand freely, leading to the aforementioned thermally induced mechanical stress.
Fig.8 Cross sectional vies of SEMIPACK package, including the coefficients of thermal expansion (at 20 C)
When temperature changes, the mechanical stresses, that occur inside the different material layers, lead to material fatigue. The bigger the temperature difference (T), the more stress is induced. With every temperature cycle aging takes place. Wire bonding and solder layers are particularly affected by this. In time aging results in small cracks which start at the edges and increase in the direction of the centre of the material with every power cycle that occurs. The higher the medium temperature Tjm, the faster the cracks grow, because the activating energy is higher. The typical resulting failure picture from field returns is lift off of the wire bonds. This means that the cracks meet in the centre and open the connection such that the wire bond is loose. This shows that the lifetime is determined by the number of temperature cycles which can be withstood by the module. In the 90s intensive investigations were carried in this area, including a research project known as the LESIT study. One of the main findings of this study was the equation given below (7-1), which shows relationship
between the number of cycles Nf and the junction temperature difference Tj and the medium temperature Tjm. SEMIPACK modules are based on the same design principles as the modules which were investigated in the course of the LESIT study. For this reason the LESIT results may be used for life time estimations. That said, the reliability of power modules has improved since the LESIT study was concluded, which is why the results of equation (7-1) can be seen as a worst-case scenario.
Q (3) Nf = A Tj exp R Tm j With A = 640, = -5, Q = 7.8 10-4 J/mol and R = 8.314 J/mol K; Tj and Tjm in [K]
Fig.9 shows the experimental results of the LESIT study (as bullet points) as well as
the results of equation (3) as drawn lines.
Application
The terms in [ ] apply solely to thyristors
Fig.1 recommended voltage class allocations for the repetitive pear reverse toltages VRRM[VDRM]
As detailed in the technical explanations, the maximum permissible value for direct reverse voltages (continuous duty) across diode (VR) [or thyristors (VD, VR)] in statinary operations is 0.7 VRRM [0.7 VDRM].
Overvoltage protection
It is well known that single crystal semiconductor devices are sensitive to overvoltages. Every time their specified reverse voltage is exceedet it can lead to their destruction. It is therefore necessary to protect silicon diodes and thyristors against voltage transients however caused, i.e. the transient voltages must be reduced to values below the maximum specified limits for the semiconductor device. A variety of well tried and tested coponents are suitable for the above suppression. The most important are: - Resistors and capacitors (RC snubber networks)
- varistors - silicon avalanche diodes The RC netword perates by forming with existing inductances a series resonant circuit wihich transforms any steeply rising transient voltage into a damped sinewave of lower amplitude. Thk power of the voltage transient is converted from a high value of short duration to a lower value extending over a longer period of time. All the other components listed above make use of non-linear characteristics. Their internal resistances reduce as the applied voltage increases such that, together with the other risistances and inductances in the circuit, they build non-linear voltage dividers which allow througu low voltages unattenuated but clip high voltages above a difined level. The energy of the transient voltage is again spread over a longer period, and is almost completely absorbed by the suppression component. The suppression components can be positioned on the a.c. side of the diode or thyristor stack, on the d.c. side, or across each semiconductor device in the circuit. The advantages and disadvantages of these various arrangements will be considered separately for each type of suppression component. RC snubber circuit are often connected in parallel to the diode [thyristor] to provide protection from transient overvoltage, although in some cases varistors are used. Due to the RC circuit the rate of rise of voltage is limited during commutation, which reduces the peak voltages across the circuit inductors.
3. MTBF value: Failure rate is the frequency with which an engineered system or
component fails, expressed for example in failures per hour. It is often denoted by the Greek letter (lambda) and is important in reliability theory. =FIT=
nf
4. Why SEMIKRON defines the min. VGT and IGT, however, some competitors give max.VGT and IGT values in their data sheet?
Due to the following reason SEMIKRON are IGT and VGT in data sheet as min. values specified: In the chapter "Modules-Explanations-SEMIPACK" in our data sheet catalogue the definition of IGT and VGT is: Minimum values for square-wave triggering pulses lasting longer than 100us or for d.c. The values are necessary to fire a thyristor at Tvj=25 C properly. Therefore, we give the min. IGT and VGT values in our data sheet. The max. IGT and VGT values given in Infineon data sheet are sometimes called highest gate current/voltage, which can not be exceeded in order to keep thyristor being not fired. i.e. customer can apply max. IGT and VGT values on thyristor without firing the thyristor. Both definitions have same meaning and are only expressed in different way.
5. Resistance of semiconductor:
It's impossible to measure the resistance of a semiconductor with a Ohm meter. Reasons are the leakage current and the nonlinear characteristics of semiconductor, which can vary over several decades The gate - cathode terminals can be checked with a "diode" function of a multimeter, but not with the resistor function.
Accessories
For SEMIPACK 1,2,3,4 there are complete kits available:
Spindle No. 30143660 with 2 nuts M 10 For SEMIPACK 3 with 10 mm thick base plates and SEMIPACK 4 on heat sink P3, 30145490), available on request
use M520(No.
2,3,4,5; 32769900(l) is used for terminals 6 and 7 of SEMPACK 2,3,5 and SEMIPACK 6.
Logistics
Laser Marking on modules
1 2 3 4 5 6
SEMIKRON logo, with product line designation SEMIPACK UL logo, SEMIPACK is UL recognised, file name: E63532 Type designation Circuit diagram Data Matrix Code Date code 5 digits: YYMML (L = Lot of same type per week)
- Part number - Measurement line number - Production tracking number - Data code - Continuous number
Packing box