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FPGA (Xilinx & Altera)

The FPGA design flow involves several steps: 1) Specifying the system using modeling languages like SystemC or simulation tools, 2) Designing the logic using HDL languages and IP cores, 3) Simulating the design's function, 4) Synthesizing the HDL to optimize for the target FPGA, 5) Implementing place and route to map logic to hardware resources, and 6) Programming and debugging the physical FPGA.

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Bala Sg
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36 views

FPGA (Xilinx & Altera)

The FPGA design flow involves several steps: 1) Specifying the system using modeling languages like SystemC or simulation tools, 2) Designing the logic using HDL languages and IP cores, 3) Simulating the design's function, 4) Synthesizing the HDL to optimize for the target FPGA, 5) Implementing place and route to map logic to hardware resources, and 6) Programming and debugging the physical FPGA.

Uploaded by

Bala Sg
Copyright
© Attribution Non-Commercial (BY-NC)
Available Formats
Download as PPT, PDF, TXT or read online on Scribd
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FPGA Design Flow

Specification
System-Level Sim

SystemC Model

C/C++

Matlab / Simulink

Device Selection

Xilinx

Altera
Design Entry
LPM MegaCore

Design Entry
CoreGen LogiBox IP

Verilog/VHDL Schematic FSM

Verilog/VHDL/AHDL Schematic Waveform

Function Sim
Simulation Model & TestBench

Cadence Verilog-XL Synopsys VCSi

Debussy ModelSim
Synthesis
Synthesis Constraints

Synthesis
Synthesis Constraints

FPGA Compiler II FPGA Express Synplify

LeonardoSpectrum FPGA Express FAE Synplify

P&R
P&R Constraints, Floorplaning

Placement & Routing Back Annotate Routing Delay

Fitting Back Annotate Routing Delay

Fitting
Fitting Constraints

Timing Sim
Timing Model & TestBench

Cadence Verilog-XL Synopsys VCSi

Debussy

ModelSim

Prototyping

Third Party Prototyping Prototyping Development

Programming & Debug

Hardware Debugger ChipScope ILA

Programming & Debug

Programmer

JTAG Programmer

SignalTap

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