24 M. Tech.

(EMBEDDED SYSTEMS)

J AWAH ARLAL NEHRU TECHNOLOGICAL UNIVERSITY HYDERABAD

I Year - II Sem. M.Tech (Embedded Systems)

HARDWARE - SOFTWARE CO-DESIGN

UNIT -I
CO- DESIGN ISSUES
Co- Design Models, Architectures, Languages, A Generic Co-design Methodology.
CO- SYNTHESIS ALGORITHMS :
Hardware software synthesis algorithms: hardware - software partitioning distributed system co-synthesis.

UNIT -II
PROTOTYPING AND EMULATION:
Prototyping and emulation techniques, prototyping and emulation environments, future developments in emulation
and prototyping architecture specialization techniques, system communication infrastructure

TARGET ARCHITECTURES:
Architecture Specialization techniques, System Communication infrastructure, Target Architecture and Application
System classes, Architecture for control dominated systems (8051 -Architectures for High performance control),
Architecture for Data dominated systems (ADSP21060, TMS320C60), Mixed Systems.

UNIT - III
COMPILATION TECHNIQUES AND TOOLS FOR EMBEDDED PROCESSOR
ARCHITECTURES:
Modern embedded architectures, embedded software development needs, compilation technologies practical
consideration in a compiler development environment.

UNIT - IV
DESIGN SPECIFICATION AND VERIFICATION:
Design, co-design, the co-design computational model, concurrency coordinating concurrent computations,
interfacing components, design verification, implementation verification, verification tools, interface verification

UNIT - V
LANGUAGES FOR SYSTEM - LEVEL SPECIFICATION AND DESIGN-I
System- level specification, design representation for system level synthesis, system level specification languages.

LANGUAGES FOR SYSTEM - LEVEL SPECIFICATION AND DESIGN-II

Heterogeneous specifications and multi language co-simulation the cosyma system and lycos system.

TEXT BOOKS :
1. Hardware / software co- design Principles and Practice - Jorgen Staunstrup, Wayne Wolf - 2009, Springer.
2. Hardware / software co- design Principles and Practice, 2002, kluwer academic publishers
M. Tech. (EMBEDDED SYSTEMS) 25

JAWAHARLAL NEHRU TECHNOLOGICAL UNIVERSITY HYDERABAD

I Year - II Sem. M.Tech (Embedded Systems)

DIGITAL SIGNAL PROCESSORS AND ARCHITECTURES

UNIT I : INTRODUCTION TO DIGITAL SIGNAL PROCESING

Introduction, ADigital signal-processing system, The sampling process. Discrete time sequences. Discrete Fourier
Transform (DPT) and Fast Fourier Transform (FFT), Linear time-invariant systems, Digital filters. Decimation
and interpolation, Analysis and Design tool for DSP Systems MATLAB, DSP using MATLAB.
COMPUTATIONAL ACCURACY IN DSP IMPLEMENTATIONS
Number formats for signals and coefficients in DSP systems, Dynamic Range and Precision, Sources of error in
DSP implementations, A/D Conversion errors, DSP Computational errors, D/A Conversion Errors, Compensating
filter.
UNIT II : ARCHITECTURES FOR PROGRAMMABLE DSP DEVICES
Basic Architectural features, DSP Computational Building Blocks, Bus Architecture and Memory, Data Addressing
Capabilities, Address Generation Unit, Programmability and Program Execution, Speed Issues, Features for
External interfacing.

UNIT III : EXECUTION CONTROL AND PIPELINING

Hardware looping, Interrupts, Stacks, Relative Branch support, Pipelining and Performance, Pipeline Depth,
Interlocking, Branching effects, Interrupt effects, Pipeline Programming models.
PROGRAMMABLE DIGITAL SIGNAL PROCESSORS
Commercial Digital signal-processing Devices, Data Addressing modes of TMS320C54XX DSPs, Data Addressing
modes of TMS320C54XX Processors, Memory space of TMS320C54XX Processors, Program Control,
TMS320C54XX instructions and Programming, On-Chip Peripherals, Interrupts of TMS320C54XX processors,
Pipeline Operation of TMS320C54XX Processors.

UNIT IV : IMPLEMENTATIONS OF BASIC DSP ALGORITHMS

The Q-notation, FIR Filters, IIR Filters, Interpolation Filters, Decimation Filters, PID Controller, Adaptive Filters,
2-D Signal Processing.
IMPLEMENTATION OF FFT ALGORITHMS
An FFT Algorithm for DFT Computation, A Butterfly Computation, Overflow and scaling, Bit-Reversed index
generation, An 8-Point FFT implementation on the TMS320C54XX, Computation of the signal spectrum.

UNIT V
INTERFACING MEMORY AND I/O PERIPHERALS TO PROGRAMMABLE DSP DEVICES
Memory space organization, External bus interfacing signals, Memory interface, Parallel I/O interface,
Programmed I/O, Interrupts and F/O, Direct memory access (DMA).
A Multichannel buffered serial port (McBSP), McBSP Programming, a CODEC interface circuit, CODEC
programming, A CODEC-DSP interface example.

TEXT BOOKS
1. Digital Signal Processing - Avtar Singh and S. Srinivasan, Thomson Publications, 2004.
2. DSP Processor Fundamentals, Architectures & Features- Lapsley et al. 2000, S. Chand & Co.

REFERENCE BOOKS
1. Digital Signal Processors, Architecture, Programming and Applications - B. Venkataramani and M.
Bhaskar, 2002, TMH.
2. Digital Signal Processing - Jonatham Stein, 2005, John Wiley.
 26 M. Tech, (EMBEDDED SYSTEMS)

JAWAHARLAL NEHRU TECHNOLOGICAI - UNIVERSITY HYDERABAD

I Year - II Sem. M.Tech (Embedded Systems)

SYSTEM MODELING AND SIMULATION

Unit - I
Basic Simulation Modeling, Systems, Models and Simulation, Nature of Systems, event Driven Models, Simulation
of Single Server Queuing System, event Driven Models, Characterizing Systems, Simulation Diagrams.

Unit - I I : Stochastic generators

Uniformly Distributed Random Numbers, Statistical Properties of U|0,1} generators, Generation of Non-Uniform
and Arbitrary Random Variates, Random processes. Characterizing and Generating Random Processes, White
Noise.
Modelling Time Driven Systems: Modelling Input Signals, Discrete and Distributed Delays, System Integration.
Linear Systems.
Exogenous Signals and Events: Disturbance Signals, State Machines, Petri Nets and their Analysis, System
Encapsulation.

Unit - III: Markov Process

Probabilistic Models, Discrete Time Markov Processes, Random Walks, Poisson Processes, Exponential
Distribution, Simulating a Poisson Process, Continuous Time Markov Process
Event Driven Models: Simulation Diagrams, Queuing Theory, M/M/I Queues, Simulating Queuing Systems
Finite Capacity Queues, Multiple Servers, M/M/C Queues.

Unit - IV: System Optimization

System Identification, Searches, Alpha / Beta trackers, Multidimensional Optimization, Modeling and Simulatioi
Methodology.

Unit - V: Simulation Software and Building Simulation Models

Comparison of Simulation Packages with Programming Languages, Classification of
Simulation Software, Desirable software features, General Purpose Simulation Packages-
Arena, Extend; Guide lines for determining the level of Model detail. Techniques for increasing Model Viabiliu
and credibility.

TEXT BOOKS:
1. System Modelling and Simulation: An Introduction - Frank L. Severance, 2001 John Wiley&Sons.
2. Simulation Modelling and Analysis - Averill M.Law, W.David Kelton,, 3 ed., 2003, TMH.

REFERENCE BOOK:
1. Systems Simulation-Gcoffery Gordan, PHI.
M. Tech. (EMBEDDED SYSTEMS) 27

JAWAHARLAL NEHRU TECHNOLOGICAL UNIVERSITY HYDERABAD

I Year - II Sem. M.Tech (Embedded Systems)

CPLD AND FPGA ARCHITECTURE AND APPLICATIONS

UNIT-I
Programmable logic : ROM, PLA, PAL,PLD, PGA - Features, programming and applications using complex
programmable logic devices Altera series - Max 5000/7000 series and Altera FLEX logic-10000 series CPLD,
AMD's- CPLD (Mach lto 5), Cypres FLASH 370 Device technology, Lattice PLST's architectures - 3000
series - Speed performance and in system programmability.

UNIT - II
FPGAs: Field Programmable gate arrays- Logic blocks, routing architecture, design flow technology mapping
lor FPGAs, Case studies Xitirx XC4000& ALTERA's FLEX 8000/10000 FPGAs: AT & T ORCA's (
Optimized Reconfigurable Cell Array): ACTEL's ACT-1,2,3 and their speed performance

UNIT-III
Alternative realization for state machine chat suing microprogramming linked state machine one -hot state
machine, petrinetes for state machines-basic concepts, properties, extended petrinetes for parallel controllers.

UNIT-IV
Digital front end digital design tools for FPGAs& ASICs: Using mentor graphics EDA tool ("FPGA Advantage")
Design flow using FPGAs

UNIT - V
Case studies of parallel- adder cell parallel" adder sequential circuits, counters, multiplexers, parellel controllers.

[EXT BOOKS:
1. Field Programmable Gate Array Technology - S. Trimberger, Edr, 1994, Kluwer Academic Publications.
2. Field Programmable Gate Arrays, John V.Oldfield, Richard C Dore, Wiley Publications.

REFERENCE BOOKS :
1. Digital Design Using Field Programmable Gate Array, P.K.Chan & S. Mourad, 1994, Prentice Hall.
2. Digital System Design using Programmable Logic Devices - Parag.K.Lala, 2003, BSP
3. Field programmable gate array, S. Brown, R.J.Francis, J.Rose ,Z.G.Vranesic, 2007, BSP.
4. Digital Systems Design with FPGA's and CPLDs - Ian Grout, 2009, Elsevier.
 28 M. Tech. (EMBEDDED SYSTEMS)

JAWAHARLAL N E H R U TECHNOLOGIC AL UNIVERSITY H Y D E R A B A D

I Year - II Sem. M.Tech (Embedded Systems)

LOW POWER VLSI DESIGN

(ELECTIVE - III)

UNIT I
Low Power Design - An over View: Introduction to low- voltage low power design, limitations, Silicon-on-
Insulator.

MOS/BiCMOS Processes: Bi CMOS processes, Integration and Isolation considerations, Integrated Analog/
Digital CMOS Process.

UNIT II
Low-Voltage/Low Power CMOS/ BiCMOS Processes: Deep submicron processes, SOI CMOS, lateral
BJT on SOI, future trends and directions of CMOS/BiCMOS processes.

UNIT III
Device Behavior and Modeling: Advanced MOSFET models, limitations of MOSFET models, bipolar models.
*
Analytical and Experimental characterization of sub-half micron MOS devices, MOSFET in a Hybrid- mode
environment

UNIT IV
CMOS and Bi-CMOS Logic Gates: Conventional CMOS and BiCMOS logic gates. Performance evaluation

Low- Voltage Low Power Logic Circuits: Comparison of advanced BiCMOS Digital circuits. ESD-free Bi
CMOS, Digital circuit operation and comparative Evaluation.

UNIT V
Low Power Latches And Flip Fops: Evolution of Latches and Flip flops-quality measures for latches and
Flip flops, Design perspective.

TEXT BOOKS:
1. CMOS/BiCMOS ULSI low voltage, low power by YeoRofail/Gohl(3 Authors)-Pearson Education Asia
1st Indian reprint,2002

REFERENCE BOOKS:
1. Digital Integrated circuits - J.M.Rabaey, PH. N.J 1996
2. CMOS Digital Integrated Circuits Analysis & Design - Sung-MoKang, Yusuf Lleblebici 3 rd ed., 2003,
TMI12003
3. VLSI DSP Systems - K.K. Parhi, 1999, John Wiley & Sons.
4. IEEE Trans Electron Devices, IEEE J, Solid State Circuits, and other National and International Conferences
and Symposia.
 32 M. Tech. (EMBEDDED SYSTEMS)
v

J AWAHARLAL NEHRU TECHNOLOGICAL UNIVERSITY HYDERABAD

I Year - II Sem. M.Tech (Embedded Systems)

SYSTEM ON CHIP ARCHITECTURE

(ELECTIVE - IV)

UNIT I:
Introduction to Processor Design: Abstraction in Hardware Design, MUO a simple processor , Processor
design trade off, Design for low power consumption
ARM Processor as System-on-Chip: Acorn RISC Machine - Architecture inheritance - ARM programming
model - ARM development tools - 3 and 5 stage pipeline ARM organization -ARM instruction execution and
implementation -ARM Co-processor interface

UNIT II:
ARM Assembly Language Programming: ARM instruction types - data transfer, data processing and control
flow instructions -ARM instruction set - Co-processor instructions
Architectural Support for High Level Language: Data types - abstraction in Software design - Expressions
- Loops - Functions and Procedures - Conditional Statements - Use of Memory

UNIT III:
Memory Hierarchy: Memory size and speed - On-chip memory - Caches - Cache design- an example -
memory management

UNIT IV:
Architectural Support for System Development: Advanced Microcontroller bus architecture - ARM memory
interface - ARM reference peripheral specification - Hardware system prototyping tools - Armulator - Debug
architecture

UNIT V:
Architectural Support for Operating System: An introduction to Operating Systems -ARM system control
coprocessor - CP15 protection unit registers - ARM protection unit - CP15 MMU registers - ARM MMU
Architecture - Synchronization - Context Switching input and output

TEXT BOOKS:
1. ARM System on Chip Architecture - Steve Furber - 2nd ed., 2000, Addison Wesley Professional.
2. Design of System on a Chip: Devices and Components - Ricardo Reis, 1 sl ed., 2004, Springer

REFERENCE BOOKS:
1. Co-Verification of Hardware and Software for ARM System on Chip Design (Embedded Technology) -
Jason Andrews - Newnes, BK and CDROM
2. System on Chip Verification - Methodologies and Techniques -Prakash Rashinkar, Peter Paterson and
Leena Singh L, 2001,Kluwer Academic Publishers.
M. Tech. (EMBEDDED SYSTEMS) 29

JAWAHARLAL NEHRU TECHNOLOGICAL UNIVERSITY HYDERABAD

I Year - II Sem. M.Tech (Embedded Systems)

ROBOTICS
(ELECTIVE - III)

Unit - I : Introduction & Basic Definitions

Introduction, Control Programs for Robots, Industry Applications of Robots, Pick and Place, Gantry and Arm
lype Robots in typical set-ups like Automobile Industry

Coordinate Systems : Cartesian, Cylindrical, Polar, and Revolute systems: Robot Positioning: Robor Arms; Axes,
their ranges, offset and In-line Wrist: Roll, Pitch and Yaw, their meaning in Robotics

Unit-II : Mechanical Aspects

Kinematics, Inverse Kinematics, Motion planning and Mobile Mechanisms

Unit-Ill : Sensors and Applications

Range and Use of Sensors, Microswitches, Resistance Transducers, Piezo-electric, Infrared and Lasers
Applications of Sensors : Reed Switches, Ultrasonic, Barcode Readers and REID

Unit-IV Robot Systems

I lydraulic and Electrical Systems including pumps, valves, solenoids, cylinders, stepper motors, Encoders and
AC Motors

Unit-V Programming of Robots

Programming of Robots such as Lego Robots, Programming environment, Example Applications, Safety
considerations

TEXT BOOKS:
1. Introduction to Robotics - P.J .Mckerrow, ISBN : 0201182408
2. Introduction to Robotics - S.Nikv, 2001, Prentice Hall,
3. Mechatronics and Robotics: Design & Applications - A.Mutanbara, 1999,CRC Press.

REFERENCE BOOK
I. Robotics - K.S.Fu, R.C.Gonzalez and C.S.GLee, 2008, TMH.
 34 M. Tech. (EMBEDDED SYSTEMS)

JAWAHARLAL NEHRU TECHNOLOGICAL UNIVERSITY HYDERABAD

I Year - II Sem. M.Tech (Embedded Systems)

EMBEDDED SYSTEMS LAB - II USING PSoC

PSOC is a Mixed Signal microcontroller that has Analog / Digital / Microcontroller blocks built into a Single Chip.
Thus PSOC provides a single chip solution to many Embedded Applications. Students are expected to perform
a Variety of experiments to understand the functionalities of Analog / Digital / Microcontroller blocks.

1. Understanding the overall Programming Environment of PSOC and using PSOC First Touch Kit
2. Addressing / Control of on-board resources using the first touch kit
3. Study and characterization of the Programmable Gain Amplifier (PGA): Gain Bandwidth Product.
4. Realization of Low-pass, High-pass, and Band-pass filters and their characterization
5. Experiments with on-chip ADC's and DAC's
6. Digital Function Implementation using Digital Blocks
7. Logical/Arithmetic function implementation using Microcontroller
8. Timer operation in different Modes
9. Interrupt control
10. I/O Operations: Input from keyboard and display of numerals and strings
11. Implementation of Serial communications
12. Applications
A) LED control and Pattern generation
B) Stepper Motor Control