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DSP TMS Series Processor and MOTOR Control

The document discusses digital signal processors (DSPs) and their applications. It provides an overview of DSP tasks, applications, and advantages over general purpose processors. It then describes the Texas Instruments TMS DSP chip family, including different generations and types. Specific DSP chips are discussed in detail regarding their specifications and applications. Motor control is given as an example DSP application. In conclusion, the document states that DSP performance has increased with applications and that DSP-friendly designs are important for controlling more complex systems.

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720 views

DSP TMS Series Processor and MOTOR Control

The document discusses digital signal processors (DSPs) and their applications. It provides an overview of DSP tasks, applications, and advantages over general purpose processors. It then describes the Texas Instruments TMS DSP chip family, including different generations and types. Specific DSP chips are discussed in detail regarding their specifications and applications. Motor control is given as an example DSP application. In conclusion, the document states that DSP performance has increased with applications and that DSP-friendly designs are important for controlling more complex systems.

Uploaded by

avi013
Copyright
© Attribution Non-Commercial (BY-NC)
We take content rights seriously. If you suspect this is your content, claim it here.
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Download as PPT, PDF, TXT or read online on Scribd
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SUBMITTED BY

Avinash Srivastava
MTech 2nd SEM (CAID)
 DSP Introduction
 DSP Tasks
 DSP Applications
 DSP vs. General Purpose MPU
 TMS DSP IC
 TMS DSP Types
 TMS Generations
 MOTOR control application
 Conclusion
 Digital Signal Processing: application of mathematical operations to
digitally represented signals
 Signals represented digitally as sequences of samples.
 Digital Signal Processor (DSP):
electronic system that processes digital signals
 Most DSP tasks require:
 Repetitive numeric computations

 Real-time processing

 High memory

 System Flexibility

 DSPs must perform these tasks efficiently while minimizing:


 Cost

 Power

 Memory use

 Development time
 Digital cellular phones
 Digital cameras
 Satellite communication
 Voice mail
 Music synthesis
 Modems
 RADAR
 Motor Control
 DSPs tend to be written for 1 program, not many programs.
 Hence OSes are much simpler, there is no virtual memory

 DSPs run real-time apps


 You must account for anything that could happen in a time slot

 All possible interrupts or exceptions must be noticed.

 DSPs have an infinite continuous data stream


 TMS 320 C5X
 TMX : Experimental device
 TMP : Prototype
 TMS : Qualified device
 C: CMOS Tech with on – chip non- volatile
memory as ROM
 E: CMOS tech with on-chip non – volatile
memory as EPROM
 nothing : NMOS tech with on-chip non – volatile
mem as ROM
 5 : Generation
 X : Version number- 0,1,2,3,4x,5,6,7
 Fixed Point DSPs
 TMS320C5x & 54x
 16-bit DSPs
 Floating Point DSPs
 TMS320C3x, 4x & 6x
 16 & 32-bit DSPs
 Multiprocessor DSPs
 TMS320C8x
 A DSP has to perform fast arithmetic operations and should handle
mathematical intensive algorithms in real time. This was achieved by these
basic concepts-
 Harvard architecture ( increased memory access/cycle)
 extensive pipelining,
 dedicated hardware multiplier,
 special DSP instructions( DMOV – delay)
 fast instruction cycle
 Instruction cycle timing: -160 ns -200 ns -280 ns.
 5 MIPS
 20 MHz
 On chip data RAM: -144 words -256 words
(TMS320C17).
 On chip program ROM: -1.5K words 4 K words (TMS320C17).
 4K words of on chip program EPROM( TMS320E17).
 16 x I6 bit multiplier with 32-bit result.
 16-bit barrel shifter for shifting data memory words into the ALU.
 4 x 12-bit stack.
 Two auxiliary registers for indirect addressing.
 Eight 16 bit I/O port
 Operating Temperature . . . 0°C to 70°C
 Reduced Instruction cycle timing: -100 ns (TMS320C25)
 10 MIPS, 40 MHz
 4K words of onchip masked ROM (TMS320C25).
 544 words of onchip data RAM.
 128K words of total program data memory space.
 Eight auxiliary registers with a dedicated arithmetic unit.
 Serial port for multiprocessing or interfacing to codecs.
 Bit-reversed addressing modes for fast Fourier trans-forms
(TMS320C25).
 Extended-precision arithmetic and adaptive filtering support
(TMS320C25).
 60-ns single cycle execution time
 20 -30 MIPS
 Two 1K x 32-bit single cycle dual-access RAM blocks.
 One 4K x 32-bit single cycle dual-access ROM block.
 64 X 32-bit instruction cache.
 32-bit instruction and data words, 24-bit addresses.
 32*32 bit floating-point and integer multiplier ( 40 bit product ).
 32-bit floating-point, integer, and logical ALU.
 32-bit barrel shifter.
 Eight extended-precision registers.
 Two address-generators with eight auxiliary registers.
 On chip Direct Memory Access (DMA) controller.
 High-level language support.
 The TMS320C4x devices are 32-bit floating-point digital
signal processors optimized for parallel processing.
 33-/40-ns instruction cycle times
 40 MIPS
 ANSI C compiler
 The ’C4x family accepts source code from the TMS320C3x
family of floating-point DSPs.
 Key applications of the ’C4x family include 3-dimensional
graphics, image processing, networking, and
telecommunications base stations.
 Fixed Point DSP
 Power Efficient (1.15mA/MIPS)
 20-50 MIPS
 20-35ns single cycle execution time
 Bit reversed /index addressing mode for FFT
 Power Down modes
 8 Auxiliary registers
 Single Cycle 16*16 bit parallel multiplier (32 bit product)
 32 bit accumulator ,32 bit ALU
 16-bit fixed point
 Power < 40 mW
 300 to 532 MIPS
 3 Power down modes
 RAM 16 Kb to 1280Kb(TMS320C5441-175)
 ROM max 256KB
 Applications –
 Digital Cellular Base stations
 PDA’s
 Digital Cordless Phones
 Modems
 16 & 32 bit fixed point
 Most power efficient in the industry with 0.12mW (stand by)
 600 MIPS
 Dual Processor
 RAM 320Kb
 ROM 32 to 64Kb
 Newest in series TMSC5506-108
 Applications –
 2G,2.5G,3G cellular phones and base stations
 Digital audio players
 Digital still cameras
 GPS receivers
 Wireless modems

First to feature VelociTI architecture.
 TMS320C62X
 multi-channel, multi-function applications
 Advanced VLIW architecture
 Medical, industrial applications, digital imaging, 3D graphics, speech
recognition and voice-over packet.
 Frequency 150 to 300 MHz
 RAM up to 1 MB (min 128Kb)
 Greater than 1600 MIPS
 TMS320C64x (highest level of performance )
 Speeds up to 1GHz
 Up to 8000 MIPS
 digital communications infrastructure
 video and image processing
 TMS320C67x (high-precision applications )
 First floating point processor in 6x series
 6 ns cycle timing
 1billion floating point operations per second (Flops)
 audio, medical imaging, instrumentation and automotive.
160
140
120
100
80 Cycle Timing
60 (ns)

40
20
0
1X 2X 3X 4X 5X 6X 8X
 A DSP motor drive system consists of
 Input power supply stage

 Power inverter

 Gate drivers

 DSP controller

 Motor
 DSP performance has increased according to the
applications involved.
 DSP friendly ness is an important factor because
the applications complexity is increasing.
 With the DSP-Controller an intelligent control
approach is possible to reduce the overall system
costs and to improve the reliability of the drive
system.
 S. Bejerke, Digital Signal Processing Solutions for Motor
Control Using the TMS320F240 DSP-Controller, ESIEE, Texas
Instrument, Paris September 1996 SPRA345
 Edwin J. Tan, Wendi B. Heinzelman, DSP Architectures: Past,
Present and Future, Department of Electrical and Computer
Engineering University of Rochester, Rochester, NY 14627
 Zhenyu Yu, 3.3V DSP for Digital Motor Control, Application
Report SPRA550 Digital Signal Processing Solutions Texas
Instrument, June 1999

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