Analog Communication Lab Manual VTU
Analog Communication Lab Manual VTU
R
Dept of ECE/TCE
T.John Institute Of Technology
10/26/2009
Analog Communication & LIC Lab [06ECL-58]
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Aim
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# 6 (- # $ , -
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2
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Theory
Procedure: One
Circuit Diagram
+ + =
Vout
Design
! " 8 !C # / - 6 0 9 8! ! 9/ ! 0A
* " C E < () )B (( ( B (. . B( =C
C E <C $( =
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Tabular Column
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. . .C E 1( .C E 1(
( . (C E 1-. (C E 1-.
) . . )C E 1 ( )C E 1 (
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, . . . ,C E .1- ,C E .1-
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4 . . 4C E .1 , 4C E .1 ,
. . . . C E (1 . C E (1
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.) . . . .)C E (1, .)C E (1,
.- . . . .-C E (14. .-C E (14.
. . . . . . C E )1.( . C E )1.(
Procedure: Two
G - M
D0 D1 D2
D3
12 9 8 11
1 7493N
14 10 5 2 3
CLK vcc
1 KHz
Output
Specimen graph
Analog
o/p
voltage
Staircase O/P
Result
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The capacitor C has to charge through resistance RA. The larger the time constant RAC, the longer
it takes for the capacitor voltage to reach +2/3VCC. In other words, the RC time constant controls
the width of the output pulse. The time during which the timer output remains high is given as
tp = 1.0986 RAC
The pulse width of the circuit may range from micro-seconds to many seconds.
- , # (
- 4-
+ -
0 ( 0 - 4- $ 4- $ < QQQQQQQQQQQQQQQQQQQQQ
+ . ,2 8
Aim
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Theory
Circuit Diagram
0- -(
9( # . -
(4 - ! 9( ? 9( ?
( P
.1 -1 .1( 1
1- )1( (1- 1.-(
)1 .1- 14)
Procedure
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8 /; #/!: ! ; # 0 ! !/ / 0 > $" 0 !71
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7 ! 0 /! C > 7 C 7 ! 7 7!>1
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- 4- 5 6 (
Vmin Vmax
Trapezoidal Waveform
Result
0 . 6 66 ( - ?
2 . 8 2, . ,2 8
Aim
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( - $ . # $ 6 (
Components and Equipments Required
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* * '/ !0 )
Theory
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/!A
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!/ !00 !0 9 90 0!8!/ !00 !0 ! / 0 !7
0 ! 0; ! !V 0 ! : ! 0 !7 (
(- 4 ? # ,. 1
Circuit Diagram
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, #
, ( - M
6 SS B + # /# E. 2 H 7 E 1.+# + E .$ <. R H > 1.+#= E *3 C
Procedure
. -
, ( -
Result
$ - (4 - ( - ( - - 6- 1
-
!" # $ % & ' ! -.
Analog Communication & LIC Lab [06ECL-58]
2 58, " . ,2 8 , 2 8 8 . ,2 8
Aim
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6 # ( - # #
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/ * '/ !0 )
Theory
Circuit Diagram
Output
Design
- $< P
4 < +
E ( +0 $ .1.
< P6
E( +0 $ < 1 .+# > .1.=
+ < 3 =C
Procedure
Result
0 5. 6 ( 6
- $ E \\\\\\\\\\\\\ 6 ;- 1A\\\\\\\\\\\\\\\
0 . 6 ( 6
- $ E \\\\\\\\\\\\\ 6 ;- 1A\\\\\\\\\\\\\\\
;- 1. -
Aim
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3 %3 $ ( - ? TUV $ 0 $ 6 4 T& V
4 1 $ 6 (
(4 9 - 2 A1
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((23 ) .
!0 0 /0
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(23 .
. # . .
% " /0
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) ! 6 /7 .
* * '/ !0 )
Theory
Circuit Diagram
Procedure
Design
For RA = RB = R,
C = 0.3 / (F x R)
= 0.3 / (30 K X 10 K)
C = 1nf
For fm = 5 KHz
] = f / fm = _____________
Transmission Bandwidth
BT = 2 ( f + fm) = ______________
Output
Am
Message
Signal
Ac
Carrier
Signal
FM Ac
Signal
Fmin Fmax
Result
% " 65 + 6
Aim
# 0 $ 6 4 6 - # 2 /' 4
(4 0 $ 6 $
Components & Equipments Required
(4 9 - 2 A1
*" " + ,-. *" " .
!0 0 /0 . 23 # . (
% 7! .&- , . ( (
% ! 5 /!0
' ! 6 /7 .
) * '/ !0 )
Theory
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!! / 7!8 ! !/ //! /! //!
, "/ !00 2 9 0 6 ! 0!/ !0 7 7! 0 ! 00
/! # !/ Y /! #; 0 0 0 !/ 0 9 # /9 /7 8 ! 1,C
/!0 7< 8 ! # 7 7!= 9 0 ! 8!/ ! !# /! ""/! !
7 /01 !/!# /! 8! 0 /!0 7 9! 8!
9 < 9 7 9, 6 9 W 9,
9 < 9 6 9 X 9,
! 0 " # 8! /! # !/ 0 7 0 / !7 0 0 9 !#
! 9
# M
( M
! ! 0 0"!!7 9 9 /2 9! 9 #/!: ! ; 0 01
" ( ( M
Circuit Diagram
R1
RF
Note:
If you want to keep the positive-going portion of the input signal instead of the negative-
going portion, simply reverse the two diodes. The result will be a negative-going copy of the
positive part of the input signal.
Working
/ ! ! 8! # ; ! # 0 ! 9 8! " ! " 0 7 !
" 0 8!1 / ! " 0 8! # ; ! ! " 0 7 ! H!/ 1 ! /
" 0 !0 0 H #! 20 2! ! 8!/ " # !/ 9
" ! # 7 7!0 77!71 5 ; 9 ^ * ; ! ; 7 !0 ! /! #; 1
! !/ 0 " ; 2!!"0 ! " " / 9 ! !0 " 70
H!/ 1 ? / ! ! 8! # ; ! " ! " " " !0 " 0 8! # /
. / *& 7 ( 0 *??1
D1 OFF
D2
9 < + B+ Y9
D1
D2 OFF
! # /0 : !0 02 0 9 0 ! " 8 !C ^ ! /
20 !0 / ! ! " ;0 0 C1 0 0 ! 0! ! " "
0 7 !0 0 J # 7 C C1 7 ! 0! !/!Y0 //! / (
; ! C EC E C1 ! ; !# /! 2 9 0 ! //! /
/ . EC $ . E B. $ . 2 E 1. 1 / 0 # ; ! ! "
"Y0 " 09 0 ! 8! / .! " 1. / !
7 7!1
Procedure
1. Before wiring the circuit, check all the components using multimeter.
2. Make the connection as shown in the diagram.
3. Set the signal generator (input voltage) amplitude 0.5V peak to peak sine wave.
4. Observe the input and rectified output signal waveform on the CRO.
5. Plot the waveform.
Design
# C E 1 C"2 "2
C E # $ . <C =
C E 1 C"2 "2
Output
Transfer Characteristics
Result
" 6 4 6 # - # 4 (4 $ 6
$ 4
' - 5 + 6
Aim
# 0 6- 4 6 - # 2 /' 4
(4 0 $ 6 $
(4 9 - 2 A1
*' ' + ,-. *' ' (
!0 0 /0 . 23 . ( ) - -
% 7! .&- , . ( (
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' ! 6 /7 .
) * '/ !0 )
Theory
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! 0 " # !/ /! "/! 0 / 01 "!/ !0 ; "/ 7
8!/ !7 # 9 8! /! # !7 0 7 ! 77 0 7 !
" 7! ! / 0 !0 " # !/1
9 < 9 K 9 < 9
! /!0 0 /!8!/0 # ! 0! ! !7 " / ; # ! " 0 1 ! /!0 0 /
8 !0 0 9 /! /! 0 !V ! /!0 0 /0 ! 0! 8!0 0 ! #
"/! 0 /7!/ 2!!" ! /! # "/ !00 / !1 # # / 0 ! /! 0
; 0 70 / 9 7 ##!/! 0! # /!0 0 ! 8 !0 ; 0
! 7 !7 (A. /!0 0 !/ 7; 0 0 0! "/! 0
/!0 0 /0 /7!/ / ! /!0 01
Circuit Diagram
Design
Procedure
Output
vout
vin
Result
- 4 6 # - # 4 (4 $ 6
$ 4