1 Digital Logic Design

Technical Report

IMPLEMENTATION OF LOGIC GATES USING TRANISTOR-TRANSISTOR LOGIC

Today the importance of digital circuits cannot be ignored as they make up the basis of modern
technological living. Digital circuits make use of digital signals that can be stored, duplicated and
transmitted easily. These digital circuits are composed of units called logic gates which process
binary information. Logic gates are important because practical digital systems involve complex
functions which can be realized by the use of simple NOT, OR & AND functions.

Objective:

Now as these simple functions are fundamental and very important so it is easy to understand that
how the familiarization with these simple logic gates can help us design and make complex digital
practical circuits.

Hence the objective in this project is to familiarize ourselves with the design and construction of
these simple logic gates (using TTL) and to be able to understand how complex systems can be
designed by using the technology which is used to construct these simple gates.

IMPORTANT PARAMETERS OF LOGIC GATES:

In designing logic gates there are some terminologies and parameters that an engineer should keep
account of in order to maximize the performance of digital circuits and optimize the economics of
the circuit.

Voltage transfer characteristic is an important parameter of logic gates which is the graph of input
voltage vs output voltage. This graph has four points which are of concern in the design of logic
gates. These are:

i. Input low voltage VIL (input voltage corresponding to logic 0)

ii. Input High voltage VIH(input voltage corresponding to logic 1)
iii. Output Low voltage VOL(input voltage corresponding to logic 0)
iv. Output High voltage VOH(input voltage corresponding to logic 1)

The difference between two output levels is called logic swing:

LS=VOH-VOL
Another important parameter is the noise margin which should also be maximized to minimize the
error in processing.

Fan it & Fan out refer to the input connections. Fan in is the number of input connections and Fan
out is the maximum number of load gates that can be connected to the output. These numbers are
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constrained by the current loading and switching speed. Apart from these power dissipation &
Transient response, which when improved can give higher clock frequencies and data rates, are
other things that should be kept in mind when designing these circuits.

The basis of every digital circuit are transistors which are of different types hence that gives rise to
numerous families of logic gate circuits which can be broadly classified into:

i. MOS
ii. Saturated Bipolar
iii. Non-Saturated Bipolar
iv. Compound semiconductor

Why TTL?

Each of these logic families has unique properties that make it suitable for certain applications.
We have chosen Saturated Bipolar logic family in our project. This family includes Resistor-
Transistor logic (RTL), Diode-Transistor Logic (DTL) and Transistor-Transistor Logic (TTL). These use
saturated BJTs as switches. They have higher transconductance than their MOS counterparts, so
they are less vulnerable to capacitive loading. They outperform MOS digital circuits when capacitive
loads are connected such as in case of motherboards. They also exhibit faster raw speeds than MOS.

BASIC PHENOMENA:

The basic phenomenon used in TTL is the use of BJT as a switch and to use BJT as a switch we need
to use two modes of operation:
i. Cut off mode (In which EBJ and CBJ are both reverse biased)
ii. Saturation mode (In which both EBJ and CBJ are forward biased)

To turn the switch ON we use cut off mode.

To turn the switch OFF we use saturation mode.

In the following section we have implemented AND, NAND and NOR logic gates using TTL.

1. NAND IMPLEMENTATION
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Image credits www.elshem.com

It is the truth table of a typical NAND gate with 3-inputs. We can see that circuit is only LOW when all
inputs are HIGH. So to implement this logic function we have following circuit.

Z= (A.B.C) `

The use of multi-emitter input transistor has solved the problem for multiple inputs and it performs
the ANDing of the input signal. Only in case of all inputs HIGH the transistor becomes reverse active
(EBJ reverse biased & CBJ forward biased). Hence this input transistor performs the ANDing of the
signal because if only one of the inputs goes LOW then its EBJ will become forward biased and
transistor will become OFF as it enters saturation region. So in order for this transistor to be ON all
inputs should be HIGH.

a. So when all inputs are HIGH EBJ of Q1 is reverse biased and CBJ forward biased so it enters
reverse active mode. This makes Qo in saturation region, as Qo's base goes HIGH. As we know
that when transistor is in saturation region then it is OFF so Vout is VCEsat that is .2 Volts.
b. When any one of the inputs is LOW then EBJ of Q1 is forward biased and it enters saturation
region. This makes Qo in cut off mode. As transistor in cut off mode is ON. So output is HIGH.

Improvement:

The problem with this circuit is that it requires both Q1 & Qo to discharge once any one of them
has entered saturation region in which minority carriers are injected into base. This discharging
produced delay in transistor switching. So to remove this problem we use:
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i. Active Pull-up Circuit

ii. Totem pole output

The improved circuit is

The improve circuit works in following manner:

With a HIGH output Qs is cut off and Qp is active mode
With a LOW output Qs is saturated and Qp is Cut off.

The input diodes are for safety when input goes lower than -.07 volts the turn ON. They are
usually turned OFF.

Hence the improved TTL NAND gate is constructed which is used in 7410 ICs.

2. AND IMPLEMENTATION

In the construction of AND gate we make use of the fact that by inverting NAND we can
construct AND gate. Hence by adding another inverting circuit into the circuit of NAND we can
achieve AND logic function which is for two variables:

Z=A.B
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Image credits www.web-books.com

Using TTL the AND implementation is given by following circuit:

Note that the input section consisting of Q 1 and resistance and the output section consisting
Q0, DL,QP and RCP are identical to TTL NAND gate.
Additional circuit components are QS2,QSD, DS, RSD, RCS. These are enclose in the shaded block
and provide a second level of inversion between the input and output. Thus, with two
inversions the circuit realizes the logic AND function.

a. With either or both inputs low, a large current flows into the base of Q 1.
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Furthermore, for either input low, the collector current of Q 1 essentially zero. The
voltage at the base of QS2 is then;
VB,S2=VINlow+VCE,ISAT<VBEactive
Hence, QS2 and therefore QSD are cut off for VIN low. With QS2 and QSD cut off , QO and QS are
easily seen to be saturated along with DS conducting .The output low voltage is
therefore

VOL=VCE,Osat=.2V

b. With all inputs high, Q1 becomes reverse active. QS2 and QSD are in saturation. With QSD in
saturation VB,S=VCE,SDSAT and thus QS and QO are cutoff. The output voltage
is then
VOUT= VOH
3. NOR IMPLEMENTATION

In NOR function if either input goes HIGH the output goes LOW.

Truth table for a two variable NOR gate is as follows:

Image credits www.diracdelta.co.uk

Z=A+B

The circuit of a typical TTL NOR gate is:

The circuit operates as follows:

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1. When VA is HIGH QIA conducts and current is steered through Q SA and it goes to saturation.
Then regardless of the situation of QSB Qp will be cut off and Qo will saturate (OFF). Hence
output will be low.
2. Similarly VB determines whether QSB is cut off (ON) or saturated (OFF).
3. When VA is LOW the current in QIA's collector is zero and QSA is in Cut off. Now it will be VB
that will determine the output in this case now if V B is also LOW then QSB is also cut off and
Qp is in saturation and Qo will cutoff (ON). Hence output is HIGH.
4. Hence if either input goes HIGH the outputs goes LOW hence performing NOR function.

Other things that we have learned during this project are:

i. These fundamental TTL circuits are fabricated and used in 74xx series of ICs.
ii. These TTL circuits are improved by replacing basic transistors with specially designed
transistors called Schottky transistors which allow TTL to compete with MOS in
applications in which MOS is preferred to basic TTL.
iii. Different parameters which should be kept in mind while designing a logic gate or
broadly a Digital Circuit.

Result:

Hence by using BJTs we have been able to implement Basic logic operations i.e., NAND, AND &
OR.
Our objective was also to gain the knowledge of deriving other complex systems using these
basic families. We can see that we can increase the no. of outputs to up to 8 (this due to area
and other power constraints) and implement multiple input functions. Also we can make other
logic functions from these e.g., we can make OR by simply inverting the NOR etc. Hence our
objective of implementing Logic operations using TTL has been achieved.

References:

1. Microelectronics Circuits by Sedra-Smith

2. Digital Integrated Circuits by John E. Ayers
3. Circuits obtained from University of Connecticut lectures
4. Dr. Muhammad Murtaza Khan
5. Microelectronics by Millman