Scribd
Upload
455 views

1bit Comparator 90n CMOS Layout Design

This document describes the design of a 1-bit comparator using CMOS technology. It includes the introduction, truth table, Boolean equations, schematic diagrams at the gate level and transistor level, layout design using Microwind following a 90nm design rule, and simulations verifying the comparator functions as expected by comparing two input signals and outputting the comparison. The project involved developing the comparator from defining the problem to transistor layout and testing via simulation.

Uploaded by

Wei Ting Chong
Copyright
© © All Rights Reserved
Available Formats
Download as PDF, TXT or read online on Scribd
455 views

1bit Comparator 90n CMOS Layout Design

This document describes the design of a 1-bit comparator using CMOS technology. It includes the introduction, truth table, Boolean equations, schematic diagrams at the gate level and transistor level, layout design using Microwind following a 90nm design rule, and simulations verifying the comparator functions as expected by comparing two input signals and outputting the comparison. The project involved developing the comparator from defining the problem to transistor layout and testing via simulation.

Uploaded by

Wei Ting Chong
Copyright
© © All Rights Reserved
Available Formats
Download as PDF, TXT or read online on Scribd
You are on page 1/ 19

UNIVERSITI MALAYSIA PERLIS

SCHOOL OF
MICROELECTRONIC
ENGINEERING
EMT 243 INTRODUCTION TO IC
DESIGN

1 BIT
COMPARATOR

Semester 2
Session 2015/2016

MINI PROJECT
DESIGN PROBLEM 2:
ONE BIT COMPARATOR CMOS
LAYOUT DESIGN

By
1. CHONG WEI TING
2. TAN YI QUAN
3. NUR AZIZAN BIN ANUAR
4. ONG PEI CHEEI
5. HENG TICK PONG

151010484 RK05
151010548 RK05
151010529 RK05
151010538 RK05
151033450 RK86

INTRODUCTION

Compares two different signal (Current, Voltage etc.) and


produces the digital output based on the comparison.
Widely use in analog to digital converters (ADCs), memory
sensing circuits and recently also on chip transceivers.

Applications of comparator :
1) Voltage comparator : a comparator circuit that compares two voltage signals and
determines which one is greater. The result of this comparison is indicated by the
output voltage.
2) Control applications in which the binary numbers representing physical
variables such as temperature, position are compared with a reference value. The
outputs from the comparator are used to drive the actuators so as to make the
physical variables closest to the set or reference value.

BLOCK DIAGRAM & SYMBOL

TRUTH TABLE
A

A=B

A>B

A<B

K-MAP & BOOLEAN EQUATION UNDER 3


DIFFERENCE CONDITION
A=B

A>B
B= 0

B= 1

A<B
B= 0

B= 1

B= 0

B= 1

A= 0

A= 0

A= 0

A= 1

A= 1

A= 1

Out=A B + AB (XNOR)

Out=AB

Out=AB

GATE LEVEL SCHEMATIC

Modification to
reduce transistor
capacities (Discuss
further soon)

TRANSISTOR LEVEL SCHEMATIC

Euler path 1= { A, B, A ,B }

Euler path 2 = { A,B }

Euler path 3 = { A, B }

MODIFICATION VERSION

Reduce
transistors
capacities

STICK DIAGRAM

N-well

Contact

P-diffusion

Metal 1

N-diffusion

Metal 2

Polysilicon

CMOS LAYOUT DESIGN

REFER NEXT SLIDE


FOR DESIGN RULE

CMOS 90n DESIGN RULE

CMOS
TECHNOLOGY
0.10um

WAVEFORM SIMULATION

COMPARE

FUNCTIONAL SIMULATION
USING QUARTUS 2

LAYOUT SIMULATION
USING MICROWIND

DISCUSSION
Mini Project Process Flow

Truth Table &


Boolean
expression

Gate level
design

Transistor
level
design

Stick
Diagram

Layout
Design

Simulation

DISCUSSION

Boolean expression 1= AB
Boolean expression 2= AB
Boolean expression 3= A XNOR B

Boolean expression 1= AB
Boolean expression 2= AB
Boolean expression 3= AB + AB

DISCUSSION
Simulation Output Waveform

Truth Table
A

A=B

A>B

A<B

VERIFIED

CONCLUSION

Comparator is a combinational logic circuit that used to compare at least two variables
and produce desired output while 1 bit comparator is design to compare between two
voltages signal and producing an output when any three of the conditions which are
A=B, A>B and A<B are achieved.
Gate level design and transistor level design and for 1 bit comparator based on the
Boolean equation obtained have been draw by using DSCH software.
Stick diagram constructed based on euler path.
Layout is draw out using Microwind software based on the stick diagram.
The simulation of the 1 bit comparator was carried out successfully and the results
obtained were as expected.
Therefore, the purpose to design the 1 bit comparator has been achieved throughout the
project conducted.

The end

You might also like