16 Micro-Programmed Control
16 Micro-Programmed Control
Computer Organization
and Architecture
8th Edition
Chapter 16
Micro-programmed Control
Micro-programmed Control
Use sequences of instructions (see earlier
notes) to control complex operations
Called micro-programming or firmware
Implementation (1)
All the control unit does is generate a set
of control signals
Each control signal is on or off
Represent each control signal by a bit
Have a control word for each microoperation
Have a sequence of control words for each
machine code instruction
Add an address to specify the next microinstruction, depending on conditions
Implementation (2)
Todays large microprocessor
Many instructions and associated register-level
hardware
Many control points to be manipulated
Based on 3 factors
Maximum number of simultaneous microoperations supported
The way control information is represented or
encoded
The way in which the next micro-instruction
address is specified
Micro-instruction Types
Each micro-instruction specifies single (or
few) micro-operations to be performed
(vertical micro-programming)
Vertical Micro-programming
Width is narrow
n control signals encoded into log2 n bits
Limited ability to express parallelism
Considerable encoding of control
information requires external memory
word decoder to identify the exact control
line being manipulated
Horizontal Micro-programming
Compromise
Divide control signals into disjoint groups
Implement each group as separate field in
memory word
Supports reasonable levels of parallelism
without too much complexity
Organization of
Control Memory
Control Unit
Functioning of Microprogrammed
Control Unit
Wilkes Control
1951
Matrix partially filled with diodes
During cycle, one row activated
Generates signals where diode present
First part of row generates control
Second generates address for next cycle
Slower
Design Considerations
Size of microinstructions
Address generation time
Determined by instruction register
Once per cycle, after instruction is fetched
Branches
Both conditional and unconditional
Sequencing Techniques
Based on current microinstruction,
condition flags, contents of IR, control
memory address must be generated
Based on format of address information
Two address fields
Single address field
Variable format
Branch Control
Logic: Single
Address Field
Branch Control
Logic: Variable
Format
Address Generation
Explicit
Implicit
Two-field
Mapping
Unconditional Branch
Addition
Conditional branch
Residual control
Execution
The cycle is the basic event
Each cycle is made up of two events
Fetch
Determined by generation of microinstruction
address
Execute
Execute
Effect is to generate control signals
Some control points internal to processor
Rest go to external control bus or other
interface
Control Unit
Organization
A Taxonomy of Microinstructions
Vertical/horizontal
Packed/unpacked
Hard/soft microprogramming
Direct/indirect encoding
How to Encode
K different internal and external control signals
Wilkess:
K bits dedicated
2K control signals during any instruction cycle
Compromises
More bits than necessary used
Some combinations that are physically allowable are not
possible to encode
Microinstruction Encoding
Direct Encoding
Microinstruction Encoding
Indirect Encoding
Required Reading
Stallings chapter 16